Imported nx-X11-3.1.0-1.tar.gznx-X11/3.1.0-1

Summary: Imported nx-X11-3.1.0-1.tar.gz
Keywords:

Imported nx-X11-3.1.0-1.tar.gz
into Git repository

11 files changed, 1139 insertions, 0 deletions

diff --git a/nx-X11/programs/Xserver/hw/xfree86/os-support/misc/BUSmemcpy.S b/nx-X11/programs/Xserver/hw/xfree86/os-support/misc/BUSmemcpy.S
new file mode 100644
index 000000000..373723c7d
--- /dev/null
+++ b/nx-X11/programs/Xserver/hw/xfree86/os-support/misc/BUSmemcpy.S
@@ -0,0 +1,153 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/misc/BUSmemcpy.s,v 1.2 1998/07/25 16:56:49 dawes Exp $ */
+/******************************************************************************
+                        Copyright 1993 by Glenn G. Lai
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted,
+provided that the above copyright notice appear in all copies and that
+both that copyright notice and this permission notice appear in
+supporting documentation, and that the name of Glenn G. Lai not be
+used in advertising or publicity pertaining to distribution of the
+software without specific, written prior permission.
+
+Glenn G. Lai DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, INCLUDING
+ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO EVENT SHALL
+DIGITAL BE LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR
+ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS,
+WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,
+ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS
+SOFTWARE.
+
+Glenn G. Lai
+P.O. Box 4314
+Austin, Tx 78765
+(glenn@cs.utexas.edu)
+8/9/93
+******************************************************************************/
+/* $XConsortium: BUSmemcpy.s /main/4 1996/02/21 17:39:34 kaleb $ */
+
+/*
+ * Modified to use long-alignment of video memory rather than word-alignment
+ * to improve performance for LocalBus video cards.  Function names changed
+ * from ISAToMem and MemToISA to BusToMem and MemToBus.
+ *
+ * David Dawes <dawes@XFree86.org>, 25 August 1993.
+ */
+
+
+#include "assyntax.h"
+
+	FILE("BUSmemcpy.s")
+
+	AS_BEGIN
+
+/* BusToMem copies from video memory to main memory
+   MemToBus copies from main memory to video memory
+
+	void xf86BusToMem(unsigned char *dst, unsigned char *src, int len);
+	void xf86MemToBus(unsigned char *dst, unsigned char *src, int len);
+*/
+
+#define dst     REGOFF(4,ESP)
+#define src     REGOFF(8,ESP)
+#define len     REGOFF(12,ESP)
+
+	GLOBL	GLNAME(xf86BusToMem)
+	GLOBL	GLNAME(xf86MemToBus)
+
+	SEG_DATA
+copyright:
+	STRING("Copyright 8/9/1993 by Glenn G. Lai")
+
+	SEG_TEXT
+	ALIGNTEXT4
+GLNAME(xf86BusToMem):
+	CLD
+	PUSH_L	(ESI)
+	MOV_L	(EDI, EDX)
+	
+	MOV_L	(src, ESI)
+	MOV_L	(dst, EDI)
+	MOV_L	(len, ECX)
+	
+	CMP_L	(CONST(7), ECX)
+	JC	(quickBM)
+
+	TEST_L	(CONST(1), ESI)
+	JZ	(BwM)
+
+	MOVS_B
+	DEC_L	(ECX)
+
+BwM:	
+	TEST_L	(CONST(2), ESI)
+	JZ	(BlM)
+
+	MOVS_W
+	DEC_L	(ECX)
+	DEC_L	(ECX)
+
+BlM:
+	MOV_L	(ECX, EAX)
+	AND_L	(CONST(3), EAX)
+	SHR_L	(CONST(2), ECX)
+	REP
+	MOVS_L
+	MOV_L	(EAX, ECX)
+quickBM:
+	OR_L	(ECX, ECX)
+	JZ	(return)
+	REP
+	MOVS_B
+return:
+	POP_L	(ESI)
+	MOV_L	(EDX, EDI)
+	RET
+/************************/
+
+	ALIGNTEXT4
+GLNAME(xf86MemToBus):
+	CLD
+	PUSH_L	(ESI)
+	MOV_L	(EDI, EDX)
+	
+	MOV_L	(src, ESI)
+	MOV_L	(dst, EDI)
+	MOV_L	(len, ECX)
+	
+	CMP_L	(CONST(7), ECX)
+	JC	(quickMB)
+
+	TEST_L	(CONST(1), EDI)
+	JZ	(MwB)
+
+	MOVS_B
+	DEC_L	(ECX)
+
+MwB:	
+	TEST_L	(CONST(2), EDI)
+	JZ	(MlB)
+
+	MOVS_W
+	DEC_L	(ECX)
+	DEC_L	(ECX)
+
+MlB:
+	MOV_L	(ECX, EAX)
+	AND_L	(CONST(3), EAX)
+	SHR_L	(CONST(2), ECX)
+	REP
+	MOVS_L
+	MOV_L	(EAX, ECX)
+quickMB:
+	OR_L	(ECX, ECX)
+	JZ	(return)
+	REP
+	MOVS_B
+
+	POP_L	(ESI)
+	MOV_L	(EDX, EDI)
+	RET
+
diff --git a/nx-X11/programs/Xserver/hw/xfree86/os-support/misc/BUSmemcpy.c b/nx-X11/programs/Xserver/hw/xfree86/os-support/misc/BUSmemcpy.c
new file mode 100644
index 000000000..9ff14396c
--- /dev/null
+++ b/nx-X11/programs/Xserver/hw/xfree86/os-support/misc/BUSmemcpy.c
@@ -0,0 +1,413 @@
+
+/****************************************************************************
+
+ For Alpha Linux, BusToMem() and MemToBus() can be simply memcpy(), BUT:
+  we need to prevent unaligned operations when accessing DENSE space on the BUS,
+  as the video memory is mmap'd that way. The below code does this.
+
+NOTE: we could simply use the "memcpy()" from LIBC here, but that, currently, is
+      not as fast.
+
+Thanks to Linus Torvalds for contributing this code.
+
+****************************************************************************/
+
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/misc/BUSmemcpy.c,v 1.3 1999/12/03 19:17:44 eich Exp $ */
+
+#ifdef HAVE_XORG_CONFIG_H
+#include <xorg-config.h>
+#endif
+
+#include <X11/X.h>
+#include "xf86.h"
+#include "xf86Priv.h"
+#include "xf86_OSlib.h"
+
+#ifdef __alpha__
+
+#include "compiler.h"
+
+/*
+ * The Jensen lacks dense memory, thus we have to address the bus via
+ * the sparse addressing scheme. These routines are only used in s3im.c
+ * Non time critical code uses SlowBCopy_{from/to} bus.
+ *
+ * Martin Ostermann (ost@comnets.rwth-aachen.de) - Apr.-Sep. 1996
+ */
+
+#ifdef TEST_JENSEN_CODE /* define to test the Sparse addressing on a non-Jensen */
+#define LWORD_CODING (0x18)
+#define SPARSE (5)
+#else
+#define LWORD_CODING (0x60)
+#define SPARSE (7)
+#endif
+
+void
+xf86JensenMemToBus(char *Base, long dst, long src, int count)
+{
+    if( ((long)src^((long)dst)) & 3) {  
+                               /* src & dst are NOT aligned to each other */
+	unsigned long addr;
+	unsigned long low_word, high_word,last_read;
+	long  rm,loop;
+	unsigned long tmp,org,org2,mask,src_org,count_org;
+	
+	src_org=src;
+	count_org=count;
+    
+	/* add EISA longword coding and round off*/
+	addr = (long)(Base+(dst<<SPARSE) + LWORD_CODING) & ~(3<<SPARSE);
+	rm = (long)dst & 3;
+	count += rm;
+	
+	count = count_org + rm;
+	org = *(volatile unsigned int *)addr;
+	__asm__("ldq_u %0,%1"
+		:"=r" (low_word):"m" (*(unsigned long *)(src_org)));
+	src = src_org - rm;
+	if( count > 4  ) {
+	    last_read = src_org+count_org - 1;
+	    __asm__("ldq_u %0,%1"
+		    :"=r" (high_word):"m" (*(unsigned long *)(src+4)));
+	    __asm__("extll %1,%2,%0"
+		    :"=r" (low_word)
+		    :"r" (low_word), "r" ((unsigned long)(src)));
+	    __asm__("extlh %1,%2,%0"
+		    :"=r" (tmp)
+		    :"r" (high_word), "r" ((unsigned long)(src)));
+	    tmp |= low_word;
+	    src += 4;
+	    __asm__("mskqh %1,%2,%0"
+		    :"=r" (tmp)
+		    :"r" (tmp), "r" (rm));
+	    __asm__("mskql %1,%2,%0"
+		    :"=r" (org2)
+		    :"r" (org), "r" (rm));
+	    tmp |= org2;
+      
+	    loop = (count-4) >> 2; /* loop eqv. count>=4 ; count -= 4 */
+	    while (loop) {
+                     /* tmp to be stored completly -- need to read next word*/
+		low_word = high_word;
+		*(volatile unsigned int *) (addr) = tmp;
+		__asm__("ldq_u %0,%1"
+			:"=r" (high_word):"m" (*(unsigned long*)(src+4)));
+		loop --;
+		__asm__("extll %1,%2,%0"
+			:"=r" (low_word)
+			:"r" (low_word), "r" ((unsigned long)src));
+		__asm__("extlh %1,%2,%0"
+			:"=r" (tmp)
+			:"r" (high_word), "r" ((unsigned long)src));
+		src += 4;
+		tmp |= low_word;
+		addr += 4<<SPARSE;
+	    }
+	    if ( count & 3 ) {
+                     /* Store tmp completly, and possibly read one more word.*/
+		*(volatile unsigned int *) (addr) = tmp;
+		__asm__("ldq_u %0,%1"
+			:"=r" (tmp):"m" (*((unsigned long *)(last_read)) ));
+		addr += 4<<SPARSE;
+		__asm__("extll %1,%2,%0"
+			:"=r" (low_word)
+			:"r" (high_word), "r" ((unsigned long)src));
+		__asm__("extlh %1,%2,%0"
+			:"=r" (tmp)
+			:"r" (tmp), "r" ((unsigned long)src));
+		tmp |= low_word;
+		org = *(volatile unsigned int *)addr;
+		
+		__asm__("mskql %1,%2,%0"
+			:"=r" (tmp)
+			:"r" (tmp), "r" (count&3));
+		__asm__("mskqh %1,%2,%0"
+			:"=r" (org)
+			:"r" (org), "r" (count&3));
+		
+		tmp |= org;
+	    } 
+	    *(volatile unsigned int *) (addr) = tmp;
+	    return;
+	} else {         /* count > 4  */
+	    __asm__("ldq_u %0,%1"
+		    :"=r" (high_word):"m" (*(unsigned long *)(src+4)));
+	    __asm__("extll %1,%2,%0"
+		    :"=r" (low_word)
+		    :"r" (low_word), "r" ((unsigned long)(src)));
+	    __asm__("extlh %1,%2,%0"
+		    :"=r" (tmp)
+		    :"r" (high_word), "r" ((unsigned long)(src)));
+	    tmp |= low_word;
+	    if( count < 4 ) {
+		
+		mask = -1;
+		__asm__("mskqh %1,%2,%0"
+			:"=r" (mask)
+			:"r" (mask), "r" (rm));
+		__asm__("mskql %1,%2,%0"
+			:"=r" (mask)
+			:"r" (mask), "r" (count));
+		tmp = (tmp & mask) | (org & ~mask);
+		*(volatile unsigned int *) (addr) = tmp;
+		return;
+	    }  else {
+		__asm__("mskqh %1,%2,%0"
+			:"=r" (tmp)
+			:"r" (tmp), "r" (rm));
+		__asm__("mskql %1,%2,%0"
+			:"=r" (org2)
+			:"r" (org), "r" (rm));
+		
+		tmp |= org2;
+		*(volatile unsigned int *) (addr) = tmp;
+		return;
+	    }
+	}
+    } else {          /* src & dst are aligned to each other */
+	unsigned long addr;
+	unsigned int tmp,org,rm;
+	unsigned int *src_r;
+	
+	/* add EISA longword coding and round off*/
+	addr = (long)(Base+(dst<<SPARSE) + LWORD_CODING) & ~(3<<SPARSE);
+	
+	src_r = (unsigned int*)((long)src & ~3L);
+	rm=(long)src & 3;
+	count += rm;
+	
+	tmp = *src_r;
+	org = *(volatile unsigned int *)addr;
+	
+	__asm__("mskqh %1,%2,%0"
+		:"=r" (tmp)
+		:"r" (tmp), "r" (rm));
+	__asm__("mskql %1,%2,%0"
+		:"=r" (org)
+		:"r" (org), "r" (rm));
+	
+	tmp |= org;
+	
+	while (count > 4) {
+	    *(volatile unsigned int *) addr = tmp;
+	    addr += 4<<SPARSE;
+	    src_r += 1;
+	    tmp = *src_r;
+	    count -= 4;
+	}
+	
+	org = *(volatile unsigned int *)addr;
+	__asm__("mskql %1,%2,%0"
+		:"=r" (tmp)
+		:"r" (tmp), "r" (count));
+	__asm__("mskqh %1,%2,%0"
+		:"=r" (org)
+		:"r" (org), "r" (count));
+	tmp |= org;
+	*(volatile unsigned int *) (addr) = tmp;
+    }
+}
+
+void
+xf86JensenBusToMem(char *Base, char *dst, unsigned long src, int count)
+{
+#if 0
+  /* Optimization of BusToMem() is left as an exercise to the reader ;-)    
+   * Consider that ldq_u/extlh/extll won't work because of the bus being
+   * only 4 bytes wide! 
+   */
+#else
+  unsigned long addr;
+  long result;
+
+  addr = (unsigned long)(Base+(src<<SPARSE)) ;
+  while( addr & (3<<SPARSE) ){
+    if(count <= 0) return;
+    result = *(volatile int *) addr;
+    result >>= ((addr>>SPARSE) & 3) * 8;
+    *dst++ = (char) result;
+    addr += 1<<SPARSE;
+    count--;
+  }
+  count -=4;
+  while(count >= 0){
+    int i;
+
+    result = *(volatile int *) (addr+LWORD_CODING);
+    for(i=4;i--;) {
+      *dst++ = (char) result;
+      result >>= 8;
+    }
+    addr += 4<<SPARSE;
+    count -= 4;
+  }
+  count +=4;
+  
+  while( count ){
+    result = *(volatile int *) addr;
+    result >>= ((addr>>SPARSE) & 3) * 8;
+    *dst++ = (char) result;
+    addr += 1<<SPARSE;
+    count--;
+  }
+#endif  
+}
+
+
+static unsigned long __memcpy(unsigned long dest, unsigned long src, int n);
+
+void
+xf86BusToMem(unsigned char *dst, unsigned char *src, int len)
+{
+	__memcpy((unsigned long)dst, (unsigned long)src, len);
+}
+void
+xf86MemToBus(unsigned char *dst, unsigned char *src, int len)
+{
+  if (len == sizeof(int))
+    if (!(((long)src | (long)dst) & 3))
+      *((unsigned int*)dst) = *((unsigned int*)(src));
+    else {
+      int i;
+      if (((long)src) & 3)
+	i = ldl_u((unsigned int*)src);
+      else
+	i = *(unsigned int*)src;
+      if (((long)dst) & 3)
+	stl_u(i,(unsigned int*)dst);
+      else
+	*(unsigned int*)dst = i;
+    }
+  else
+    __memcpy((unsigned long)dst, (unsigned long)src, len);
+}
+
+/*
+ *  linux/arch/alpha/lib/memcpy.c
+ *
+ *  Copyright (C) 1995  Linus Torvalds, used with his permission.
+ */
+
+/*
+ * This is a reasonably optimized memcpy() routine.
+ */
+
+/*
+ * Note that the C code is written to be optimized into good assembly. However,
+ * at this point gcc is unable to sanely compile "if (n >= 0)", resulting in a
+ * explicit compare against 0 (instead of just using the proper "blt reg, xx" or
+ * "bge reg, xx"). I hope alpha-gcc will be fixed to notice this eventually..
+ */
+
+/*
+ * This should be done in one go with ldq_u*2/mask/stq_u. Do it
+ * with a macro so that we can fix it up later..
+ */
+#define ALIGN_DEST_TO8(d,s,n) \
+	while (d & 7) { \
+		if (n <= 0) return; \
+		n--; \
+		*(char *) d = *(char *) s; \
+		d++; s++; \
+	}
+
+/*
+ * This should similarly be done with ldq_u*2/mask/stq. The destination
+ * is aligned, but we don't fill in a full quad-word
+ */
+#define DO_REST(d,s,n) \
+	while (n > 0) { \
+		n--; \
+		*(char *) d = *(char *) s; \
+		d++; s++; \
+	}
+
+/*
+ * This should be done with ldq/mask/stq. The source and destination are
+ * aligned, but we don't fill in a full quad-word
+ */
+#define DO_REST_ALIGNED(d,s,n) DO_REST(d,s,n)
+
+/*
+ * This does unaligned memory copies. We want to avoid storing to
+ * an unaligned address, as that would do a read-modify-write cycle.
+ * We also want to avoid double-reading the unaligned reads.
+ *
+ * Note the ordering to try to avoid load (and address generation) latencies.
+ */
+static __inline__ void __memcpy_unaligned(unsigned long d, unsigned long s, long n)
+{
+	ALIGN_DEST_TO8(d,s,n);
+	n -= 8;			/* to avoid compare against 8 in the loop */
+	if (n >= 0) {
+		unsigned long low_word, high_word;
+		__asm__("ldq_u %0,%1":"=r" (low_word):"m" (*(unsigned long *) s));
+		do {
+			unsigned long tmp;
+			__asm__("ldq_u %0,%1":"=r" (high_word):"m" (*(unsigned long *)(s+8)));
+			n -= 8;
+			__asm__("extql %1,%2,%0"
+				:"=r" (low_word)
+				:"r" (low_word), "r" (s));
+			__asm__("extqh %1,%2,%0"
+				:"=r" (tmp)
+				:"r" (high_word), "r" (s));
+			s += 8;
+			*(unsigned long *) d = low_word | tmp;
+			d += 8;
+			low_word = high_word;
+		} while (n >= 0);
+	}
+	n += 8;
+	DO_REST(d,s,n);
+}
+
+/*
+ * Hmm.. Strange. The __asm__ here is there to make gcc use a integer register
+ * for the load-store. I don't know why, but it would seem that using a floating
+ * point register for the move seems to slow things down (very small difference,
+ * though).
+ *
+ * Note the ordering to try to avoid load (and address generation) latencies.
+ */
+static __inline__ void __memcpy_aligned(unsigned long d, unsigned long s, long n)
+{
+	ALIGN_DEST_TO8(d,s,n);
+	n -= 8;
+	while (n >= 0) {
+		unsigned long tmp;
+		__asm__("ldq %0,%1":"=r" (tmp):"m" (*(unsigned long *) s));
+		n -= 8;
+		s += 8;
+		*(unsigned long *) d = tmp;
+		d += 8;
+	}
+	n += 8;
+	DO_REST_ALIGNED(d,s,n);
+}
+
+static unsigned long __memcpy(unsigned long dest, unsigned long src, int n)
+{
+	if (!((dest ^ src) & 7)) {
+		__memcpy_aligned(dest, src, n);
+		return dest;
+	}
+	__memcpy_unaligned(dest, src, n);
+	return dest;
+}
+
+#else /* __alpha__ */
+
+void
+xf86BusToMem(unsigned char *dst, unsigned char *src, int len)
+{
+	memcpy(dst, src, len);
+}
+void
+xf86MemToBus(unsigned char *dst, unsigned char *src, int len)
+{
+	memcpy(dst, src, len);
+}
+
+#endif /* __alpha__ */
diff --git a/nx-X11/programs/Xserver/hw/xfree86/os-support/misc/Delay.c b/nx-X11/programs/Xserver/hw/xfree86/os-support/misc/Delay.c
new file mode 100644
index 000000000..33d0789fd
--- /dev/null
+++ b/nx-X11/programs/Xserver/hw/xfree86/os-support/misc/Delay.c
@@ -0,0 +1,44 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/misc/Delay.c,v 3.3 2000/12/08 20:13:38 eich Exp $ */
+ 
+#ifdef HAVE_XORG_CONFIG_H
+#include <xorg-config.h>
+#endif
+
+#ifdef __UNIXOS2__
+#define I_NEED_OS2_H
+#endif
+#include <X11/X.h>
+#include "xf86.h"
+#include "xf86Priv.h"
+#include "xf86_OSlib.h"
+
+#include <time.h>
+
+void
+xf86UDelay(long usec)
+{
+#if 0
+    struct timeval start, interrupt;
+#else
+    int sigio;
+
+    sigio = xf86BlockSIGIO();
+    xf86usleep(usec);
+    xf86UnblockSIGIO(sigio);
+#endif
+
+#if 0
+    gettimeofday(&start,NULL);
+
+    do {
+	usleep(usec);
+	gettimeofday(&interrupt,NULL);
+	
+	if ((usec = usec - (interrupt.tv_sec - start.tv_sec) * 1000000
+	      - (interrupt.tv_usec - start.tv_usec)) < 0)
+	    break;
+	start = interrupt;
+    } while (1);
+#endif
+}
+
diff --git a/nx-X11/programs/Xserver/hw/xfree86/os-support/misc/IODelay.S b/nx-X11/programs/Xserver/hw/xfree86/os-support/misc/IODelay.S
new file mode 100644
index 000000000..685584653
--- /dev/null
+++ b/nx-X11/programs/Xserver/hw/xfree86/os-support/misc/IODelay.S
@@ -0,0 +1,53 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/misc/IODelay.s,v 1.2 1998/07/25 16:56:49 dawes Exp $ */
+/*******************************************************************************
+                        Copyright 1994 by Glenn G. Lai
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted,
+provided that the above copyr notice appear in all copies and that
+both that copyr notice and this permission notice appear in
+supporting documentation, and that the name of Glenn G. Lai not be
+used in advertising or publicity pertaining to distribution of the
+software without specific, written prior permission.
+
+Glenn G. Lai DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, INCLUDING
+ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO EVENT SHALL
+DIGITAL BE LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR
+ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS,
+WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,
+ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS
+SOFTWARE.
+
+Glenn G. Lai
+P.O. Box 4314
+Austin, Tx 78765
+glenn@cs.utexas.edu)
+7/21/94
+*******************************************************************************/
+/* $XConsortium: IODelay.s /main/4 1996/02/21 17:40:21 kaleb $ */
+ 
+/* 
+ *   All we really need is a delay of about 40ns for I/O recovery for just
+ *   about any occasion, but we'll be more conservative here:  On a
+ *   100-MHz CPU, produce at least a delay of 1,000ns.
+ */ 
+
+#include "assyntax.h"
+
+	FILE("DACDelay.s")
+
+	AS_BEGIN
+
+	GLOBL	GLNAME(xf86IODelay)
+
+	SEG_TEXT
+	ALIGNTEXT4
+GLNAME(xf86IODelay):
+	MOV_L 	(CONST(100), EAX)
+delay_it:
+	DEC_L	(EAX)
+	JNE	(delay_it)
+	RET
+
diff --git a/nx-X11/programs/Xserver/hw/xfree86/os-support/misc/IODelay.c b/nx-X11/programs/Xserver/hw/xfree86/os-support/misc/IODelay.c
new file mode 100644
index 000000000..697c07f61
--- /dev/null
+++ b/nx-X11/programs/Xserver/hw/xfree86/os-support/misc/IODelay.c
@@ -0,0 +1,28 @@
+
+/* $XConsortium: IODelay.c /main/1 1996/05/07 17:13:43 kaleb $ */
+/*******************************************************************************
+  Stub for Alpha Linux
+*******************************************************************************/
+
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/misc/IODelay.c,v 1.1.2.1 1998/06/04 17:35:59 dawes Exp $ */
+ 
+#ifdef HAVE_XORG_CONFIG_H
+#include <xorg-config.h>
+#endif
+
+#include <X11/X.h>
+#include "xf86.h"
+#include "xf86Priv.h"
+#include "xf86_OSlib.h"
+
+/* 
+ *   All we really need is a delay of about 40ns for I/O recovery for just
+ *   about any occasion, but we'll be more conservative here:  On a
+ *   100-MHz CPU, produce at least a delay of 1,000ns.
+ */ 
+void
+xf86IODelay()
+{
+	xf86UDelay(1);
+}
+
diff --git a/nx-X11/programs/Xserver/hw/xfree86/os-support/misc/Imakefile b/nx-X11/programs/Xserver/hw/xfree86/os-support/misc/Imakefile
new file mode 100644
index 000000000..d6122f52a
--- /dev/null
+++ b/nx-X11/programs/Xserver/hw/xfree86/os-support/misc/Imakefile
@@ -0,0 +1,54 @@
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/misc/Imakefile,v 3.13 2003/12/30 15:21:06 herrb Exp $
+XCOMM $XdotOrg: xc/programs/Xserver/hw/xfree86/os-support/misc/Imakefile,v 1.2 2004/04/23 19:54:11 eich Exp $
+
+
+
+XCOMM $XConsortium: Imakefile /main/4 1996/09/28 17:24:12 rws $
+
+#include <Server.tmpl>
+
+
+#if defined(i386Architecture) && !defined(cygwinArchitecture) \
+	&& !defined(OS2Architecture)
+XSRCS = BUSmemcpy.S IODelay.S SlowBcopy.S
+XOBJS = BUSmemcpy.o IODelay.o SlowBcopy.o
+#else
+XSRCS = BUSmemcpy.c IODelay.c SlowBcopy.c
+XOBJS = BUSmemcpy.o IODelay.o SlowBcopy.o
+#if defined(NetBSDArchitecture)
+BUSmemcpy.o: BUSmemcpy.c
+IODelay.o: IODelay.c
+SlowBcopy.o: SlowBcopy.c
+#endif
+#endif
+
+#if HasGcc || HasGcc2
+ILHACKSRCS = xf86_IlHack.c
+ILHACKOBJS = xf86_IlHack.o
+#elif NeedPortIO
+ILHACKOBJS = PortIO.o
+#endif
+
+SRCS = xf86_Util.c Delay.c $(ILHACKSRCS) $(XSRCS)
+
+OBJS = xf86_Util.o Delay.o $(ILHACKOBJS) $(XOBJS)
+
+INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I. -I$(SERVERSRC)/include \
+           -I$(XINCLUDESRC)
+
+SubdirLibraryRule($(OBJS))
+NormalLibraryObjectRule()
+
+#if defined(i386Architecture) && !defined(cygwinArchitecture) \
+	&& !defined(OS2Architecture)
+ObjectFromAsmSource(BUSmemcpy,NullParameter)
+ObjectFromAsmSource(IODelay,NullParameter)
+ObjectFromAsmSource(SlowBcopy,NullParameter)
+#endif
+
+#ifdef NeedPortIO
+ObjectFromAsmSource(PortIO,NullParameter)
+#endif
+
+DependTarget()
+
diff --git a/nx-X11/programs/Xserver/hw/xfree86/os-support/misc/PortIO.S b/nx-X11/programs/Xserver/hw/xfree86/os-support/misc/PortIO.S
new file mode 100644
index 000000000..75db31156
--- /dev/null
+++ b/nx-X11/programs/Xserver/hw/xfree86/os-support/misc/PortIO.S
@@ -0,0 +1,57 @@
+/* $XFree86$ */
+
+/* Port I/O functions for platforms with no inlining. */
+
+#include "assyntax.h"
+
+	FILE("PortIO.s")
+
+	AS_BEGIN
+
+	GLOBL	GLNAME(outb)
+	GLOBL	GLNAME(outw)
+	GLOBL	GLNAME(outl)
+	GLOBL	GLNAME(inb)
+	GLOBL	GLNAME(inw)
+	GLOBL	GLNAME(inl)
+
+	SEG_TEXT
+	ALIGNTEXT4
+GLNAME(outb):
+	MOV_L	(REGOFF(4,ESP), EDX)
+	MOV_L	(REGOFF(8,ESP), EAX)
+	OUT_B
+	RET
+
+	ALIGNTEXT4
+GLNAME(outw):
+	MOV_L	(REGOFF(4,ESP), EDX)
+	MOV_L	(REGOFF(8,ESP), EAX)
+	OUT_W
+	RET
+
+	ALIGNTEXT4
+GLNAME(outl):
+	MOV_L	(REGOFF(4,ESP), EDX)
+	MOV_L	(REGOFF(8,ESP), EAX)
+	OUT_L
+	RET
+
+	ALIGNTEXT4
+GLNAME(inb):
+	MOV_L	(REGOFF(4,ESP), EDX)
+	IN_B
+	RET
+
+	ALIGNTEXT4
+GLNAME(inw):
+	MOV_L	(REGOFF(4,ESP), EDX)
+	IN_L
+	RET
+
+	ALIGNTEXT4
+GLNAME(inl):
+	MOV_L	(REGOFF(4,ESP), EDX)
+	IN_L
+	RET
+
diff --git a/nx-X11/programs/Xserver/hw/xfree86/os-support/misc/SlowBcopy.S b/nx-X11/programs/Xserver/hw/xfree86/os-support/misc/SlowBcopy.S
new file mode 100644
index 000000000..9fd73a0f9
--- /dev/null
+++ b/nx-X11/programs/Xserver/hw/xfree86/os-support/misc/SlowBcopy.S
@@ -0,0 +1,108 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/misc/SlowBcopy.s,v 1.2 1998/07/25 16:56:50 dawes Exp $ */
+/*******************************************************************************
+                        Copyright 1994 by Glenn G. Lai
+
+                        All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and its
+documentation for any purpose and without fee is hereby granted,
+provided that the above copyr notice appear in all copies and that
+both that copyr notice and this permission notice appear in
+supporting documentation, and that the name of Glenn G. Lai not be
+used in advertising or publicity pertaining to distribution of the
+software without specific, written prior permission.
+
+Glenn G. Lai DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, INCLUDING
+ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO EVENT SHALL
+DIGITAL BE LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR
+ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS,
+WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,
+ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS
+SOFTWARE.
+
+Glenn G. Lai
+P.O. Box 4314
+Austin, Tx 78765
+glenn@cs.utexas.edu)
+7/21/94
+*******************************************************************************/
+/* $XConsortium: SlowBcopy.s /main/4 1996/02/21 17:40:52 kaleb $ */
+ 
+/* 
+ *   Modified from the output generated by GCC
+ *
+ *   Create a dependency that should be immune from the effect of register
+ *   renaming as is commonly seen in superscalar processors.  This should
+ *   insert a minimum of 100-ns delays between reads/writes at clock rates
+ *   up to 100 MHz---GGL
+ *   
+ *   Slowbcopy(char *src, char *dst, int count)   
+ *   
+ */ 
+
+#include "assyntax.h"
+
+	FILE("SlowBcopy.s")
+
+	AS_BEGIN
+
+gcc2_compiled.:
+___gnu_compiled_c:
+
+	GLOBL	GLNAME(xf86SlowBcopy)
+
+	SEG_TEXT
+	ALIGNTEXT4
+GLNAME(xf86SlowBcopy):
+	PUSH_L	(EBP)
+	MOV_L	(ESP,EBP)
+	PUSH_L	(ESI)
+	PUSH_L	(EBX)
+	MOV_L	(REGOFF(8,EBP),ECX)
+	MOV_L	(REGOFF(12,EBP),EDX)
+	MOV_L	(REGOFF(16,EBP),ESI)
+	XOR_L	(EAX,EAX)
+	CMP_L	(ESI,EAX)
+	JGE	(L3)
+
+	ALIGNTEXT4
+L5:
+	MOV_B	(REGIND(ECX),BL)
+
+	MOV_B	(BL, BH)
+	MOV_B	(BH, BL)
+	MOV_B	(BL, BH)
+	MOV_B	(BH, BL)
+	MOV_B	(BL, BH)
+	MOV_B	(BH, BL)
+	MOV_B	(BL, BH)
+	MOV_B	(BH, BL)
+	MOV_B	(BL, BH)
+	MOV_B	(BH, BL)
+
+	MOV_B	(BL,REGIND(EDX))
+
+	INC_L	(ECX)
+	DEC_L	(ECX)
+	INC_L	(ECX)
+	DEC_L	(ECX)
+	INC_L	(ECX)
+	DEC_L	(ECX)
+	INC_L	(ECX)
+	DEC_L	(ECX)
+	INC_L	(ECX)
+	DEC_L	(ECX)
+
+	INC_L	(ECX)
+	INC_L	(EDX)
+	INC_L	(EAX)
+	CMP_L	(ESI,EAX)
+	JL	(L5)
+L3:
+	LEA_L	(REGOFF(-8,EBP),ESP)
+	POP_L	(EBX)
+	POP_L	(ESI)
+	MOV_L	(EBP,ESP)
+	POP_L	(EBP)
+	RET
+
diff --git a/nx-X11/programs/Xserver/hw/xfree86/os-support/misc/SlowBcopy.c b/nx-X11/programs/Xserver/hw/xfree86/os-support/misc/SlowBcopy.c
new file mode 100644
index 000000000..ec2c67ffa
--- /dev/null
+++ b/nx-X11/programs/Xserver/hw/xfree86/os-support/misc/SlowBcopy.c
@@ -0,0 +1,114 @@
+
+/* $XConsortium: SlowBcopy.c /main/1 1996/05/07 17:14:10 kaleb $ */
+/*******************************************************************************
+  for Alpha Linux
+*******************************************************************************/
+
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/misc/SlowBcopy.c,v 1.6tsi Exp $ */
+ 
+/* 
+ *   Create a dependency that should be immune from the effect of register
+ *   renaming as is commonly seen in superscalar processors.  This should
+ *   insert a minimum of 100-ns delays between reads/writes at clock rates
+ *   up to 100 MHz---GGL
+ *   
+ *   Slowbcopy(char *src, char *dst, int count)   
+ *   
+ */ 
+
+#ifdef HAVE_XORG_CONFIG_H
+#include <xorg-config.h>
+#endif
+
+#include <X11/X.h>
+#include "xf86.h"
+#include "xf86Priv.h"
+#include "xf86_OSlib.h"
+#include "compiler.h"
+
+/* The outb() isn't needed on my machine, but who knows ... -- ost */
+void
+xf86SlowBcopy(unsigned char *src, unsigned char *dst, int len)
+{
+    while(len--)
+    {
+	*dst++ = *src++;
+#if !defined(__sparc__) && \
+    !defined(__powerpc__) && \
+    !defined(__mips__) && \
+    !defined(__ia64__)
+	outb(0x80, 0x00);
+#endif
+    }
+}
+
+#ifdef __alpha__
+/*
+ * The Jensen lacks dense memory, thus we have to address the bus via
+ * the sparse addressing scheme. Time critical code uses routines from
+ * BUSmemcpy.c
+ *
+ * Martin Ostermann (ost@comnets.rwth-aachen.de) - Apr.-Sep. 1996
+ */
+
+#ifdef linux
+
+unsigned long _bus_base(void);
+
+#ifdef TEST_JENSEN_CODE /* define to test the Sparse addressing on a non-Jensen */
+#define SPARSE (5)
+#else
+#define SPARSE (7)
+#endif
+
+#define isJensen() (!_bus_base())
+
+#else
+
+#define isJensen() 0
+#define SPARSE 0
+
+#endif
+
+void
+xf86SlowBCopyFromBus(unsigned char *src, unsigned char *dst, int count)
+{
+    if (isJensen())
+    {
+	unsigned long addr;
+	long result;
+
+	addr = (unsigned long) src;
+	while( count ){
+	    result = *(volatile int *) addr;
+	    result >>= ((addr>>SPARSE) & 3) * 8;
+	    *dst++ = (unsigned char) (0xffUL & result);
+	    addr += 1<<SPARSE;
+	    count--;
+	    outb(0x80, 0x00);
+	}
+    }
+    else
+	xf86SlowBcopy(src,dst,count);
+}
+  
+void
+xf86SlowBCopyToBus(unsigned char *src, unsigned char *dst, int count)
+{
+    if (isJensen())
+    {
+	unsigned long addr;
+
+	addr = (unsigned long) dst;
+	while(count) {
+	    *(volatile unsigned int *) addr = (unsigned short)(*src) * 0x01010101;
+	    src++;
+	    addr += 1<<SPARSE;
+	    count--;
+	    outb(0x80, 0x00);
+	}
+    }
+    else
+	xf86SlowBcopy(src,dst,count);    
+}
+#endif
diff --git a/nx-X11/programs/Xserver/hw/xfree86/os-support/misc/xf86_IlHack.c b/nx-X11/programs/Xserver/hw/xfree86/os-support/misc/xf86_IlHack.c
new file mode 100644
index 000000000..d8053f7d2
--- /dev/null
+++ b/nx-X11/programs/Xserver/hw/xfree86/os-support/misc/xf86_IlHack.c
@@ -0,0 +1,19 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/misc/xf86_IlHack.c,v 3.4.4.1 1998/06/04 17:36:01 dawes Exp $ */
+/*
+ * This file is an incredible crock to get the normally-inline functions
+ * built into the server so that things can be debugged properly.
+ *
+ * Note: this doesn't work when using a compiler other than GCC.
+ */
+/* $XConsortium: xf86_IlHack.c /main/4 1996/02/21 17:52:26 kaleb $ */
+
+
+#define static /**/
+#define __inline__ /**/
+#undef NO_INLINE
+#define DO_PROTOTYPES
+#ifdef HAVE_XORG_CONFIG_H
+#include <xorg-config.h>
+#endif
+
+#include "compiler.h"
diff --git a/nx-X11/programs/Xserver/hw/xfree86/os-support/misc/xf86_Util.c b/nx-X11/programs/Xserver/hw/xfree86/os-support/misc/xf86_Util.c
new file mode 100644
index 000000000..afcdd5b69
--- /dev/null
+++ b/nx-X11/programs/Xserver/hw/xfree86/os-support/misc/xf86_Util.c
@@ -0,0 +1,96 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/misc/xf86_Util.c,v 3.7 1999/01/14 13:05:05 dawes Exp $ */
+/*
+ * Copyright 1993 by David Wexelblat <dwex@goblin.org>
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that
+ * copyright notice and this permission notice appear in supporting
+ * documentation, and that the name of David Wexelblat not be used in
+ * advertising or publicity pertaining to distribution of the software without
+ * specific, written prior permission.  David Wexelblat makes no representations
+ * about the suitability of this software for any purpose.  It is provided
+ * "as is" without express or implied warranty.
+ *
+ * DAVID WEXELBLAT DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL DAVID WEXELBLAT BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ *
+ */
+/* $XConsortium: xf86_Util.c /main/5 1996/10/23 13:13:10 kaleb $ */
+
+/*
+ * This file is for utility functions that will be shared by other pieces
+ * of the system.  Putting things here ensure that all the linking order
+ * dependencies are dealt with, as this library will be linked in last.
+ */
+
+#ifdef HAVE_XORG_CONFIG_H
+#include <xorg-config.h>
+#endif
+
+#include <ctype.h>
+
+/* To prevent empty source file warnings */
+int _xf86misc;
+
+#if 0
+/* For use only with gcc */
+#ifdef __GNUC__
+
+#include "os.h"
+
+char *
+debug_alloca(char *file, int line, int size)
+{
+	char *ptr;
+
+	ptr = Xalloc(size);
+	ErrorF("Alloc: %s line %d; ptr = 0x%x, length = %d\n", file, line,
+	       ptr, size);
+	return ptr;
+}
+
+void
+debug_dealloca(char *file, int line, char *ptr)
+{
+	ErrorF("Dealloc: %s line %d; ptr = 0x%x\n", file, line, ptr);
+	Xfree(ptr);
+}
+#endif
+#endif
+
+#if defined(ISC) || defined(Lynx)
+
+#include <math.h>
+
+/* Needed for apm_driver.c */
+/* These functions are modeled after the functions inside gnu's libc */
+
+static double
+copysign(double x, double y)
+{
+	x = fabs(x);
+	return y < 0 ? - x : x;
+}
+
+double
+RInt(double x)
+{
+	double s,t;
+	const double one = 1.0;
+	const static double L = 4503599627370496.0E0;
+
+	if (x!=x)
+		return(x);
+	if (copysign(x,one) >= L)
+		return(x);
+	s = copysign(L,x);
+	t = x + s;
+	return (t - s);
+}
+#endif