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authorAdam Jackson <ajax@redhat.com>2016-10-30 20:16:53 +0100
committerMike Gabriel <mike.gabriel@das-netzwerkteam.de>2016-10-30 21:28:20 +0100
commitcc03502022467484c63e7da04c9bcdfef6957765 (patch)
tree88273695c019ca411066ad05acd538f8bf02b024 /nx-X11/programs/Xserver
parent3c0e426f0f0898904d1c4e3c9c35e98d585ce962 (diff)
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Death to mfb (removing last remnants from NX code).
commit f31bd087e8a7f65cd588bd1d022bb18e72b2a60c Author: Adam Jackson <ajax@redhat.com> Date: Fri Jun 13 10:35:07 2008 -0400 Death to mfb. Anyone still interested in 1 or 4 bpp framebuffers, talk to fb. Backported-to-NX-by: Mike Gabriel <mike.gabriel@das-netzwerkteam.de>
Diffstat (limited to 'nx-X11/programs/Xserver')
-rw-r--r--nx-X11/programs/Xserver/Imakefile33
-rw-r--r--nx-X11/programs/Xserver/fb/fb.h3
-rw-r--r--nx-X11/programs/Xserver/include/servermd.h164
-rw-r--r--nx-X11/programs/Xserver/mfb/maskbits.h689
4 files changed, 15 insertions, 874 deletions
diff --git a/nx-X11/programs/Xserver/Imakefile b/nx-X11/programs/Xserver/Imakefile
index c98e746cb..d851e5472 100644
--- a/nx-X11/programs/Xserver/Imakefile
+++ b/nx-X11/programs/Xserver/Imakefile
@@ -46,20 +46,9 @@ INSTPGMFLAGS =
#endif
#define PreFbLibs $(DIX) $(OS) $(XPDDX)
-#define PreFbLibsNoFont $(DIX) $(OS)
-#define BarePostFbLibs $(MFB) $(XPFBLIBS) $(MI)
+#define BarePostFbLibs $(XPFBLIBS) $(MI)
#define PostFbLibs BarePostFbLibs $(EXTENSIONS)
-#define NoMfbBarePostFbLibs $(XPFBLIBS) $(MI)
-#if !BuildXinerama
-#define NoMfbPostFbLibs NoMfbBarePostFbLibs $(EXTENSIONS)
-#else
-#define NoMfbPostFbLibs $(EXTENSIONS) NoMfbBarePostFbLibs $(EXTENSIONS)
-#endif
-#define MFBBareLibs PreFbLibs BarePostFbLibs
-#define NoMFBBareLibs PreFbLibs NoMfbBarePostFbLibs
-#define MFBLibs PreFbLibs PostFbLibs
-#define NoMFBLibs PreFbLibs NoMfbPostFbLibs
#define CFBLibs PreFbLibs $(CFB) PostFbLibs
#define CFB4Libs PreFbLibs $(CFB4) PostFbLibs
#define CFB8Libs PreFbLibs $(CFB8) PostFbLibs
@@ -67,9 +56,12 @@ INSTPGMFLAGS =
#define CFB24Libs PreFbLibs $(CFB24) PostFbLibs
#define CFB32Libs PreFbLibs $(CFB32) PostFbLibs
-#define NoMFBCFBLibs PreFbLibs $(CFB) NoMfbPostFbLibs
-#define NoMFBCFB8Libs PreFbLibs $(CFB8) NoMfbPostFbLibs
-#define FbPostFbLibs $(FB) NoMfbPostFbLibs
+#if !BuildXinerama
+#define FbPostFbLibs $(FB) BarePostFbLibs $(EXTENSIONS)
+#else
+#define FbPostFbLibs $(FB) $(EXTENSIONS) BarePostFbLibs $(EXTENSIONS)
+#endif
+
#define FBLibs PreFbLibs FbPostFbLibs
#define MiExtLibs $(SHADOW)
@@ -172,7 +164,6 @@ INSTPGMFLAGS =
OS = os/LibraryTargetName(os)
BSDEMUL = $(DEPXBSDLIB)
#if DoLoadableServer
- MFB = mfb/ModuleLibraryTargetName(mfb)
FB = fb/ModuleLibraryTargetName(fb)
#if XF8_32Wid
CFB = cfb/ModuleLibraryTargetName(cfb) \
@@ -199,7 +190,6 @@ INSTPGMFLAGS =
SHADOW = miext/shadow/ModuleLibraryTargetName(shadow)
LAYER = miext/layer/ModuleLibraryTargetName(layer)
#else
- MFB = mfb/LibraryTargetName(mfb)
FB = fb/LibraryTargetName(fb)
#if XF8_32Wid
CFB = cfb16/LibraryTargetName(cfb16) \
@@ -259,7 +249,6 @@ INSTPGMFLAGS =
#endif
STDDIRS = include dix os mi $(XPDDXDIR) $(EXTDIRS)
FBDIR = fb
- MFBDIR = mfb
CFB4DIR = cfb4
CFB8DIR = cfb
CFB16DIR = cfb16
@@ -278,8 +267,6 @@ XCOMM
/* Build rule blocks, add one for each server
*
- * If a server needs mfb, its build block should have a line like:
- * MFBSUBDIR = mfb
* Similarly, its build block should have:
* CFB4SUBDIR = cfb4 (if the server needs 4 bit cfb)
* CFB8SUBDIR = cfb (8 bit cfb)
@@ -309,7 +296,7 @@ NXWIN = NXWin
(!MakeDllModules && defined(NXWinServer) && NXWinServer)
MakeMutex($(NXAGENT) $(NXWIN))
#endif
-MakeMutex($(STDDIRS) mfb fb cfb cfb16 cfb24 cfb32)
+MakeMutex($(STDDIRS) fb cfb cfb16 cfb24 cfb32)
#endif
@@ -326,7 +313,7 @@ NXAGENTDDXDIR = hw/nxagent
NXAGENTDDXDIR = hw
#endif
-NXAGENTDIRS = $(STDDIRS) $(MFBDIR) $(FBDIR) $(MIDAMAGEDIR) $(NXAGENTDDXDIR) $(DEPDIRS)
+NXAGENTDIRS = $(STDDIRS) $(FBDIR) $(MIDAMAGEDIR) $(NXAGENTDDXDIR) $(DEPDIRS)
NX_XCOMP_HEADERS = \
../../../nxcomp/NXalert.h \
@@ -632,7 +619,7 @@ IPLANDIRS = $(IPLAN2P2DIR) $(IPLAN2P4DIR) $(IPLAN2P8DIR)
DDXDIRS = $(DECWSDDXDIR) $(SUNDDXDIR) $(LYNXDDXDIR) \
$(HPDDXDIR) $(XFREE86DDXDIR) \
$(NXAGENTDDXDIR) $(NXWINDDXDIR)
-SUBDIRS = $(STDDIRS) $(MFBSUBDIR) $(CFBSUBDIRS) \
+SUBDIRS = $(STDDIRS) $(CFBSUBDIRS) \
$(IPLANDIRS) $(ILBMDIR) $(AFBSUBDIR) \
$(DDXDIRS) $(FBSUBDIR) $(KDRIVEDIRS) $(MIEXTDIRS)
diff --git a/nx-X11/programs/Xserver/fb/fb.h b/nx-X11/programs/Xserver/fb/fb.h
index 317b57c5a..7c33562b4 100644
--- a/nx-X11/programs/Xserver/fb/fb.h
+++ b/nx-X11/programs/Xserver/fb/fb.h
@@ -66,9 +66,6 @@
#if GLYPHPADBYTES != 4
#error "GLYPHPADBYTES must be 4"
#endif
-#if GETLEFTBITS_ALIGNMENT != 1
-#error "GETLEFTBITS_ALIGNMENT must be 1"
-#endif
/* whether to bother to include 24bpp support */
#ifndef FBNO24BIT
#define FB_24BIT
diff --git a/nx-X11/programs/Xserver/include/servermd.h b/nx-X11/programs/Xserver/include/servermd.h
index 7652964d0..27b5a8fb9 100644
--- a/nx-X11/programs/Xserver/include/servermd.h
+++ b/nx-X11/programs/Xserver/include/servermd.h
@@ -49,6 +49,11 @@ SOFTWARE.
#define SERVERMD_H 1
/*
+ * Note: much of this is vestigial from mfb/cfb times. This should
+ * really be simplified even further.
+ */
+
+/*
* Machine dependent values:
* GLYPHPADBYTES should be chosen with consideration for the space-time
* trade-off. Padding to 0 bytes means that there is no wasted space
@@ -62,62 +67,6 @@ SOFTWARE.
* kept separate from this. See server/include/font.h for how
* GLYPHPADBYTES is used.
*
- * Along with this, you should choose an appropriate value for
- * GETLEFTBITS_ALIGNMENT, which is used in ddx/mfb/maskbits.h. This
- * constant choses what kind of memory references are guarenteed during
- * font access; either 1, 2 or 4, for byte, word or longword access,
- * respectively. For instance, if you have decided to to have
- * GLYPHPADBYTES == 4, then it is pointless for you to have a
- * GETLEFTBITS_ALIGNMENT > 1, because the padding of the fonts has already
- * guarenteed you that your fonts are longword aligned. On the other
- * hand, even if you have chosen GLYPHPADBYTES == 1 to save space, you may
- * also decide that the computing involved in aligning the pointer is more
- * costly than an odd-address access; you choose GETLEFTBITS_ALIGNMENT == 1.
- *
- * Next, choose the tuning parameters which are appropriate for your
- * hardware; these modify the behaviour of the raw frame buffer code
- * in ddx/mfb and ddx/cfb. Defining these incorrectly will not cause
- * the server to run incorrectly, but defining these correctly will
- * cause some noticeable speed improvements:
- *
- * AVOID_MEMORY_READ - (8-bit cfb only)
- * When stippling pixels on the screen (polytext and pushpixels),
- * don't read long words from the display and mask in the
- * appropriate values. Rather, perform multiple byte/short/long
- * writes as appropriate. This option uses many more instructions
- * but runs much faster when the destination is much slower than
- * the CPU and at least 1 level of write buffer is availible (2
- * is much better). Defined currently for SPARC and MIPS.
- *
- * FAST_CONSTANT_OFFSET_MODE - (cfb and mfb)
- * This define is used on machines which have no auto-increment
- * addressing mode, but do have an effectively free constant-offset
- * addressing mode. Currently defined for MIPS and SPARC, even though
- * I remember the cg6 as performing better without it (cg3 definitely
- * performs better with it).
- *
- * LARGE_INSTRUCTION_CACHE -
- * This define increases the number of times some loops are
- * unrolled. On 68020 machines (with 256 bytes of i-cache),
- * this define will slow execution down as instructions miss
- * the cache frequently. On machines with real i-caches, this
- * reduces loop overhead, causing a slight performance improvement.
- * Currently defined for MIPS and SPARC
- *
- * FAST_UNALIGNED_READS -
- * For machines with more memory bandwidth than CPU, this
- * define uses unaligned reads for 8-bit BitBLT instead of doing
- * aligned reads and combining the results with shifts and
- * logical-ors. Currently defined for 68020 and vax.
- * PLENTIFUL_REGISTERS -
- * For machines with > 20 registers. Currently used for
- * unrolling the text painting code a bit more. Currently
- * defined for MIPS.
- * SHARED_IDCACHE -
- * For non-Harvard RISC machines, those which share the same
- * CPU memory bus for instructions and data. This unrolls some
- * solid fill loops which are otherwise best left rolled up.
- * Currently defined for SPARC.
*/
#ifdef vax
@@ -125,8 +74,6 @@ SOFTWARE.
#define IMAGE_BYTE_ORDER LSBFirst /* Values for the VAX only */
#define BITMAP_BIT_ORDER LSBFirst
#define GLYPHPADBYTES 1
-#define GETLEFTBITS_ALIGNMENT 4
-#define FAST_UNALIGNED_READS
#endif /* vax */
@@ -145,9 +92,6 @@ SOFTWARE.
# endif
#define GLYPHPADBYTES 4
-#define GETLEFTBITS_ALIGNMENT 1
-#define LARGE_INSTRUCTION_CACHE
-#define AVOID_MEMORY_READ
#endif /* __arm32__ */
@@ -167,9 +111,6 @@ SOFTWARE.
# endif
#define GLYPHPADBYTES 4
-#define GETLEFTBITS_ALIGNMENT 1
-#define LARGE_INSTRUCTION_CACHE
-#define AVOID_MEMORY_READ
#endif /* __aarch64__ */
@@ -178,12 +119,6 @@ SOFTWARE.
#define IMAGE_BYTE_ORDER MSBFirst
#define BITMAP_BIT_ORDER MSBFirst
#define GLYPHPADBYTES 4 /* to make fb work */
-#define GETLEFTBITS_ALIGNMENT 1 /* PA forces longs to 4 */
- /* byte boundries */
-#define AVOID_MEMORY_READ
-#define FAST_CONSTANT_OFFSET_MODE
-#define LARGE_INSTRUCTION_CACHE
-#define PLENTIFUL_REGISTERS
#endif /* hpux || __hppa__ */
@@ -192,20 +127,12 @@ SOFTWARE.
#define IMAGE_BYTE_ORDER MSBFirst
#define BITMAP_BIT_ORDER MSBFirst
#define GLYPHPADBYTES 4
-#define GETLEFTBITS_ALIGNMENT 1
/* XXX Should this be for Lynx only? */
#ifdef Lynx
#define BITMAP_SCANLINE_UNIT 8
#endif
-#define LARGE_INSTRUCTION_CACHE
-#define FAST_CONSTANT_OFFSET_MODE
-#define PLENTIFUL_REGISTERS
-#define AVOID_MEMORY_READ
-
-#define FAST_MEMCPY
-
#endif /* PowerPC */
#if defined(__sh__)
@@ -214,19 +141,12 @@ SOFTWARE.
# define IMAGE_BYTE_ORDER MSBFirst
# define BITMAP_BIT_ORDER MSBFirst
# define GLYPHPADBYTES 4
-# define GETLEFTBITS_ALIGNMENT 1
#else
# define IMAGE_BYTE_ORDER LSBFirst
# define BITMAP_BIT_ORDER LSBFirst
# define GLYPHPADBYTES 4
-# define GETLEFTBITS_ALIGNMENT 1
#endif
-#define AVOID_MEMORY_READ
-#define FAST_CONSTANT_OFFSET_MODE
-#define LARGE_INSTRUCTION_CACHE
-#define PLENTIFUL_REGISTERS
-
#endif /* SuperH */
@@ -248,19 +168,7 @@ SOFTWARE.
# define BITMAP_BIT_ORDER MSBFirst
#endif
-#ifdef sparc
-# define AVOID_MEMORY_READ
-# define LARGE_INSTRUCTION_CACHE
-# define FAST_CONSTANT_OFFSET_MODE
-# define SHARED_IDCACHE
-#endif
-
-#ifdef mc68020
-#define FAST_UNALIGNED_READS
-#endif
-
#define GLYPHPADBYTES 4
-#define GETLEFTBITS_ALIGNMENT 1
#endif /* sun && !(i386 && SVR4) */
@@ -270,14 +178,7 @@ SOFTWARE.
#define IMAGE_BYTE_ORDER MSBFirst /* Values for the RISC/6000 */
#define BITMAP_BIT_ORDER MSBFirst
#define GLYPHPADBYTES 4
-#define GETLEFTBITS_ALIGNMENT 1
-
-#define LARGE_INSTRUCTION_CACHE
-#define FAST_CONSTANT_OFFSET_MODE
-#define PLENTIFUL_REGISTERS
-#define AVOID_MEMORY_READ
-#define FAST_MEMCPY
#endif /* AIXV3 */
#if defined(ibm032) || defined (ibm)
@@ -289,7 +190,6 @@ SOFTWARE.
#endif
#define BITMAP_BIT_ORDER MSBFirst
#define GLYPHPADBYTES 1
-#define GETLEFTBITS_ALIGNMENT 4
/* ibm pcc doesn't understand pragmas. */
#ifdef i386
@@ -303,9 +203,6 @@ SOFTWARE.
#define IMAGE_BYTE_ORDER MSBFirst /* Values for Pegasus only */
#define BITMAP_BIT_ORDER MSBFirst
#define GLYPHPADBYTES 4
-#define GETLEFTBITS_ALIGNMENT 1
-
-#define FAST_UNALIGNED_READS
#endif /* tektronix */
@@ -314,9 +211,6 @@ SOFTWARE.
#define IMAGE_BYTE_ORDER MSBFirst /* Values for the MacII only */
#define BITMAP_BIT_ORDER MSBFirst
#define GLYPHPADBYTES 4
-#define GETLEFTBITS_ALIGNMENT 1
-
-/* might want FAST_UNALIGNED_READS for frame buffers with < 1us latency */
#endif /* macII */
@@ -326,19 +220,12 @@ SOFTWARE.
# define IMAGE_BYTE_ORDER LSBFirst /* Values for the PMAX only */
# define BITMAP_BIT_ORDER LSBFirst
# define GLYPHPADBYTES 4
-# define GETLEFTBITS_ALIGNMENT 1
#else
# define IMAGE_BYTE_ORDER MSBFirst /* Values for the MIPS only */
# define BITMAP_BIT_ORDER MSBFirst
# define GLYPHPADBYTES 4
-# define GETLEFTBITS_ALIGNMENT 1
#endif
-#define AVOID_MEMORY_READ
-#define FAST_CONSTANT_OFFSET_MODE
-#define LARGE_INSTRUCTION_CACHE
-#define PLENTIFUL_REGISTERS
-
#endif /* mips */
#if defined(__alpha) || defined(__alpha__) || defined(__alphaCross)
@@ -355,10 +242,6 @@ SOFTWARE.
# endif
# define GLYPHPADBYTES 4
-# define GETLEFTBITS_ALIGNMENT 1
-# define FAST_CONSTANT_OFFSET_MODE
-# define LARGE_INSTRUCTION_CACHE
-# define PLENTIFUL_REGISTERS
#endif /* alpha */
@@ -367,14 +250,8 @@ SOFTWARE.
#define IMAGE_BYTE_ORDER MSBFirst
#define BITMAP_BIT_ORDER MSBFirst
#define GLYPHPADBYTES 4
-#define GETLEFTBITS_ALIGNMENT 1
#define BITMAP_SCANLINE_UNIT 8
-#define LARGE_INSTRUCTION_CACHE
-#define FAST_CONSTANT_OFFSET_MODE
-#define FAST_UNALIGNED_READ
-
-#define FAST_MEMCPY
#endif /* linux/s390 */
@@ -383,14 +260,9 @@ SOFTWARE.
#define IMAGE_BYTE_ORDER MSBFirst
#define BITMAP_BIT_ORDER MSBFirst
#define GLYPHPADBYTES 4
-#define GETLEFTBITS_ALIGNMENT 1
#define BITMAP_SCANLINE_UNIT 8
-#define LARGE_INSTRUCTION_CACHE
-#define FAST_CONSTANT_OFFSET_MODE
-#define FAST_UNALIGNED_READ
-#define FAST_MEMCPY
#endif /* linux/s390x */
@@ -408,10 +280,6 @@ SOFTWARE.
# endif
# define GLYPHPADBYTES 4
-# define GETLEFTBITS_ALIGNMENT 1
-# define FAST_CONSTANT_OFFSET_MODE
-# define LARGE_INSTRUCTION_CACHE
-# define PLENTIFUL_REGISTERS
#endif /* ia64 */
@@ -429,11 +297,7 @@ SOFTWARE.
# endif
# define GLYPHPADBYTES 4
-# define GETLEFTBITS_ALIGNMENT 1
-# define LARGE_INSTRUCTION_CACHE
-# define FAST_CONSTANT_OFFSET_MODE
/* ???? */
-# define FAST_UNALIGNED_READS
#endif /* AMD64 */
#ifdef stellar
@@ -441,7 +305,6 @@ SOFTWARE.
#define IMAGE_BYTE_ORDER MSBFirst /* Values for the stellar only*/
#define BITMAP_BIT_ORDER MSBFirst
#define GLYPHPADBYTES 4
-#define GETLEFTBITS_ALIGNMENT 4
#define IMAGE_BUFSIZE (64*1024)
/*
* Use SysV random number generator.
@@ -455,13 +318,8 @@ SOFTWARE.
#define IMAGE_BYTE_ORDER MSBFirst /* Values for the OMRON only*/
#define BITMAP_BIT_ORDER MSBFirst
#define GLYPHPADBYTES 4
-#define GETLEFTBITS_ALIGNMENT 1
#ifndef mc68000
-#define FAST_CONSTANT_OFFSET_MODE
-#define AVOID_MEMORY_READ
-#define LARGE_INSTRUCTION_CACHE
-#define PLENTIFUL_REGISTERS
#endif
#endif /* luna */
@@ -496,12 +354,8 @@ SOFTWARE.
#define GLYPHPADBYTES 4
#endif
-#define GETLEFTBITS_ALIGNMENT 1
-#define AVOID_MEMORY_READ
#ifdef XSVGA
#define AVOID_GLYPHBLT
-#define FAST_CONSTANT_OFFSET_MODE
-#define FAST_MEMCPY
#define NO_ONE_RECT
#endif
@@ -511,9 +365,7 @@ SOFTWARE.
#define IMAGE_BYTE_ORDER MSBFirst
#define BITMAP_BIT_ORDER MSBFirst
-#define FAST_UNALIGNED_READS
#define GLYPHPADBYTES 4
-#define GETLEFTBITS_ALIGNMENT 1
#endif /* linux/m68k */
@@ -522,11 +374,6 @@ SOFTWARE.
#define IMAGE_BYTE_ORDER MSBFirst
#define BITMAP_BIT_ORDER MSBFirst
#define GLYPHPADBYTES 4
-#define GETLEFTBITS_ALIGNMENT 1
-#define AVOID_MEMORY_READ
-#define FAST_CONSTANT_OFFSET_MODE
-#define LARGE_INSTRUCTION_CACHE
-#define PLENTIFUL_REGISTERS
#endif
@@ -535,7 +382,6 @@ SOFTWARE.
#define IMAGE_BYTE_ORDER LSBFirst
#define BITMAP_BIT_ORDER LSBFirst
#define GLYPHPADBYTES 4
-#define GETLEFTBITS_ALIGNMENT 1
#endif
/* size of buffer to use with GetImage, measured in bytes. There's obviously
diff --git a/nx-X11/programs/Xserver/mfb/maskbits.h b/nx-X11/programs/Xserver/mfb/maskbits.h
deleted file mode 100644
index 997e412ea..000000000
--- a/nx-X11/programs/Xserver/mfb/maskbits.h
+++ /dev/null
@@ -1,689 +0,0 @@
-/* Combined Purdue/PurduePlus patches, level 2.1, 1/24/89 */
-/***********************************************************
-Copyright 1987 by Digital Equipment Corporation, Maynard, Massachusetts.
-
- All Rights Reserved
-
-Permission to use, copy, modify, and distribute this software and its
-documentation for any purpose and without fee is hereby granted,
-provided that the above copyright notice appear in all copies and that
-both that copyright notice and this permission notice appear in
-supporting documentation, and that the name of Digital not be
-used in advertising or publicity pertaining to distribution of the
-software without specific, written prior permission.
-
-DIGITAL DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, INCLUDING
-ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO EVENT SHALL
-DIGITAL BE LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR
-ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS,
-WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,
-ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS
-SOFTWARE.
-
-******************************************************************/
-
-#ifdef HAVE_DIX_CONFIG_H
-#include <dix-config.h>
-#endif
-
-#include <nx-X11/X.h>
-#include <nx-X11/Xmd.h>
-#include "servermd.h"
-
-
-/* the following notes use the following conventions:
-SCREEN LEFT SCREEN RIGHT
-in this file and maskbits.c, left and right refer to screen coordinates,
-NOT bit numbering in registers.
-
-starttab[n]
- bits[0,n-1] = 0 bits[n,PLST] = 1
-endtab[n] =
- bits[0,n-1] = 1 bits[n,PLST] = 0
-
-startpartial[], endpartial[]
- these are used as accelerators for doing putbits and masking out
-bits that are all contained between longword boudaries. the extra
-256 bytes of data seems a small price to pay -- code is smaller,
-and narrow things (e.g. window borders) go faster.
-
-the names may seem misleading; they are derived not from which end
-of the word the bits are turned on, but at which end of a scanline
-the table tends to be used.
-
-look at the tables and macros to understand boundary conditions.
-(careful readers will note that starttab[n] = ~endtab[n] for n != 0)
-
------------------------------------------------------------------------
-these two macros depend on the screen's bit ordering.
-in both of them x is a screen position. they are used to
-combine bits collected from multiple longwords into a
-single destination longword, and to unpack a single
-source longword into multiple destinations.
-
-SCRLEFT(dst, x)
- takes dst[x, PPW] and moves them to dst[0, PPW-x]
- the contents of the rest of dst are 0.
- this is a right shift on LSBFirst (forward-thinking)
- machines like the VAX, and left shift on MSBFirst
- (backwards) machines like the 680x0 and pc/rt.
-
-SCRRIGHT(dst, x)
- takes dst[0,x] and moves them to dst[PPW-x, PPW]
- the contents of the rest of dst are 0.
- this is a left shift on LSBFirst, right shift
- on MSBFirst.
-
-
-the remaining macros are cpu-independent; all bit order dependencies
-are built into the tables and the two macros above.
-
-maskbits(x, w, startmask, endmask, nlw)
- for a span of width w starting at position x, returns
-a mask for ragged bits at start, mask for ragged bits at end,
-and the number of whole longwords between the ends.
-
-maskpartialbits(x, w, mask)
- works like maskbits(), except all the bits are in the
- same longword (i.e. (x&PIM + w) <= PPW)
-
-maskPPWbits(x, w, startmask, endmask, nlw)
- as maskbits, but does not calculate nlw. it is used by
- mfbGlyphBlt to put down glyphs <= PPW bits wide.
-
--------------------------------------------------------------------
-
-NOTE
- any pointers passed to the following 4 macros are
- guranteed to be PPW-bit aligned.
- The only non-PPW-bit-aligned references ever made are
- to font glyphs, and those are made with getleftbits()
- and getshiftedleftbits (qq.v.)
-
- For 64-bit server, it is assumed that we will never have font padding
- of more than 4 bytes. The code uses int's to access the fonts
- intead of longs.
-
-getbits(psrc, x, w, dst)
- starting at position x in psrc (x < PPW), collect w
- bits and put them in the screen left portion of dst.
- psrc is a longword pointer. this may span longword boundaries.
- it special-cases fetching all w bits from one longword.
-
- +--------+--------+ +--------+
- | | m |n| | ==> | m |n| |
- +--------+--------+ +--------+
- x x+w 0 w
- psrc psrc+1 dst
- m = PPW - x
- n = w - m
-
- implementation:
- get m bits, move to screen-left of dst, zeroing rest of dst;
- get n bits from next word, move screen-right by m, zeroing
- lower m bits of word.
- OR the two things together.
-
-putbits(src, x, w, pdst)
- starting at position x in pdst, put down the screen-leftmost
- w bits of src. pdst is a longword pointer. this may
- span longword boundaries.
- it special-cases putting all w bits into the same longword.
-
- +--------+ +--------+--------+
- | m |n| | ==> | | m |n| |
- +--------+ +--------+--------+
- 0 w x x+w
- dst pdst pdst+1
- m = PPW - x
- n = w - m
-
- implementation:
- get m bits, shift screen-right by x, zero screen-leftmost x
- bits; zero rightmost m bits of *pdst and OR in stuff
- from before the semicolon.
- shift src screen-left by m, zero bits n-PPW;
- zero leftmost n bits of *(pdst+1) and OR in the
- stuff from before the semicolon.
-
-putbitsrop(src, x, w, pdst, ROP)
- like putbits but calls DoRop with the rasterop ROP (see mfb.h for
- DoRop)
-
-putbitsrrop(src, x, w, pdst, ROP)
- like putbits but calls DoRRop with the reduced rasterop ROP
- (see mfb.h for DoRRop)
-
------------------------------------------------------------------------
- The two macros below are used only for getting bits from glyphs
-in fonts, and glyphs in fonts are gotten only with the following two
-mcros.
- You should tune these macros toyour font format and cpu
-byte ordering.
-
-NOTE
-getleftbits(psrc, w, dst)
- get the leftmost w (w<=32) bits from *psrc and put them
- in dst. this is used by the mfbGlyphBlt code for glyphs
- <=PPW bits wide.
- psrc is declared (unsigned char *)
-
- psrc is NOT guaranteed to be PPW-bit aligned. on many
- machines this will cause problems, so there are several
- versions of this macro.
-
- this macro is called ONLY for getting bits from font glyphs,
- and depends on the server-natural font padding.
-
- for blazing text performance, you want this macro
- to touch memory as infrequently as possible (e.g.
- fetch longwords) and as efficiently as possible
- (e.g. don't fetch misaligned longwords)
-
-getshiftedleftbits(psrc, offset, w, dst)
- used by the font code; like getleftbits, but shifts the
- bits SCRLEFT by offset.
- this is implemented portably, calling getleftbits()
- and SCRLEFT().
- psrc is declared (unsigned char *).
-*/
-
-/* to match CFB and allow algorithm sharing ...
- * name mfb32 mfb64 explanation
- * ---- ------ ----- -----------
- * PGSZ 32 64 pixel group size (in bits; same as PPW for mfb)
- * PGSZB 4 8 pixel group size (in bytes)
- * PPW 32 64 pixels per word (pixels per pixel group)
- * PLST 31 63 index of last pixel in a word (should be PPW-1)
- * PIM 0x1f 0x3f pixel index mask (index within a pixel group)
- * PWSH 5 6 pixel-to-word shift (should be log2(PPW))
- *
- * The MFB_ versions are here so that cfb can include maskbits.h to get
- * the bitmap constants without conflicting with its own P* constants.
- *
- * Keith Packard (keithp@suse.com):
- * Note mfb64 is no longer supported; it requires DIX support
- * for realigning images which costs too much
- */
-
-/* warning: PixelType definition duplicated in mfb.h */
-#ifndef PixelType
-#define PixelType CARD32
-#endif /* PixelType */
-#ifndef MfbBits
-#define MfbBits CARD32
-#endif
-
-#define MFB_PGSZB 4
-#define MFB_PPW (MFB_PGSZB<<3) /* assuming 8 bits per byte */
-#define MFB_PGSZ MFB_PPW
-#define MFB_PLST (MFB_PPW-1)
-#define MFB_PIM MFB_PLST
-
-/* set PWSH = log2(PPW) using brute force */
-
-#if MFB_PPW == 32
-#define MFB_PWSH 5
-#endif /* MFB_PPW == 32 */
-
-/* XXX don't use these five */
-extern PixelType starttab[];
-extern PixelType endtab[];
-extern PixelType partmasks[MFB_PPW][MFB_PPW];
-extern PixelType rmask[];
-extern PixelType mask[];
-/* XXX use these five */
-extern PixelType mfbGetstarttab(int);
-extern PixelType mfbGetendtab(int);
-extern PixelType mfbGetpartmasks(int, int);
-extern PixelType mfbGetrmask(int);
-extern PixelType mfbGetmask(int);
-
-#ifndef MFB_CONSTS_ONLY
-
-#define PGSZB MFB_PGSZB
-#define PPW MFB_PPW
-#define PGSZ MFB_PGSZ
-#define PLST MFB_PLST
-#define PIM MFB_PIM
-#define PWSH MFB_PWSH
-
-#define BitLeft(b,s) SCRLEFT(b,s)
-#define BitRight(b,s) SCRRIGHT(b,s)
-
-#ifdef XFree86Server
-#define LONG2CHARSSAMEORDER(x) ((MfbBits)(x))
-#define LONG2CHARSDIFFORDER( x ) ( ( ( ( x ) & (MfbBits)0x000000FF ) << 0x18 ) \
- | ( ( ( x ) & (MfbBits)0x0000FF00 ) << 0x08 ) \
- | ( ( ( x ) & (MfbBits)0x00FF0000 ) >> 0x08 ) \
- | ( ( ( x ) & (MfbBits)0xFF000000 ) >> 0x18 ) )
-#endif /* XFree86Server */
-
-#if (BITMAP_BIT_ORDER == IMAGE_BYTE_ORDER)
-#define LONG2CHARS(x) ((MfbBits)(x))
-#else
-/*
- * the unsigned case below is for compilers like
- * the Danbury C and i386cc
- */
-#define LONG2CHARS( x ) ( ( ( ( x ) & (MfbBits)0x000000FF ) << 0x18 ) \
- | ( ( ( x ) & (MfbBits)0x0000FF00 ) << 0x08 ) \
- | ( ( ( x ) & (MfbBits)0x00FF0000 ) >> 0x08 ) \
- | ( ( ( x ) & (MfbBits)0xFF000000 ) >> 0x18 ) )
-#endif /* BITMAP_BIT_ORDER */
-
-#ifdef STRICT_ANSI_SHIFT
-#define SHL(x,y) ((y) >= PPW ? 0 : LONG2CHARS(LONG2CHARS(x) << (y)))
-#define SHR(x,y) ((y) >= PPW ? 0 : LONG2CHARS(LONG2CHARS(x) >> (y)))
-#else
-#define SHL(x,y) LONG2CHARS(LONG2CHARS(x) << (y))
-#define SHR(x,y) LONG2CHARS(LONG2CHARS(x) >> (y))
-#endif
-
-#if (BITMAP_BIT_ORDER == MSBFirst) /* pc/rt, 680x0 */
-#define SCRLEFT(lw, n) SHL((PixelType)(lw),(n))
-#define SCRRIGHT(lw, n) SHR((PixelType)(lw),(n))
-#else /* vax, intel */
-#define SCRLEFT(lw, n) SHR((PixelType)(lw),(n))
-#define SCRRIGHT(lw, n) SHL((PixelType)(lw),(n))
-#endif
-
-#define DoRRop(alu, src, dst) \
-(((alu) == RROP_BLACK) ? ((dst) & ~(src)) : \
- ((alu) == RROP_WHITE) ? ((dst) | (src)) : \
- ((alu) == RROP_INVERT) ? ((dst) ^ (src)) : \
- (dst))
-
-/* A generalized form of a x4 Duff's Device */
-#define Duff(counter, block) { \
- while (counter >= 4) {\
- { block; } \
- { block; } \
- { block; } \
- { block; } \
- counter -= 4; \
- } \
- switch (counter & 3) { \
- case 3: { block; } \
- case 2: { block; } \
- case 1: { block; } \
- case 0: \
- counter = 0; \
- } \
-}
-
-#define maskbits(x, w, startmask, endmask, nlw) \
- startmask = mfbGetstarttab((x) & PIM); \
- endmask = mfbGetendtab(((x)+(w)) & PIM); \
- if (startmask) \
- nlw = (((w) - (PPW - ((x) & PIM))) >> PWSH); \
- else \
- nlw = (w) >> PWSH;
-
-#define maskpartialbits(x, w, mask) \
- mask = mfbGetpartmasks((x) & PIM, (w) & PIM);
-
-#define maskPPWbits(x, w, startmask, endmask) \
- startmask = mfbGetstarttab((x) & PIM); \
- endmask = mfbGetendtab(((x)+(w)) & PIM);
-
-#ifdef __GNUC__ /* XXX don't want for Alpha? */
-#ifdef vax
-#define FASTGETBITS(psrc,x,w,dst) \
- __asm ("extzv %1,%2,%3,%0" \
- : "=g" (dst) \
- : "g" (x), "g" (w), "m" (*(char *)(psrc)))
-#define getbits(psrc,x,w,dst) FASTGETBITS(psrc,x,w,dst)
-
-#define FASTPUTBITS(src, x, w, pdst) \
- __asm ("insv %3,%1,%2,%0" \
- : "=m" (*(char *)(pdst)) \
- : "g" (x), "g" (w), "g" (src))
-#define putbits(src, x, w, pdst) FASTPUTBITS(src, x, w, pdst)
-#endif /* vax */
-#ifdef mc68020
-#define FASTGETBITS(psrc, x, w, dst) \
- __asm ("bfextu %3{%1:%2},%0" \
- : "=d" (dst) : "di" (x), "di" (w), "o" (*(char *)(psrc)))
-
-#define getbits(psrc,x,w,dst) \
-{ \
- FASTGETBITS(psrc, x, w, dst);\
- dst = SHL(dst,(32-(w))); \
-}
-
-#define FASTPUTBITS(src, x, w, pdst) \
- __asm ("bfins %3,%0{%1:%2}" \
- : "=o" (*(char *)(pdst)) \
- : "di" (x), "di" (w), "d" (src), "0" (*(char *) (pdst)))
-
-#define putbits(src, x, w, pdst) FASTPUTBITS(SHR((src),32-(w)), x, w, pdst)
-
-#endif /* mc68020 */
-#endif /* __GNUC__ */
-
-/* The following flag is used to override a bugfix for sun 3/60+CG4 machines,
- */
-
-/* We don't need to be careful about this unless we're dealing with sun3's
- * We will default its usage for those who do not know anything, but will
- * override its effect if the machine doesn't look like a sun3
- */
-#if !defined(mc68020) || !defined(sun)
-#define NO_3_60_CG4
-#endif
-
-/* This is gross. We want to #define u_putbits as something which can be used
- * in the case of the 3/60+CG4, but if we use /bin/cc or are on another
- * machine type, we want nothing to do with u_putbits. What a hastle. Here
- * I used slo_putbits as something which either u_putbits or putbits could be
- * defined as.
- *
- * putbits gets it iff it is not already defined with FASTPUTBITS above.
- * u_putbits gets it if we have FASTPUTBITS (putbits) from above and have not
- * overridden the NO_3_60_CG4 flag.
- */
-
-#define slo_putbits(src, x, w, pdst) \
-{ \
- register int n = (x)+(w)-PPW; \
- \
- if (n <= 0) \
- { \
- register PixelType tmpmask; \
- maskpartialbits((x), (w), tmpmask); \
- *(pdst) = (*(pdst) & ~tmpmask) | \
- (SCRRIGHT(src, x) & tmpmask); \
- } \
- else \
- { \
- register int d = PPW-(x); \
- *(pdst) = (*(pdst) & mfbGetendtab(x)) | (SCRRIGHT((src), x)); \
- (pdst)[1] = ((pdst)[1] & mfbGetstarttab(n)) | \
- (SCRLEFT(src, d) & mfbGetendtab(n)); \
- } \
-}
-
-#if defined(putbits) && !defined(NO_3_60_CG4)
-#define u_putbits(src, x, w, pdst) slo_putbits(src, x, w, pdst)
-#else
-#define u_putbits(src, x, w, pdst) putbits(src, x, w, pdst)
-#endif
-
-#if !defined(putbits)
-#define putbits(src, x, w, pdst) slo_putbits(src, x, w, pdst)
-#endif
-
-/* Now if we have not gotten any really good bitfield macros, try some
- * moderately fast macros. Alas, I don't know how to do asm instructions
- * without gcc.
- */
-
-#ifndef getbits
-#define getbits(psrc, x, w, dst) \
-{ \
- dst = SCRLEFT(*(psrc), (x)); \
- if ( ((x) + (w)) > PPW) \
- dst |= (SCRRIGHT(*((psrc)+1), PPW-(x))); \
-}
-#endif
-
-/* We have to special-case putbitsrop because of 3/60+CG4 combos
- */
-
-#define u_putbitsrop(src, x, w, pdst, rop) \
-{\
- register PixelType t1, t2; \
- register int n = (x)+(w)-PPW; \
- \
- t1 = SCRRIGHT((src), (x)); \
- DoRop(t2, rop, t1, *(pdst)); \
- \
- if (n <= 0) \
- { \
- register PixelType tmpmask; \
- \
- maskpartialbits((x), (w), tmpmask); \
- *(pdst) = (*(pdst) & ~tmpmask) | (t2 & tmpmask); \
- } \
- else \
- { \
- int m = PPW-(x); \
- *(pdst) = (*(pdst) & mfbGetendtab(x)) | (t2 & mfbGetstarttab(x)); \
- t1 = SCRLEFT((src), m); \
- DoRop(t2, rop, t1, (pdst)[1]); \
- (pdst)[1] = ((pdst)[1] & mfbGetstarttab(n)) | (t2 & mfbGetendtab(n)); \
- } \
-}
-
-/* If our getbits and putbits are FAST enough,
- * do this brute force, it's faster
- */
-
-#if defined(FASTPUTBITS) && defined(FASTGETBITS) && defined(NO_3_60_CG4)
-#if (BITMAP_BIT_ORDER == MSBFirst)
-#define putbitsrop(src, x, w, pdst, rop) \
-{ \
- register PixelType _tmp, _tmp2; \
- FASTGETBITS(pdst, x, w, _tmp); \
- _tmp2 = SCRRIGHT(src, PPW-(w)); \
- DoRop(_tmp, rop, _tmp2, _tmp) \
- FASTPUTBITS(_tmp, x, w, pdst); \
-}
-#define putbitsrrop(src, x, w, pdst, rop) \
-{ \
- register PixelType _tmp, _tmp2; \
- \
- FASTGETBITS(pdst, x, w, _tmp); \
- _tmp2 = SCRRIGHT(src, PPW-(w)); \
- _tmp= DoRRop(rop, _tmp2, _tmp); \
- FASTPUTBITS(_tmp, x, w, pdst); \
-}
-#undef u_putbitsrop
-#else
-#define putbitsrop(src, x, w, pdst, rop) \
-{ \
- register PixelType _tmp; \
- FASTGETBITS(pdst, x, w, _tmp); \
- DoRop(_tmp, rop, src, _tmp) \
- FASTPUTBITS(_tmp, x, w, pdst); \
-}
-#define putbitsrrop(src, x, w, pdst, rop) \
-{ \
- register PixelType _tmp; \
- \
- FASTGETBITS(pdst, x, w, _tmp); \
- _tmp= DoRRop(rop, src, _tmp); \
- FASTPUTBITS(_tmp, x, w, pdst); \
-}
-#undef u_putbitsrop
-#endif
-#endif
-
-#ifndef putbitsrop
-#define putbitsrop(src, x, w, pdst, rop) u_putbitsrop(src, x, w, pdst, rop)
-#endif
-
-#ifndef putbitsrrop
-#define putbitsrrop(src, x, w, pdst, rop) \
-{\
- register PixelType t1, t2; \
- register int n = (x)+(w)-PPW; \
- \
- t1 = SCRRIGHT((src), (x)); \
- t2 = DoRRop(rop, t1, *(pdst)); \
- \
- if (n <= 0) \
- { \
- register PixelType tmpmask; \
- \
- maskpartialbits((x), (w), tmpmask); \
- *(pdst) = (*(pdst) & ~tmpmask) | (t2 & tmpmask); \
- } \
- else \
- { \
- int m = PPW-(x); \
- *(pdst) = (*(pdst) & mfbGetendtab(x)) | (t2 & mfbGetstarttab(x)); \
- t1 = SCRLEFT((src), m); \
- t2 = DoRRop(rop, t1, (pdst)[1]); \
- (pdst)[1] = ((pdst)[1] & mfbGetstarttab(n)) | (t2 & mfbGetendtab(n)); \
- } \
-}
-#endif
-
-#if GETLEFTBITS_ALIGNMENT == 1
-#define getleftbits(psrc, w, dst) dst = *((CARD32 *)(void *) psrc)
-#endif /* GETLEFTBITS_ALIGNMENT == 1 */
-
-#if GETLEFTBITS_ALIGNMENT == 2
-#define getleftbits(psrc, w, dst) \
- { \
- if ( ((int)(psrc)) & 0x01 ) \
- getbits( ((CARD32 *)(((char *)(psrc))-1)), 8, (w), (dst) ); \
- else \
- getbits(psrc, 0, w, dst); \
- }
-#endif /* GETLEFTBITS_ALIGNMENT == 2 */
-
-#if GETLEFTBITS_ALIGNMENT == 4
-#define getleftbits(psrc, w, dst) \
- { \
- int off, off_b; \
- off_b = (off = ( ((int)(psrc)) & 0x03)) << 3; \
- getbits( \
- (CARD32 *)( ((char *)(psrc)) - off), \
- (off_b), (w), (dst) \
- ); \
- }
-#endif /* GETLEFTBITS_ALIGNMENT == 4 */
-
-
-#define getshiftedleftbits(psrc, offset, w, dst) \
- getleftbits((psrc), (w), (dst)); \
- dst = SCRLEFT((dst), (offset));
-
-/* FASTGETBITS and FASTPUTBITS are not necessarily correct implementations of
- * getbits and putbits, but they work if used together.
- *
- * On a MSBFirst machine, a cpu bitfield extract instruction (like bfextu)
- * could normally assign its result to a 32-bit word register in the screen
- * right position. This saves canceling register shifts by not fighting the
- * natural cpu byte order.
- *
- * Unfortunately, these fail on a 3/60+CG4 and cannot be used unmodified. Sigh.
- */
-#if defined(FASTGETBITS) && defined(FASTPUTBITS)
-#ifdef NO_3_60_CG4
-#define u_FASTPUT(aa, bb, cc, dd) FASTPUTBITS(aa, bb, cc, dd)
-#else
-#define u_FASTPUT(aa, bb, cc, dd) u_putbits(SCRLEFT(aa, PPW-(cc)), bb, cc, dd)
-#endif
-
-#define getandputbits(psrc, srcbit, dstbit, width, pdst) \
-{ \
- register PixelType _tmpbits; \
- FASTGETBITS(psrc, srcbit, width, _tmpbits); \
- u_FASTPUT(_tmpbits, dstbit, width, pdst); \
-}
-
-#define getandputrop(psrc, srcbit, dstbit, width, pdst, rop) \
-{ \
- register PixelType _tmpsrc, _tmpdst; \
- FASTGETBITS(pdst, dstbit, width, _tmpdst); \
- FASTGETBITS(psrc, srcbit, width, _tmpsrc); \
- DoRop(_tmpdst, rop, _tmpsrc, _tmpdst); \
- u_FASTPUT(_tmpdst, dstbit, width, pdst); \
-}
-
-#define getandputrrop(psrc, srcbit, dstbit, width, pdst, rop) \
-{ \
- register PixelType _tmpsrc, _tmpdst; \
- FASTGETBITS(pdst, dstbit, width, _tmpdst); \
- FASTGETBITS(psrc, srcbit, width, _tmpsrc); \
- _tmpdst = DoRRop(rop, _tmpsrc, _tmpdst); \
- u_FASTPUT(_tmpdst, dstbit, width, pdst); \
-}
-
-#define getandputbits0(psrc, srcbit, width, pdst) \
- getandputbits(psrc, srcbit, 0, width, pdst)
-
-#define getandputrop0(psrc, srcbit, width, pdst, rop) \
- getandputrop(psrc, srcbit, 0, width, pdst, rop)
-
-#define getandputrrop0(psrc, srcbit, width, pdst, rop) \
- getandputrrop(psrc, srcbit, 0, width, pdst, rop)
-
-
-#else /* Slow poke */
-
-/* pairs of getbits/putbits happen frequently. Some of the code can
- * be shared or avoided in a few specific instances. It gets us a
- * small advantage, so we do it. The getandput...0 macros are the only ones
- * which speed things here. The others are here for compatibility w/the above
- * FAST ones
- */
-
-#define getandputbits(psrc, srcbit, dstbit, width, pdst) \
-{ \
- register PixelType _tmpbits; \
- getbits(psrc, srcbit, width, _tmpbits); \
- putbits(_tmpbits, dstbit, width, pdst); \
-}
-
-#define getandputrop(psrc, srcbit, dstbit, width, pdst, rop) \
-{ \
- register PixelType _tmpbits; \
- getbits(psrc, srcbit, width, _tmpbits) \
- putbitsrop(_tmpbits, dstbit, width, pdst, rop) \
-}
-
-#define getandputrrop(psrc, srcbit, dstbit, width, pdst, rop) \
-{ \
- register PixelType _tmpbits; \
- getbits(psrc, srcbit, width, _tmpbits) \
- putbitsrrop(_tmpbits, dstbit, width, pdst, rop) \
-}
-
-
-#define getandputbits0(psrc, sbindex, width, pdst) \
-{ /* unroll the whole damn thing to see how it * behaves */ \
- register int _flag = PPW - (sbindex); \
- register PixelType _src; \
- \
- _src = SCRLEFT (*(psrc), (sbindex)); \
- if ((width) > _flag) \
- _src |= SCRRIGHT (*((psrc) + 1), _flag); \
- \
- *(pdst) = (*(pdst) & mfbGetstarttab((width))) | (_src & mfbGetendtab((width))); \
-}
-
-
-#define getandputrop0(psrc, sbindex, width, pdst, rop) \
-{ \
- register int _flag = PPW - (sbindex); \
- register PixelType _src; \
- \
- _src = SCRLEFT (*(psrc), (sbindex)); \
- if ((width) > _flag) \
- _src |= SCRRIGHT (*((psrc) + 1), _flag); \
- DoRop(_src, rop, _src, *(pdst)); \
- \
- *(pdst) = (*(pdst) & mfbGetstarttab((width))) | (_src & mfbGetendtab((width))); \
-}
-
-#define getandputrrop0(psrc, sbindex, width, pdst, rop) \
-{ \
- int _flag = PPW - (sbindex); \
- register PixelType _src; \
- \
- _src = SCRLEFT (*(psrc), (sbindex)); \
- if ((width) > _flag) \
- _src |= SCRRIGHT (*((psrc) + 1), _flag); \
- _src = DoRRop(rop, _src, *(pdst)); \
- \
- *(pdst) = (*(pdst) & mfbGetstarttab((width))) | (_src & mfbGetendtab((width))); \
-}
-
-#endif /* FASTGETBITS && FASTPUTBITS */
-
-#endif /* MFB_CONSTS_ONLY */