diff options
Diffstat (limited to 'nx-X11/extras/Mesa/src/mesa/drivers/dri/mga/server')
6 files changed, 0 insertions, 2062 deletions
diff --git a/nx-X11/extras/Mesa/src/mesa/drivers/dri/mga/server/mga.h b/nx-X11/extras/Mesa/src/mesa/drivers/dri/mga/server/mga.h deleted file mode 100644 index 830d48d85..000000000 --- a/nx-X11/extras/Mesa/src/mesa/drivers/dri/mga/server/mga.h +++ /dev/null @@ -1,115 +0,0 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga.h,v 1.85 2002/12/16 16:19:17 dawes Exp $ */ -/* - * MGA Millennium (MGA2064W) functions - * - * Copyright 1996 The XFree86 Project, Inc. - * - * Authors - * Dirk Hohndel - * hohndel@XFree86.Org - * David Dawes - * dawes@XFree86.Org - */ - -#ifndef MGA_H -#define MGA_H - - -#include "xf86drm.h" -#include "linux/types.h" - - -#define PCI_CHIP_MGA2085 0x0518 -#define PCI_CHIP_MGA2064 0x0519 -#define PCI_CHIP_MGA1064 0x051A -#define PCI_CHIP_MGA2164 0x051B -#define PCI_CHIP_MGA2164_AGP 0x051F -#define PCI_CHIP_MGAG200_PCI 0x0520 -#define PCI_CHIP_MGAG200 0x0521 -#define PCI_CHIP_MGAG400 0x0525 -#define PCI_CHIP_MGAG550 0x2527 -#define PCI_CHIP_MGAG100_PCI 0x1000 -#define PCI_CHIP_MGAG100 0x1001 - - -# define MMIO_IN8(base, offset) \ - *(volatile unsigned char *)(((unsigned char*)(base)) + (offset)) -# define MMIO_IN16(base, offset) \ - *(volatile unsigned short *)(void *)(((unsigned char*)(base)) + (offset)) -# define MMIO_IN32(base, offset) \ - *(volatile unsigned int *)(void *)(((unsigned char*)(base)) + (offset)) -# define MMIO_OUT8(base, offset, val) \ - *(volatile unsigned char *)(((unsigned char*)(base)) + (offset)) = (val) -# define MMIO_OUT16(base, offset, val) \ - *(volatile unsigned short *)(void *)(((unsigned char*)(base)) + (offset)) = (val) -# define MMIO_OUT32(base, offset, val) \ - *(volatile unsigned int *)(void *)(((unsigned char*)(base)) + (offset)) = (val) - -#define INREG8(addr) MMIO_IN8(pMga->IOBase, addr) -#define INREG16(addr) MMIO_IN16(pMga->IOBase, addr) -#define INREG(addr) MMIO_IN32(pMga->IOBase, addr) -#define OUTREG8(addr, val) MMIO_OUT8(pMga->IOBase, addr, val) -#define OUTREG16(addr, val) MMIO_OUT16(pMga->IOBase, addr, val) -#define OUTREG(addr, val) MMIO_OUT32(pMga->IOBase, addr, val) - -#define MGAIOMAPSIZE 0x00004000 - - -typedef struct { - int Chipset; /**< \brief Chipset number */ - - int irq; /**< \brief IRQ number */ - - - int frontOffset; /**< \brief Front color buffer offset */ - int frontPitch; /**< \brief Front color buffer pitch */ - int backOffset; /**< \brief Back color buffer offset */ - int backPitch; /**< \brief Back color buffer pitch */ - int depthOffset; /**< \brief Depth buffer offset */ - int depthPitch; /**< \brief Depth buffer pitch */ - int textureOffset; /**< \brief Texture area offset */ - int textureSize; /**< \brief Texture area size */ - int logTextureGranularity; - - /** - * \name AGP - */ - /*@{*/ - drmSize agpSize; /**< \brief AGP map size */ - int agpMode; /**< \brief AGP mode */ - /*@}*/ - - drmRegion agp; - - /* PCI mappings */ - drmRegion registers; - drmRegion status; - - /* AGP mappings */ - drmRegion warp; - drmRegion primary; - drmRegion buffers; - drmRegion agpTextures; - - drmBufMapPtr drmBuffers; - - unsigned long IOAddress; - unsigned char *IOBase; - int HasSDRAM; - - __u32 reg_ien; -} MGARec, *MGAPtr; - - - -#define MGA_FRONT 0x1 -#define MGA_BACK 0x2 -#define MGA_DEPTH 0x4 - -#define MGA_AGP_1X_MODE 0x01 -#define MGA_AGP_2X_MODE 0x02 -#define MGA_AGP_4X_MODE 0x04 -#define MGA_AGP_MODE_MASK 0x07 - - -#endif diff --git a/nx-X11/extras/Mesa/src/mesa/drivers/dri/mga/server/mga_bios.h b/nx-X11/extras/Mesa/src/mesa/drivers/dri/mga/server/mga_bios.h deleted file mode 100644 index 8fbf619e3..000000000 --- a/nx-X11/extras/Mesa/src/mesa/drivers/dri/mga/server/mga_bios.h +++ /dev/null @@ -1,143 +0,0 @@ -/* $XConsortium: mga_bios.h /main/2 1996/10/28 04:48:23 kaleb $ */ -#ifndef MGA_BIOS_H -#define MGA_BIOS_H - -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_bios.h,v 1.3 1998/07/25 16:55:51 dawes Exp $ */ - -/* - * MGABiosInfo - This struct describes the video BIOS info block. - * - * DESCRIPTION - * Do not mess with this, unless you know what you are doing. - * The data lengths and types are critical. - * - * HISTORY - * October 7, 1996 - [aem] Andrew E. Mileski - * This struct was shamelessly stolen from the MGA DDK. - * It has been reformatted, and the data types changed. - */ -typedef struct { - /* Length of this structure in bytes */ - __u16 StructLen; - - /* - * Unique number identifying the product type - * 0 : MGA-S1P20 (2MB base with 175MHz Ramdac) - * 1 : MGA-S1P21 (2MB base with 220MHz Ramdac) - * 2 : Reserved - * 3 : Reserved - * 4 : MGA-S1P40 (4MB base with 175MHz Ramdac) - * 5 : MGA-S1P41 (4MB base with 220MHz Ramdac) - */ - __u16 ProductID; - - /* Serial number of the board */ - __u8 SerNo[ 10 ]; - - /* - * Manufacturing date of the board (at product test) - * Format: yyyy yyym mmmd dddd - */ - __u16 ManufDate; - - /* Identification of manufacturing site */ - __u16 ManufId; - - /* - * Number and revision level of the PCB - * Format: nnnn nnnn nnnr rrrr - * n = PCB number ex:576 (from 0->2047) - * r = PCB revision (from 0->31) - */ - __u16 PCBInfo; - - /* Identification of any PMBs */ - __u16 PMBInfo; - - /* - * Bit 0-7 : Ramdac speed (0=175MHz, 1=220MHz) - * Bit 8-15 : Ramdac type (0=TVP3026, 1=TVP3027) - */ - __u16 RamdacType; - - /* Maximum PCLK of the ramdac */ - __u16 PclkMax; - - /* Maximum LDCLK supported by the WRAM memory */ - __u16 LclkMax; - - /* Maximum MCLK of base board */ - __u16 ClkBase; - - /* Maximum MCLK of 4Mb board */ - __u16 Clk4MB; - - /* Maximum MCLK of 8Mb board */ - __u16 Clk8MB; - - /* Maximum MCLK of board with multimedia module */ - __u16 ClkMod; - - /* Diagnostic test pass frequency */ - __u16 TestClk; - - /* Default VGA mode1 pixel frequency */ - __u16 VGAFreq1; - - /* Default VGA mode2 pixel frequency */ - __u16 VGAFreq2; - - /* Date of last BIOS programming/update */ - __u16 ProgramDate; - - /* Number of times BIOS has been programmed */ - __u16 ProgramCnt; - - /* Support for up to 32 hardware/software options */ - __u32 Options; - - /* Support for up to 32 hardware/software features */ - __u32 FeatFlag; - - /* Definition of VGA mode MCLK */ - __u16 VGAClk; - - /* Indicate the revision level of this header struct */ - __u16 StructRev; - - __u16 Reserved[ 3 ]; -} MGABiosInfo; - -/* from the PINS structure, refer pins info from MGA */ -typedef struct tagParamMGA { - __u16 PinID; /* 0 */ - __u8 StructLen; /* 2 */ - __u8 Rsvd1; /* 3 */ - __u16 StructRev; /* 4 */ - __u16 ProgramDate; /* 6 */ - __u16 ProgramCnt; /* 8 */ - __u16 ProductID; /* 10 */ - __u8 SerNo[16]; /* 12 */ - __u8 PLInfo[6]; /* 28 */ - __u16 PCBInfo; /* 34 */ - __u32 FeatFlag; /* 36 */ - __u8 RamdacType; /* 40 */ - __u8 RamdacSpeed; /* 41 */ - __u8 PclkMax; /* 42 */ - __u8 ClkGE; /* 43 */ - __u8 ClkMem; /* 44 */ - __u8 Clk4MB; /* 45 */ - __u8 Clk8MB; /* 46 */ - __u8 ClkMod; /* 47 */ - __u8 TestClk; /* 48 */ - __u8 VGAFreq1; /* 49 */ - __u8 VGAFreq2; /* 50 */ - __u8 MCTLWTST; /* 51 */ - __u8 VidCtrl; /* 52 */ - __u8 Clk12MB; /* 53 */ - __u8 Clk16MB; /* 54 */ - __u8 Reserved[8]; /* 55-62 */ - __u8 PinCheck; /* 63 */ -} MGABios2Info; - -#endif diff --git a/nx-X11/extras/Mesa/src/mesa/drivers/dri/mga/server/mga_dri.c b/nx-X11/extras/Mesa/src/mesa/drivers/dri/mga/server/mga_dri.c deleted file mode 100644 index 258ace83a..000000000 --- a/nx-X11/extras/Mesa/src/mesa/drivers/dri/mga/server/mga_dri.c +++ /dev/null @@ -1,1089 +0,0 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.c,v 1.28 2003/02/08 21:26:58 dawes Exp $ */ - -/* - * Copyright 2000 VA Linux Systems Inc., Fremont, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES - * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Keith Whitwell <keith@tungstengraphics.com> - * Gareth Hughes <gareth@valinux.com> - */ - -#include <errno.h> -#include <unistd.h> -#include <string.h> -#include <stdio.h> -#include <stdlib.h> -#include <inttypes.h> - -#include "driver.h" -#include "drm.h" -#include "memops.h" - -#include "mga_reg.h" -#include "mga.h" -#include "mga_macros.h" -#include "mga_dri.h" - - -/* Quiescence, locking - */ -#define MGA_TIMEOUT 2048 - -static void MGAWaitForIdleDMA( struct DRIDriverContextRec *ctx, MGAPtr pMga ) -{ - drm_lock_t lock; - int ret; - int i = 0; - - memset( &lock, 0, sizeof(lock) ); - - for (;;) { - do { - /* first ask for quiescent and flush */ - lock.flags = DRM_LOCK_QUIESCENT | DRM_LOCK_FLUSH; - do { - ret = drmCommandWrite( ctx->drmFD, DRM_MGA_FLUSH, - &lock, sizeof( lock ) ); - } while ( ret == -EBUSY && i++ < DRM_MGA_IDLE_RETRY ); - - /* if it's still busy just try quiescent */ - if ( ret == -EBUSY ) { - lock.flags = DRM_LOCK_QUIESCENT; - do { - ret = drmCommandWrite( ctx->drmFD, DRM_MGA_FLUSH, - &lock, sizeof( lock ) ); - } while ( ret == -EBUSY && i++ < DRM_MGA_IDLE_RETRY ); - } - } while ( ( ret == -EBUSY ) && ( i++ < MGA_TIMEOUT ) ); - - if ( ret == 0 ) - return; - - fprintf( stderr, - "[dri] Idle timed out, resetting engine...\n" ); - - drmCommandNone( ctx->drmFD, DRM_MGA_RESET ); - } -} - -static unsigned int mylog2( unsigned int n ) -{ - unsigned int log2 = 1; - while ( n > 1 ) n >>= 1, log2++; - return log2; -} - -static int MGADRIAgpInit(struct DRIDriverContextRec *ctx, MGAPtr pMga) -{ - unsigned long mode; - unsigned int vendor, device; - int ret, count, i; - - if(pMga->agpSize < 12)pMga->agpSize = 12; - if(pMga->agpSize > 64)pMga->agpSize = 64; /* cap */ - - /* FIXME: Make these configurable... - */ - pMga->agp.size = pMga->agpSize * 1024 * 1024; - - pMga->warp.offset = 0; - pMga->warp.size = MGA_WARP_UCODE_SIZE; - - pMga->primary.offset = (pMga->warp.offset + - pMga->warp.size); - pMga->primary.size = 1024 * 1024; - - pMga->buffers.offset = (pMga->primary.offset + - pMga->primary.size); - pMga->buffers.size = MGA_NUM_BUFFERS * MGA_BUFFER_SIZE; - - - pMga->agpTextures.offset = (pMga->buffers.offset + - pMga->buffers.size); - - pMga->agpTextures.size = pMga->agp.size - - pMga->agpTextures.offset; - - if ( drmAgpAcquire( ctx->drmFD ) < 0 ) { - fprintf( stderr, "[agp] AGP not available\n" ); - return 0; - } - - mode = drmAgpGetMode( ctx->drmFD ); /* Default mode */ - vendor = drmAgpVendorId( ctx->drmFD ); - device = drmAgpDeviceId( ctx->drmFD ); - - mode &= ~MGA_AGP_MODE_MASK; - switch ( pMga->agpMode ) { - case 4: - mode |= MGA_AGP_4X_MODE; - case 2: - mode |= MGA_AGP_2X_MODE; - case 1: - default: - mode |= MGA_AGP_1X_MODE; - } - -#if 0 - fprintf( stderr, - "[agp] Mode 0x%08lx [AGP 0x%04x/0x%04x; Card 0x%04x/0x%04x]\n", - mode, vendor, device, - ctx->pciVendor, - ctx->pciChipType ); -#endif - - if ( drmAgpEnable( ctx->drmFD, mode ) < 0 ) { - fprintf( stderr, "[agp] AGP not enabled\n" ); - drmAgpRelease( ctx->drmFD ); - return 0; - } - - if ( pMga->Chipset == PCI_CHIP_MGAG200 ) { - switch ( pMga->agpMode ) { - case 2: - fprintf( stderr, - "[drm] Enabling AGP 2x PLL encoding\n" ); - OUTREG( MGAREG_AGP_PLL, MGA_AGP2XPLL_ENABLE ); - break; - - case 1: - default: - fprintf( stderr, - "[drm] Disabling AGP 2x PLL encoding\n" ); - OUTREG( MGAREG_AGP_PLL, MGA_AGP2XPLL_DISABLE ); - pMga->agpMode = 1; - break; - } - } - - ret = drmAgpAlloc( ctx->drmFD, pMga->agp.size, - 0, NULL, &pMga->agp.handle ); - if ( ret < 0 ) { - fprintf( stderr, "[agp] Out of memory (%d)\n", ret ); - drmAgpRelease( ctx->drmFD ); - return 0; - } - fprintf( stderr, - "[agp] %d kB allocated with handle 0x%08x\n", - pMga->agp.size/1024, (unsigned int)pMga->agp.handle ); - - if ( drmAgpBind( ctx->drmFD, pMga->agp.handle, 0 ) < 0 ) { - fprintf( stderr, "[agp] Could not bind memory\n" ); - drmAgpFree( ctx->drmFD, pMga->agp.handle ); - drmAgpRelease( ctx->drmFD ); - return 0; - } - - /* WARP microcode space - */ - if ( drmAddMap( ctx->drmFD, - pMga->warp.offset, - pMga->warp.size, - DRM_AGP, DRM_READ_ONLY, - &pMga->warp.handle ) < 0 ) { - fprintf( stderr, - "[agp] Could not add WARP microcode mapping\n" ); - return 0; - } - fprintf( stderr, - "[agp] WARP microcode handle = 0x%08x\n", - pMga->warp.handle ); - - if ( drmMap( ctx->drmFD, - pMga->warp.handle, - pMga->warp.size, - &pMga->warp.map ) < 0 ) { - fprintf( stderr, - "[agp] Could not map WARP microcode\n" ); - return 0; - } - fprintf( stderr, - "[agp] WARP microcode mapped at 0x%08lx\n", - (unsigned long)pMga->warp.map ); - - /* Primary DMA space - */ - if ( drmAddMap( ctx->drmFD, - pMga->primary.offset, - pMga->primary.size, - DRM_AGP, DRM_READ_ONLY, - &pMga->primary.handle ) < 0 ) { - fprintf( stderr, - "[agp] Could not add primary DMA mapping\n" ); - return 0; - } - fprintf( stderr, - "[agp] Primary DMA handle = 0x%08x\n", - pMga->primary.handle ); - - if ( drmMap( ctx->drmFD, - pMga->primary.handle, - pMga->primary.size, - &pMga->primary.map ) < 0 ) { - fprintf( stderr, - "[agp] Could not map primary DMA\n" ); - return 0; - } - fprintf( stderr, - "[agp] Primary DMA mapped at 0x%08lx\n", - (unsigned long)pMga->primary.map ); - - /* DMA buffers - */ - if ( drmAddMap( ctx->drmFD, - pMga->buffers.offset, - pMga->buffers.size, - DRM_AGP, 0, - &pMga->buffers.handle ) < 0 ) { - fprintf( stderr, - "[agp] Could not add DMA buffers mapping\n" ); - return 0; - } - fprintf( stderr, - "[agp] DMA buffers handle = 0x%08x\n", - pMga->buffers.handle ); - - if ( drmMap( ctx->drmFD, - pMga->buffers.handle, - pMga->buffers.size, - &pMga->buffers.map ) < 0 ) { - fprintf( stderr, - "[agp] Could not map DMA buffers\n" ); - return 0; - } - fprintf( stderr, - "[agp] DMA buffers mapped at 0x%08lx\n", - (unsigned long)pMga->buffers.map ); - - count = drmAddBufs( ctx->drmFD, - MGA_NUM_BUFFERS, MGA_BUFFER_SIZE, - DRM_AGP_BUFFER, pMga->buffers.offset ); - if ( count <= 0 ) { - fprintf( stderr, - "[drm] failure adding %d %d byte DMA buffers\n", - MGA_NUM_BUFFERS, MGA_BUFFER_SIZE ); - return 0; - } - fprintf( stderr, - "[drm] Added %d %d byte DMA buffers\n", - count, MGA_BUFFER_SIZE ); - - i = mylog2(pMga->agpTextures.size / MGA_NR_TEX_REGIONS); - if(i < MGA_LOG_MIN_TEX_REGION_SIZE) - i = MGA_LOG_MIN_TEX_REGION_SIZE; - pMga->agpTextures.size = (pMga->agpTextures.size >> i) << i; - - if ( drmAddMap( ctx->drmFD, - pMga->agpTextures.offset, - pMga->agpTextures.size, - DRM_AGP, 0, - &pMga->agpTextures.handle ) < 0 ) { - fprintf( stderr, - "[agp] Could not add agpTexture mapping\n" ); - return 0; - } -/* should i map it ? */ - fprintf( stderr, - "[agp] agpTexture handle = 0x%08x\n", - pMga->agpTextures.handle ); - fprintf( stderr, - "[agp] agpTexture size: %d kb\n", pMga->agpTextures.size/1024 ); - - return 1; -} - -static int MGADRIMapInit( struct DRIDriverContextRec *ctx, MGAPtr pMga ) -{ - pMga->registers.size = MGAIOMAPSIZE; - - if ( drmAddMap( ctx->drmFD, - (drm_handle_t)pMga->IOAddress, - pMga->registers.size, - DRM_REGISTERS, DRM_READ_ONLY, - &pMga->registers.handle ) < 0 ) { - fprintf( stderr, - "[drm] Could not add MMIO registers mapping\n" ); - return 0; - } - fprintf( stderr, - "[drm] Registers handle = 0x%08lx\n", - pMga->registers.handle ); - - pMga->status.size = SAREA_MAX; - - if ( drmAddMap( ctx->drmFD, 0, pMga->status.size, - DRM_SHM, DRM_READ_ONLY | DRM_LOCKED | DRM_KERNEL, - &pMga->status.handle ) < 0 ) { - fprintf( stderr, - "[drm] Could not add status page mapping\n" ); - return 0; - } - fprintf( stderr, - "[drm] Status handle = 0x%08x\n", - pMga->status.handle ); - - if ( drmMap( ctx->drmFD, - pMga->status.handle, - pMga->status.size, - &pMga->status.map ) < 0 ) { - fprintf( stderr, - "[agp] Could not map status page\n" ); - return 0; - } - fprintf( stderr, - "[agp] Status page mapped at 0x%08lx\n", - (unsigned long)pMga->status.map ); - - return 1; -} - -static int MGADRIKernelInit( struct DRIDriverContextRec *ctx, MGAPtr pMga ) -{ - drm_mga_init_t init; - int ret; - - memset( &init, 0, sizeof(init) ); - - init.func = MGA_INIT_DMA; - init.sarea_priv_offset = sizeof(drm_sarea_t); - - switch ( pMga->Chipset ) { - case PCI_CHIP_MGAG550: - case PCI_CHIP_MGAG400: - init.chipset = MGA_CARD_TYPE_G400; - break; - case PCI_CHIP_MGAG200: - case PCI_CHIP_MGAG200_PCI: - init.chipset = MGA_CARD_TYPE_G200; - break; - default: - return 0; - } - - init.sgram = 0; /* FIXME !pMga->HasSDRAM; */ - - - switch (ctx->bpp) - { - case 16: - init.maccess = MGA_MACCESS_PW16; - break; - case 32: - init.maccess = MGA_MACCESS_PW32; - break; - default: - fprintf( stderr, "[mga] invalid bpp (%d)\n", ctx->bpp ); - return 0; - } - - - init.fb_cpp = ctx->bpp / 8; - init.front_offset = pMga->frontOffset; - init.front_pitch = pMga->frontPitch / init.fb_cpp; - init.back_offset = pMga->backOffset; - init.back_pitch = pMga->backPitch / init.fb_cpp; - - init.depth_cpp = ctx->bpp / 8; - init.depth_offset = pMga->depthOffset; - init.depth_pitch = pMga->depthPitch / init.depth_cpp; - - init.texture_offset[0] = pMga->textureOffset; - init.texture_size[0] = pMga->textureSize; - - init.fb_offset = ctx->shared.hFrameBuffer; - init.mmio_offset = pMga->registers.handle; - init.status_offset = pMga->status.handle; - - init.warp_offset = pMga->warp.handle; - init.primary_offset = pMga->primary.handle; - init.buffers_offset = pMga->buffers.handle; - - init.texture_offset[1] = pMga->agpTextures.handle; - init.texture_size[1] = pMga->agpTextures.size; - - ret = drmCommandWrite( ctx->drmFD, DRM_MGA_INIT, &init, sizeof(init)); - if ( ret < 0 ) { - fprintf( stderr, - "[drm] Failed to initialize DMA! (%d)\n", ret ); - return 0; - } - - return 1; -} - -static void MGADRIIrqInit(struct DRIDriverContextRec *ctx, MGAPtr pMga) -{ - if (!pMga->irq) - { - pMga->irq = drmGetInterruptFromBusID(ctx->drmFD, - ctx->pciBus, - ctx->pciDevice, - ctx->pciFunc); - - fprintf(stderr, "[drm] got IRQ %d\n", pMga->irq); - - if((drmCtlInstHandler(ctx->drmFD, pMga->irq)) != 0) - { - fprintf(stderr, - "[drm] failure adding irq handler, " - "there is a device already using that irq\n" - "[drm] falling back to irq-free operation\n"); - pMga->irq = 0; - } - else - { - pMga->reg_ien = INREG( MGAREG_IEN ); - } - } - - if (pMga->irq) - fprintf(stderr, - "[drm] dma control initialized, using IRQ %d\n", - pMga->irq); -} - -static int MGADRIBuffersInit( struct DRIDriverContextRec *ctx, MGAPtr pMga ) -{ - pMga->drmBuffers = drmMapBufs( ctx->drmFD ); - if ( !pMga->drmBuffers ) - { - fprintf( stderr, - "[drm] Failed to map DMA buffers list\n" ); - return 0; - } - - fprintf( stderr, - "[drm] Mapped %d DMA buffers\n", - pMga->drmBuffers->count ); - - return 1; -} - -static int MGAMemoryInit( struct DRIDriverContextRec *ctx, MGAPtr pMga ) -{ - int width_bytes = ctx->shared.virtualWidth * ctx->cpp; - int bufferSize = ((ctx->shared.virtualHeight * width_bytes - + MGA_BUFFER_ALIGN) - & ~MGA_BUFFER_ALIGN); - int depthSize = ((((ctx->shared.virtualHeight+15) & ~15) * width_bytes - + MGA_BUFFER_ALIGN) - & ~MGA_BUFFER_ALIGN); - int l; - - pMga->frontOffset = 0; - pMga->frontPitch = ctx->shared.virtualWidth * ctx->cpp; - - fprintf(stderr, - "Using %d MB AGP aperture\n", pMga->agpSize); - fprintf(stderr, - "Using %d MB for vertex/indirect buffers\n", pMga->buffers.size>>20); - fprintf(stderr, - "Using %d MB for AGP textures\n", pMga->agpTextures.size>>20); - - /* Front, back and depth buffers - everything else texture?? - */ - pMga->textureSize = ctx->shared.fbSize - 2 * bufferSize - depthSize; - - if (pMga->textureSize < 0) - return 0; - - l = mylog2( pMga->textureSize / MGA_NR_TEX_REGIONS ); - if ( l < MGA_LOG_MIN_TEX_REGION_SIZE ) - l = MGA_LOG_MIN_TEX_REGION_SIZE; - - /* Round the texture size up to the nearest whole number of - * texture regions. Again, be greedy about this, don't - * round down. - */ - pMga->logTextureGranularity = l; - pMga->textureSize = (pMga->textureSize >> l) << l; - - /* Set a minimum usable local texture heap size. This will fit - * two 256x256x32bpp textures. - */ - if (pMga->textureSize < 512 * 1024) { - pMga->textureOffset = 0; - pMga->textureSize = 0; - } - - /* Reserve space for textures */ - pMga->textureOffset = ((ctx->shared.fbSize - pMga->textureSize + - MGA_BUFFER_ALIGN) & - ~MGA_BUFFER_ALIGN); - - /* Reserve space for the shared depth - * buffer. - */ - pMga->depthOffset = ((pMga->textureOffset - depthSize + - MGA_BUFFER_ALIGN) & - ~MGA_BUFFER_ALIGN); - pMga->depthPitch = ctx->shared.virtualWidth * ctx->cpp; - - pMga->backOffset = ((pMga->depthOffset - bufferSize + - MGA_BUFFER_ALIGN) & - ~MGA_BUFFER_ALIGN); - pMga->backPitch = ctx->shared.virtualWidth * ctx->cpp; - - - fprintf(stderr, - "Will use back buffer at offset 0x%x\n", - pMga->backOffset); - fprintf(stderr, - "Will use depth buffer at offset 0x%x\n", - pMga->depthOffset); - fprintf(stderr, - "Will use %d kb for textures at offset 0x%x\n", - pMga->textureSize/1024, pMga->textureOffset); - - return 1; -} - -static int MGACheckDRMVersion( struct DRIDriverContextRec *ctx, MGAPtr pMga ) -{ - drmVersionPtr version; - - /* Check the MGA DRM version */ - version = drmGetVersion(ctx->drmFD); - if ( version ) { - if ( version->version_major != 3 || - version->version_minor < 0 ) { - /* incompatible drm version */ - fprintf( stderr, - "[dri] MGADRIScreenInit failed because of a version mismatch.\n" - "[dri] mga.o kernel module version is %d.%d.%d but version 3.0.x is needed.\n" - "[dri] Disabling DRI.\n", - version->version_major, - version->version_minor, - version->version_patchlevel ); - drmFreeVersion( version ); - return 0; - } - drmFreeVersion( version ); - } - - return 1; -} - -static void print_client_msg( MGADRIPtr pMGADRI ) -{ - fprintf( stderr, "chipset: %d\n", pMGADRI->chipset ); - - fprintf( stderr, "width: %d\n", pMGADRI->width ); - fprintf( stderr, "height: %d\n", pMGADRI->height ); - fprintf( stderr, "mem: %d\n", pMGADRI->mem ); - fprintf( stderr, "cpp: %d\n", pMGADRI->cpp ); - - fprintf( stderr, "agpMode: %d\n", pMGADRI->agpMode ); - - fprintf( stderr, "frontOffset: %d\n", pMGADRI->frontOffset ); - fprintf( stderr, "frontPitch: %d\n", pMGADRI->frontPitch ); - - fprintf( stderr, "backOffset: %d\n", pMGADRI->backOffset ); - fprintf( stderr, "backPitch: %d\n", pMGADRI->backPitch ); - - fprintf( stderr, "depthOffset: %d\n", pMGADRI->depthOffset ); - fprintf( stderr, "depthPitch: %d\n", pMGADRI->depthPitch ); - - fprintf( stderr, "textureOffset: %d\n", pMGADRI->textureOffset ); - fprintf( stderr, "textureSize: %d\n", pMGADRI->textureSize ); - - fprintf( stderr, "logTextureGranularity: %d\n", pMGADRI->logTextureGranularity ); - fprintf( stderr, "logAgpTextureGranularity: %d\n", pMGADRI->logAgpTextureGranularity ); - - fprintf( stderr, "agpTextureHandle: %u\n", (unsigned int)pMGADRI->agpTextureOffset ); - fprintf( stderr, "agpTextureSize: %u\n", (unsigned int)pMGADRI->agpTextureSize ); - -#if 0 - pMGADRI->registers.handle = pMga->registers.handle; - pMGADRI->registers.size = pMga->registers.size; - pMGADRI->status.handle = pMga->status.handle; - pMGADRI->status.size = pMga->status.size; - pMGADRI->primary.handle = pMga->primary.handle; - pMGADRI->primary.size = pMga->primary.size; - pMGADRI->buffers.handle = pMga->buffers.handle; - pMGADRI->buffers.size = pMga->buffers.size; - pMGADRI->sarea_priv_offset = sizeof(drm_sarea_t); -#endif -} - -static int MGAScreenInit( struct DRIDriverContextRec *ctx, MGAPtr pMga ) -{ - int i; - int err; - MGADRIPtr pMGADRI; - - usleep(100); - /*assert(!ctx->IsClient);*/ - - { - int width_bytes = (ctx->shared.virtualWidth * ctx->cpp); - int maxy = ctx->shared.fbSize / width_bytes; - - - if (maxy <= ctx->shared.virtualHeight * 3) { - fprintf(stderr, - "Static buffer allocation failed -- " - "need at least %d kB video memory (have %d kB)\n", - (ctx->shared.virtualWidth * ctx->shared.virtualHeight * - ctx->cpp * 3 + 1023) / 1024, - ctx->shared.fbSize / 1024); - return 0; - } - } - - switch(pMga->Chipset) { - case PCI_CHIP_MGAG550: - case PCI_CHIP_MGAG400: - case PCI_CHIP_MGAG200: -#if 0 - case PCI_CHIP_MGAG200_PCI: -#endif - break; - default: - fprintf(stderr, "[drm] Direct rendering only supported with G200/G400/G550 AGP\n"); - return 0; - } - - fprintf( stderr, - "[drm] bpp: %d depth: %d\n", - ctx->bpp, ctx->bpp /* FIXME: depth */ ); - - if ( (ctx->bpp / 8) != 2 && - (ctx->bpp / 8) != 4 ) { - fprintf( stderr, - "[dri] Direct rendering only supported in 16 and 32 bpp modes\n" ); - return 0; - } - - ctx->shared.SAREASize = SAREA_MAX; - - - /* Note that drmOpen will try to load the kernel module, if needed. */ - ctx->drmFD = drmOpen("mga", NULL ); - if (ctx->drmFD < 0) { - fprintf(stderr, "[drm] drmOpen failed\n"); - return 0; - } - - if ((err = drmSetBusid(ctx->drmFD, ctx->pciBusID)) < 0) { - fprintf(stderr, "[drm] drmSetBusid failed (%d, %s), %s\n", - ctx->drmFD, ctx->pciBusID, strerror(-err)); - return 0; - } - - - if (drmAddMap( ctx->drmFD, - 0, - ctx->shared.SAREASize, - DRM_SHM, - DRM_CONTAINS_LOCK, - &ctx->shared.hSAREA) < 0) - { - fprintf(stderr, "[drm] drmAddMap failed\n"); - return 0; - } - fprintf(stderr, "[drm] added %d byte SAREA at 0x%08lx\n", - ctx->shared.SAREASize, ctx->shared.hSAREA); - - if (drmMap( ctx->drmFD, - ctx->shared.hSAREA, - ctx->shared.SAREASize, - (drmAddressPtr)(&ctx->pSAREA)) < 0) - { - fprintf(stderr, "[drm] drmMap failed\n"); - return 0; - } - memset(ctx->pSAREA, 0, ctx->shared.SAREASize); - fprintf(stderr, "[drm] mapped SAREA 0x%08lx to %p, size %d\n", - ctx->shared.hSAREA, ctx->pSAREA, ctx->shared.SAREASize); - - /* Need to AddMap the framebuffer and mmio regions here: - */ - if (drmAddMap( ctx->drmFD, - (drm_handle_t)ctx->FBStart, - ctx->FBSize, - DRM_FRAME_BUFFER, - 0, - &ctx->shared.hFrameBuffer) < 0) - { - fprintf(stderr, "[drm] drmAddMap framebuffer failed\n"); - return 0; - } - fprintf(stderr, "[drm] framebuffer handle = 0x%08lx\n", - ctx->shared.hFrameBuffer); - - -#if 0 /* will be done in MGADRIMapInit */ - if (drmAddMap(ctx->drmFD, - ctx->FixedInfo.mmio_start, - ctx->FixedInfo.mmio_len, - DRM_REGISTERS, - DRM_READ_ONLY, - &pMga->registers.handle) < 0) { - fprintf(stderr, "[drm] drmAddMap mmio failed\n"); - return 0; - } - fprintf(stderr, - "[drm] register handle = 0x%08lx\n", pMga->registers.handle); -#endif - - - /* Check the mga DRM version */ - if (!MGACheckDRMVersion(ctx, pMga)) { - return 0; - } - - if ( !MGADRIAgpInit( ctx, pMga ) ) { - return 0; - } - - if ( !MGADRIMapInit( ctx, pMga ) ) { - return 0; - } - - /* Memory manager setup */ - if (!MGAMemoryInit(ctx, pMga)) { - return 0; - } - - - /* Create a 'server' context so we can grab the lock for - * initialization ioctls. - */ - if ((err = drmCreateContext(ctx->drmFD, &ctx->serverContext)) != 0) { - fprintf(stderr, "%s: drmCreateContext failed %d\n", __FUNCTION__, err); - return 0; - } - - DRM_LOCK(ctx->drmFD, ctx->pSAREA, ctx->serverContext, 0); - - /* Initialize the kernel data structures */ - if (!MGADRIKernelInit(ctx, pMga)) { - fprintf(stderr, "MGADRIKernelInit failed\n"); - DRM_UNLOCK(ctx->drmFD, ctx->pSAREA, ctx->serverContext); - return 0; - } - - /* Initialize the vertex buffers list */ - if (!MGADRIBuffersInit(ctx, pMga)) { - fprintf(stderr, "MGADRIBuffersInit failed\n"); - DRM_UNLOCK(ctx->drmFD, ctx->pSAREA, ctx->serverContext); - return 0; - } - - /* Initialize IRQ */ - MGADRIIrqInit(ctx, pMga); - - - /* Initialize the SAREA private data structure */ - { - drm_mga_sarea_t *pSAREAPriv; - pSAREAPriv = (drm_mga_sarea_t *)(((char*)ctx->pSAREA) + - sizeof(drm_sarea_t)); - memset(pSAREAPriv, 0, sizeof(*pSAREAPriv)); - } - - /* Quick hack to clear the front & back buffers. Could also use - * the clear ioctl to do this, but would need to setup hw state - * first. - */ - drimemsetio((char *)ctx->FBAddress + pMga->frontOffset, - 0, - pMga->frontPitch * ctx->shared.virtualHeight ); - - drimemsetio((char *)ctx->FBAddress + pMga->backOffset, - 0, - pMga->backPitch * ctx->shared.virtualHeight ); - - /* Can release the lock now */ -/* DRM_UNLOCK(ctx->drmFD, ctx->pSAREA, ctx->serverContext);*/ - - /* This is the struct passed to radeon_dri.so for its initialization */ - ctx->driverClientMsg = malloc(sizeof(MGADRIRec)); - ctx->driverClientMsgSize = sizeof(MGADRIRec); - - pMGADRI = (MGADRIPtr)ctx->driverClientMsg; - - - switch(pMga->Chipset) { - case PCI_CHIP_MGAG550: - case PCI_CHIP_MGAG400: - pMGADRI->chipset = MGA_CARD_TYPE_G400; - break; - case PCI_CHIP_MGAG200: - case PCI_CHIP_MGAG200_PCI: - pMGADRI->chipset = MGA_CARD_TYPE_G200; - break; - default: - return 0; - } - pMGADRI->width = ctx->shared.virtualWidth; - pMGADRI->height = ctx->shared.virtualHeight; - pMGADRI->mem = ctx->shared.fbSize; - pMGADRI->cpp = ctx->bpp / 8; - - pMGADRI->agpMode = pMga->agpMode; - - pMGADRI->frontOffset = pMga->frontOffset; - pMGADRI->frontPitch = pMga->frontPitch; - pMGADRI->backOffset = pMga->backOffset; - pMGADRI->backPitch = pMga->backPitch; - pMGADRI->depthOffset = pMga->depthOffset; - pMGADRI->depthPitch = pMga->depthPitch; - pMGADRI->textureOffset = pMga->textureOffset; - pMGADRI->textureSize = pMga->textureSize; - pMGADRI->logTextureGranularity = pMga->logTextureGranularity; - - i = mylog2( pMga->agpTextures.size / MGA_NR_TEX_REGIONS ); - if ( i < MGA_LOG_MIN_TEX_REGION_SIZE ) - i = MGA_LOG_MIN_TEX_REGION_SIZE; - - pMGADRI->logAgpTextureGranularity = i; - pMGADRI->agpTextureOffset = (unsigned int)pMga->agpTextures.handle; - pMGADRI->agpTextureSize = (unsigned int)pMga->agpTextures.size; - - pMGADRI->registers.handle = pMga->registers.handle; - pMGADRI->registers.size = pMga->registers.size; - pMGADRI->status.handle = pMga->status.handle; - pMGADRI->status.size = pMga->status.size; - pMGADRI->primary.handle = pMga->primary.handle; - pMGADRI->primary.size = pMga->primary.size; - pMGADRI->buffers.handle = pMga->buffers.handle; - pMGADRI->buffers.size = pMga->buffers.size; - pMGADRI->sarea_priv_offset = sizeof(drm_sarea_t); - - print_client_msg( pMGADRI ); - - return 1; -} - - -/** - * \brief Validate the fbdev mode. - * - * \param ctx display handle. - * - * \return one on success, or zero on failure. - * - * Saves some registers and returns 1. - * - * \sa mgaValidateMode(). - */ -static int mgaValidateMode( const DRIDriverContext *ctx ) -{ - return 1; -} - - -/** - * \brief Examine mode returned by fbdev. - * - * \param ctx display handle. - * - * \return one on success, or zero on failure. - * - * Restores registers that fbdev has clobbered and returns 1. - * - * \sa mgaValidateMode(). - */ -static int mgaPostValidateMode( const DRIDriverContext *ctx ) -{ - return 1; -} - - -/** - * \brief Initialize the framebuffer device mode - * - * \param ctx display handle. - * - * \return one on success, or zero on failure. - * - * Fills in \p info with some default values and some information from \p ctx - * and then calls MGAScreenInit() for the screen initialization. - * - * Before exiting clears the framebuffer memomry accessing it directly. - */ -static int mgaInitFBDev( struct DRIDriverContextRec *ctx ) -{ - MGAPtr pMga = calloc(1, sizeof(*pMga)); - - { - int dummy = ctx->shared.virtualWidth; - - switch (ctx->bpp / 8) { - case 1: dummy = (ctx->shared.virtualWidth + 127) & ~127; break; - case 2: dummy = (ctx->shared.virtualWidth + 31) & ~31; break; - case 3: - case 4: dummy = (ctx->shared.virtualWidth + 15) & ~15; break; - } - - ctx->shared.virtualWidth = dummy; - } - - ctx->driverPrivate = (void *)pMga; - - pMga->agpMode = MGA_DEFAULT_AGP_MODE; - pMga->agpSize = MGA_DEFAULT_AGP_SIZE; - - pMga->Chipset = ctx->chipset; - - pMga->IOAddress = ctx->MMIOStart; - pMga->IOBase = ctx->MMIOAddress; - - pMga->frontPitch = ctx->shared.virtualWidth * ctx->cpp; - - if (!MGAScreenInit( ctx, pMga )) - return 0; - - return 1; -} - - -/** - * \brief The screen is being closed, so clean up any state and free any - * resources used by the DRI. - * - * \param ctx display handle. - * - * Unmaps the SAREA, closes the DRM device file descriptor and frees the driver - * private data. - */ -static void mgaHaltFBDev( struct DRIDriverContextRec *ctx ) -{ - drmUnmap( ctx->pSAREA, ctx->shared.SAREASize ); - drmClose(ctx->drmFD); - - if (ctx->driverPrivate) { - free(ctx->driverPrivate); - ctx->driverPrivate = NULL; - } -} - - -static int mgaEngineShutdown( const DRIDriverContext *ctx ) -{ - fprintf(stderr, "%s() is not yet implemented!\n", __FUNCTION__); - - return 1; -} - -static int mgaEngineRestore( const DRIDriverContext *ctx ) -{ - fprintf(stderr, "%s() is not yet implemented!\n", __FUNCTION__); - - return 1; -} - -/** - * \brief Exported driver interface for Mini GLX. - * - * \sa DRIDriverRec. - */ -struct DRIDriverRec __driDriver = { - mgaValidateMode, - mgaPostValidateMode, - mgaInitFBDev, - mgaHaltFBDev, - mgaEngineShutdown, - mgaEngineRestore, - 0 -}; - - - - -#if 0 -void MGADRICloseScreen( ScreenPtr pScreen ) -{ - ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; - MGAPtr pMga = MGAPTR(pScrn); - MGADRIServerPrivatePtr pMga = pMga->DRIServerInfo; - drmMGAInit init; - - if ( pMga->drmBuffers ) { - drmUnmapBufs( pMga->drmBuffers ); - pMga->drmBuffers = NULL; - } - - if (pMga->irq) { - drmCtlUninstHandler(ctx->drmFD); - pMga->irq = 0; - } - - /* Cleanup DMA */ - memset( &init, 0, sizeof(drmMGAInit) ); - init.func = MGA_CLEANUP_DMA; - drmCommandWrite( ctx->drmFD, DRM_MGA_INIT, &init, sizeof(drmMGAInit) ); - - if ( pMga->status.map ) { - drmUnmap( pMga->status.map, pMga->status.size ); - pMga->status.map = NULL; - } - if ( pMga->buffers.map ) { - drmUnmap( pMga->buffers.map, pMga->buffers.size ); - pMga->buffers.map = NULL; - } - if ( pMga->primary.map ) { - drmUnmap( pMga->primary.map, pMga->primary.size ); - pMga->primary.map = NULL; - } - if ( pMga->warp.map ) { - drmUnmap( pMga->warp.map, pMga->warp.size ); - pMga->warp.map = NULL; - } - - if ( pMga->agpTextures.map ) { - drmUnmap( pMga->agpTextures.map, pMga->agpTextures.size ); - pMga->agpTextures.map = NULL; - } - - if ( pMga->agp.handle ) { - drmAgpUnbind( ctx->drmFD, pMga->agp.handle ); - drmAgpFree( ctx->drmFD, pMga->agp.handle ); - pMga->agp.handle = 0; - drmAgpRelease( ctx->drmFD ); - } - - DRICloseScreen( pScreen ); - - if ( pMga->pDRIInfo ) { - if ( pMga->pDRIpMga->devPrivate ) { - xfree( pMga->pDRIpMga->devPrivate ); - pMga->pDRIpMga->devPrivate = 0; - } - DRIDestroyInfoRec( pMga->pDRIInfo ); - pMga->pDRIInfo = 0; - } - if ( pMga->DRIServerInfo ) { - xfree( pMga->DRIServerInfo ); - pMga->DRIServerInfo = 0; - } - if ( pMga->pVisualConfigs ) { - xfree( pMga->pVisualConfigs ); - } - if ( pMga->pVisualConfigsPriv ) { - xfree( pMga->pVisualConfigsPriv ); - } -} -#endif diff --git a/nx-X11/extras/Mesa/src/mesa/drivers/dri/mga/server/mga_dri.h b/nx-X11/extras/Mesa/src/mesa/drivers/dri/mga/server/mga_dri.h deleted file mode 100644 index 03b841460..000000000 --- a/nx-X11/extras/Mesa/src/mesa/drivers/dri/mga/server/mga_dri.h +++ /dev/null @@ -1,113 +0,0 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.h,v 1.8 2002/11/29 11:06:42 eich Exp $ */ - -/* - * Copyright 2000 VA Linux Systems Inc., Fremont, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES - * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Keith Whitwell <keith@tungstengraphics.com> - * Gareth Hughes <gareth@valinux.com> - */ - -#ifndef __MGA_DRI_H__ -#define __MGA_DRI_H__ - -#include "xf86drm.h" -#include "drm.h" -#include "mga_drm.h" - -#define MGA_DEFAULT_AGP_SIZE 64 -#define MGA_DEFAULT_AGP_MODE 4 -#define MGA_MAX_AGP_MODE 4 - -/* Buffer are aligned on 4096 byte boundaries. - */ -#define MGA_BUFFER_ALIGN 0x00000fff - -#ifdef __GNUC__ -# define DEPRECATED __attribute__ ((deprecated)) -#else -# define DEPRECATED -#endif - -#if 1 -typedef struct _mgaDrmRegion { - drm_handle_t handle; - unsigned int offset; - drmSize size; -} mgaDrmRegion, *mgaDrmRegionPtr; -#else -#define mgaDrmRegion drmRegion -#endif - -typedef struct { - int chipset; - int width DEPRECATED; - int height DEPRECATED; - int mem DEPRECATED; - int cpp; - - int agpMode; - - unsigned int frontOffset; - unsigned int frontPitch; - - unsigned int backOffset; - unsigned int backPitch; - - unsigned int depthOffset; - unsigned int depthPitch; - - unsigned int textureOffset; - unsigned int textureSize; - int logTextureGranularity DEPRECATED; - - /* Allow calculation of setup dma addresses. - */ - unsigned int agpBufferOffset DEPRECATED; - - unsigned int agpTextureOffset; - unsigned int agpTextureSize; - int logAgpTextureGranularity DEPRECATED; - - unsigned int mAccess DEPRECATED; - - /** - * \name DRM memory regions. - * - * \todo - * Several of these fields are no longer used (and will never be used - * again) on the client-side. None of them, except \c registers, are used - * on the server-side. At some point when it is safe to do so (probably - * for the X.org 6.9 / 7.0 release), these fields should be removed. - */ - /*@{*/ - mgaDrmRegion registers; /**< MMIO registers. */ - mgaDrmRegion status DEPRECATED; /**< No longer used on the client-side. */ - mgaDrmRegion primary; /**< Primary DMA region. */ - mgaDrmRegion buffers DEPRECATED; /**< No longer used on the client-side. */ - /*@}*/ - - unsigned int sarea_priv_offset; -} MGADRIRec, *MGADRIPtr; - -#endif diff --git a/nx-X11/extras/Mesa/src/mesa/drivers/dri/mga/server/mga_macros.h b/nx-X11/extras/Mesa/src/mesa/drivers/dri/mga/server/mga_macros.h deleted file mode 100644 index d985081ab..000000000 --- a/nx-X11/extras/Mesa/src/mesa/drivers/dri/mga/server/mga_macros.h +++ /dev/null @@ -1,118 +0,0 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_macros.h,v 1.22 2002/02/20 17:17:50 dawes Exp $ */ - -#ifndef _MGA_MACROS_H_ -#define _MGA_MACROS_H_ - -#ifndef PSZ -#define PSZ 8 -#endif - -#if PSZ == 8 -#define REPLICATE(r) r &= 0xFF; r |= r << 8; r |= r << 16 -#elif PSZ == 16 -#define REPLICATE(r) r &= 0xFFFF; r |= r << 16 -#elif PSZ == 24 -#define REPLICATE(r) r &= 0xFFFFFF; r |= r << 24 -#else -#define REPLICATE(r) /* */ -#endif - -#define RGBEQUAL(c) (!((((c) >> 8) ^ (c)) & 0xffff)) - -#ifdef XF86DRI -#define MGA_SYNC_XTAG 0x275f4200 - -#define MGABUSYWAIT() do { \ -OUTREG(MGAREG_DWGSYNC, MGA_SYNC_XTAG); \ -while(INREG(MGAREG_DWGSYNC) != MGA_SYNC_XTAG) ; \ -}while(0); - -#endif - -#define MGAISBUSY() (INREG8(MGAREG_Status + 2) & 0x01) - -#define WAITFIFO(cnt) \ - if(!pMga->UsePCIRetry) {\ - register int n = cnt; \ - if(n > pMga->FifoSize) n = pMga->FifoSize; \ - while(pMga->fifoCount < (n))\ - pMga->fifoCount = INREG8(MGAREG_FIFOSTATUS);\ - pMga->fifoCount -= n;\ - } - -#define XYADDRESS(x,y) \ - ((y) * pMga->CurrentLayout.displayWidth + (x) + pMga->YDstOrg) - -#define MAKEDMAINDEX(index) ((((index) >> 2) & 0x7f) | (((index) >> 6) & 0x80)) - -#define DMAINDICES(one,two,three,four) \ - ( MAKEDMAINDEX(one) | \ - (MAKEDMAINDEX(two) << 8) | \ - (MAKEDMAINDEX(three) << 16) | \ - (MAKEDMAINDEX(four) << 24) ) - -#if PSZ == 24 -#define SET_PLANEMASK(p) /**/ -#else -#define SET_PLANEMASK(p) \ - if(!(pMga->AccelFlags & MGA_NO_PLANEMASK) && ((p) != pMga->PlaneMask)) { \ - pMga->PlaneMask = (p); \ - REPLICATE((p)); \ - OUTREG(MGAREG_PLNWT,(p)); \ - } -#endif - -#define SET_FOREGROUND(c) \ - if((c) != pMga->FgColor) { \ - pMga->FgColor = (c); \ - REPLICATE((c)); \ - OUTREG(MGAREG_FCOL,(c)); \ - } - -#define SET_BACKGROUND(c) \ - if((c) != pMga->BgColor) { \ - pMga->BgColor = (c); \ - REPLICATE((c)); \ - OUTREG(MGAREG_BCOL,(c)); \ - } - -#define DISABLE_CLIP() { \ - pMga->AccelFlags &= ~CLIPPER_ON; \ - WAITFIFO(1); \ - OUTREG(MGAREG_CXBNDRY, 0xFFFF0000); } - -#ifdef XF86DRI -#define CHECK_DMA_QUIESCENT(pMGA, pScrn) { \ - if (!pMGA->haveQuiescense) { \ - pMGA->GetQuiescence( pScrn ); \ - } \ -} -#else -#define CHECK_DMA_QUIESCENT(pMGA, pScrn) -#endif - -#ifdef USEMGAHAL -#define HAL_CHIPSETS ((pMga->Chipset == PCI_CHIP_MGAG200_PCI) || \ - (pMga->Chipset == PCI_CHIP_MGAG200) || \ - (pMga->Chipset == PCI_CHIP_MGAG400) || \ - (pMga->Chipset == PCI_CHIP_MGAG550)) - -#define MGA_HAL(x) { \ - MGAPtr pMga = MGAPTR(pScrn); \ - if (pMga->HALLoaded && HAL_CHIPSETS) { x; } \ -} -#define MGA_NOT_HAL(x) { \ - MGAPtr pMga = MGAPTR(pScrn); \ - if (!pMga->HALLoaded || !HAL_CHIPSETS) { x; } \ -} -#else -#define MGA_NOT_HAL(x) { x; } -#endif - -#define MGAISGx50(x) ( (((x)->Chipset == PCI_CHIP_MGAG400) && ((x)->ChipRev >= 0x80)) || \ - ((x)->Chipset == PCI_CHIP_MGAG550) ) - -#define MGA_DH_NEEDS_HAL(x) (((x)->Chipset == PCI_CHIP_MGAG400) && \ - ((x)->ChipRev < 0x80)) - -#endif /* _MGA_MACROS_H_ */ diff --git a/nx-X11/extras/Mesa/src/mesa/drivers/dri/mga/server/mga_reg.h b/nx-X11/extras/Mesa/src/mesa/drivers/dri/mga/server/mga_reg.h deleted file mode 100644 index b8e349923..000000000 --- a/nx-X11/extras/Mesa/src/mesa/drivers/dri/mga/server/mga_reg.h +++ /dev/null @@ -1,484 +0,0 @@ -/* $XConsortium: mgareg.h /main/2 1996/10/25 10:33:21 kaleb $ */ - - - -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_reg.h,v 1.18 2001/09/26 12:59:18 alanh Exp $ */ - - - -/* - * MGA Millennium (MGA2064W) functions - * MGA Mystique (MGA1064SG) functions - * - * Copyright 1996 The XFree86 Project, Inc. - * - * Authors - * Dirk Hohndel - * hohndel@XFree86.Org - * David Dawes - * dawes@XFree86.Org - * Contributors: - * Guy DESBIEF, Aix-en-provence, France - * g.desbief@aix.pacwan.net - * MGA1064SG Mystique register file - */ - - -#ifndef _MGA_REG_H_ -#define _MGA_REG_H_ - -#define MGAREG_DWGCTL 0x1c00 -#define MGAREG_MACCESS 0x1c04 -#define MGA_MACCESS_PW16 0x00000001 -#define MGA_MACCESS_PW32 0x00000002 -/* the following is a mystique only register */ -#define MGAREG_MCTLWTST 0x1c08 -#define MGAREG_ZORG 0x1c0c - -#define MGAREG_PAT0 0x1c10 -#define MGAREG_PAT1 0x1c14 -#define MGAREG_PLNWT 0x1c1c - -#define MGAREG_BCOL 0x1c20 -#define MGAREG_FCOL 0x1c24 - -#define MGAREG_SRC0 0x1c30 -#define MGAREG_SRC1 0x1c34 -#define MGAREG_SRC2 0x1c38 -#define MGAREG_SRC3 0x1c3c - -#define MGAREG_XYSTRT 0x1c40 -#define MGAREG_XYEND 0x1c44 - -#define MGAREG_SHIFT 0x1c50 -/* the following is a mystique only register */ -#define MGAREG_DMAPAD 0x1c54 -#define MGAREG_SGN 0x1c58 -#define MGAREG_LEN 0x1c5c - -#define MGAREG_AR0 0x1c60 -#define MGAREG_AR1 0x1c64 -#define MGAREG_AR2 0x1c68 -#define MGAREG_AR3 0x1c6c -#define MGAREG_AR4 0x1c70 -#define MGAREG_AR5 0x1c74 -#define MGAREG_AR6 0x1c78 - -#define MGAREG_CXBNDRY 0x1c80 -#define MGAREG_FXBNDRY 0x1c84 -#define MGAREG_YDSTLEN 0x1c88 -#define MGAREG_PITCH 0x1c8c - -#define MGAREG_YDST 0x1c90 -#define MGAREG_YDSTORG 0x1c94 -#define MGAREG_YTOP 0x1c98 -#define MGAREG_YBOT 0x1c9c - -#define MGAREG_CXLEFT 0x1ca0 -#define MGAREG_CXRIGHT 0x1ca4 -#define MGAREG_FXLEFT 0x1ca8 -#define MGAREG_FXRIGHT 0x1cac - -#define MGAREG_XDST 0x1cb0 - -#define MGAREG_DR0 0x1cc0 -#define MGAREG_DR1 0x1cc4 -#define MGAREG_DR2 0x1cc8 -#define MGAREG_DR3 0x1ccc - -#define MGAREG_DR4 0x1cd0 -#define MGAREG_DR5 0x1cd4 -#define MGAREG_DR6 0x1cd8 -#define MGAREG_DR7 0x1cdc - -#define MGAREG_DR8 0x1ce0 -#define MGAREG_DR9 0x1ce4 -#define MGAREG_DR10 0x1ce8 -#define MGAREG_DR11 0x1cec - -#define MGAREG_DR12 0x1cf0 -#define MGAREG_DR13 0x1cf4 -#define MGAREG_DR14 0x1cf8 -#define MGAREG_DR15 0x1cfc - -#define MGAREG_SRCORG 0x2cb4 -#define MGAREG_DSTORG 0x2cb8 - -/* add or or this to one of the previous "power registers" to start - the drawing engine */ - -#define MGAREG_EXEC 0x0100 - -#define MGAREG_FIFOSTATUS 0x1e10 -#define MGAREG_Status 0x1e14 -#define MGAREG_ICLEAR 0x1e18 -#define MGAREG_IEN 0x1e1c - -#define MGAREG_VCOUNT 0x1e20 - -#define MGAREG_Reset 0x1e40 - -#define MGAREG_OPMODE 0x1e54 - -/* Warp Registers */ -#define MGAREG_WIADDR 0x1dc0 -#define MGAREG_WIADDR2 0x1dd8 -#define MGAREG_WGETMSB 0x1dc8 -#define MGAREG_WVRTXSZ 0x1dcc -#define MGAREG_WACCEPTSEQ 0x1dd4 -#define MGAREG_WMISC 0x1e70 - -/* OPMODE register additives */ - -#define MGAOPM_DMA_GENERAL (0x00 << 2) -#define MGAOPM_DMA_BLIT (0x01 << 2) -#define MGAOPM_DMA_VECTOR (0x10 << 2) - -/* DWGCTL register additives */ - -/* Lines */ - -#define MGADWG_LINE_OPEN 0x00 -#define MGADWG_AUTOLINE_OPEN 0x01 -#define MGADWG_LINE_CLOSE 0x02 -#define MGADWG_AUTOLINE_CLOSE 0x03 - -/* Trapezoids */ -#define MGADWG_TRAP 0x04 -#define MGADWG_TEXTURE_TRAP 0x05 - -/* BitBlts */ - -#define MGADWG_BITBLT 0x08 -#define MGADWG_FBITBLT 0x0c -#define MGADWG_ILOAD 0x09 -#define MGADWG_ILOAD_SCALE 0x0d -#define MGADWG_ILOAD_FILTER 0x0f -#define MGADWG_ILOAD_HIQH 0x07 -#define MGADWG_ILOAD_HIQHV 0x0e -#define MGADWG_IDUMP 0x0a - -/* atype access to WRAM */ - -#define MGADWG_RPL ( 0x00 << 4 ) -#define MGADWG_RSTR ( 0x01 << 4 ) -#define MGADWG_ZI ( 0x03 << 4 ) -#define MGADWG_BLK ( 0x04 << 4 ) -#define MGADWG_I ( 0x07 << 4 ) - -/* specifies whether bit blits are linear or xy */ -#define MGADWG_LINEAR ( 0x01 << 7 ) - -/* z drawing mode. use MGADWG_NOZCMP for always */ - -#define MGADWG_NOZCMP ( 0x00 << 8 ) -#define MGADWG_ZE ( 0x02 << 8 ) -#define MGADWG_ZNE ( 0x03 << 8 ) -#define MGADWG_ZLT ( 0x04 << 8 ) -#define MGADWG_ZLTE ( 0x05 << 8 ) -#define MGADWG_GT ( 0x06 << 8 ) -#define MGADWG_GTE ( 0x07 << 8 ) - -/* use this to force colour expansion circuitry to do its stuff */ - -#define MGADWG_SOLID ( 0x01 << 11 ) - -/* ar register at zero */ - -#define MGADWG_ARZERO ( 0x01 << 12 ) - -#define MGADWG_SGNZERO ( 0x01 << 13 ) - -#define MGADWG_SHIFTZERO ( 0x01 << 14 ) - -/* See table on 4-43 for bop ALU operations */ - -/* See table on 4-44 for translucidity masks */ - -#define MGADWG_BMONOLEF ( 0x00 << 25 ) -#define MGADWG_BMONOWF ( 0x04 << 25 ) -#define MGADWG_BPLAN ( 0x01 << 25 ) - -/* note that if bfcol is specified and you're doing a bitblt, it causes - a fbitblt to be performed, so check that you obey the fbitblt rules */ - -#define MGADWG_BFCOL ( 0x02 << 25 ) -#define MGADWG_BUYUV ( 0x0e << 25 ) -#define MGADWG_BU32BGR ( 0x03 << 25 ) -#define MGADWG_BU32RGB ( 0x07 << 25 ) -#define MGADWG_BU24BGR ( 0x0b << 25 ) -#define MGADWG_BU24RGB ( 0x0f << 25 ) - -#define MGADWG_PATTERN ( 0x01 << 29 ) -#define MGADWG_TRANSC ( 0x01 << 30 ) -#define MGAREG_MISC_WRITE 0x3c2 -#define MGAREG_MISC_READ 0x3cc -#define MGAREG_MISC_IOADSEL (0x1 << 0) -#define MGAREG_MISC_RAMMAPEN (0x1 << 1) -#define MGAREG_MISC_CLK_SEL_VGA25 (0x0 << 2) -#define MGAREG_MISC_CLK_SEL_VGA28 (0x1 << 2) -#define MGAREG_MISC_CLK_SEL_MGA_PIX (0x2 << 2) -#define MGAREG_MISC_CLK_SEL_MGA_MSK (0x3 << 2) -#define MGAREG_MISC_VIDEO_DIS (0x1 << 4) -#define MGAREG_MISC_HIGH_PG_SEL (0x1 << 5) - -/* MMIO VGA registers */ -#define MGAREG_SEQ_INDEX 0x1fc4 -#define MGAREG_SEQ_DATA 0x1fc5 -#define MGAREG_CRTC_INDEX 0x1fd4 -#define MGAREG_CRTC_DATA 0x1fd5 -#define MGAREG_CRTCEXT_INDEX 0x1fde -#define MGAREG_CRTCEXT_DATA 0x1fdf - - - -/* MGA bits for registers PCI_OPTION_REG */ -#define MGA1064_OPT_SYS_CLK_PCI ( 0x00 << 0 ) -#define MGA1064_OPT_SYS_CLK_PLL ( 0x01 << 0 ) -#define MGA1064_OPT_SYS_CLK_EXT ( 0x02 << 0 ) -#define MGA1064_OPT_SYS_CLK_MSK ( 0x03 << 0 ) - -#define MGA1064_OPT_SYS_CLK_DIS ( 0x01 << 2 ) -#define MGA1064_OPT_G_CLK_DIV_1 ( 0x01 << 3 ) -#define MGA1064_OPT_M_CLK_DIV_1 ( 0x01 << 4 ) - -#define MGA1064_OPT_SYS_PLL_PDN ( 0x01 << 5 ) -#define MGA1064_OPT_VGA_ION ( 0x01 << 8 ) - -/* MGA registers in PCI config space */ -#define PCI_MGA_INDEX 0x44 -#define PCI_MGA_DATA 0x48 -#define PCI_MGA_OPTION2 0x50 -#define PCI_MGA_OPTION3 0x54 - -#define RAMDAC_OFFSET 0x3c00 - -/* TVP3026 direct registers */ - -#define TVP3026_INDEX 0x00 -#define TVP3026_WADR_PAL 0x00 -#define TVP3026_COL_PAL 0x01 -#define TVP3026_PIX_RD_MSK 0x02 -#define TVP3026_RADR_PAL 0x03 -#define TVP3026_CUR_COL_ADDR 0x04 -#define TVP3026_CUR_COL_DATA 0x05 -#define TVP3026_DATA 0x0a -#define TVP3026_CUR_RAM 0x0b -#define TVP3026_CUR_XLOW 0x0c -#define TVP3026_CUR_XHI 0x0d -#define TVP3026_CUR_YLOW 0x0e -#define TVP3026_CUR_YHI 0x0f - -/* TVP3026 indirect registers */ - -#define TVP3026_SILICON_REV 0x01 -#define TVP3026_CURSOR_CTL 0x06 -#define TVP3026_LATCH_CTL 0x0f -#define TVP3026_TRUE_COLOR_CTL 0x18 -#define TVP3026_MUX_CTL 0x19 -#define TVP3026_CLK_SEL 0x1a -#define TVP3026_PAL_PAGE 0x1c -#define TVP3026_GEN_CTL 0x1d -#define TVP3026_MISC_CTL 0x1e -#define TVP3026_GEN_IO_CTL 0x2a -#define TVP3026_GEN_IO_DATA 0x2b -#define TVP3026_PLL_ADDR 0x2c -#define TVP3026_PIX_CLK_DATA 0x2d -#define TVP3026_MEM_CLK_DATA 0x2e -#define TVP3026_LOAD_CLK_DATA 0x2f -#define TVP3026_KEY_RED_LOW 0x32 -#define TVP3026_KEY_RED_HI 0x33 -#define TVP3026_KEY_GREEN_LOW 0x34 -#define TVP3026_KEY_GREEN_HI 0x35 -#define TVP3026_KEY_BLUE_LOW 0x36 -#define TVP3026_KEY_BLUE_HI 0x37 -#define TVP3026_KEY_CTL 0x38 -#define TVP3026_MCLK_CTL 0x39 -#define TVP3026_SENSE_TEST 0x3a -#define TVP3026_TEST_DATA 0x3b -#define TVP3026_CRC_LSB 0x3c -#define TVP3026_CRC_MSB 0x3d -#define TVP3026_CRC_CTL 0x3e -#define TVP3026_ID 0x3f -#define TVP3026_RESET 0xff - - -/* MGA1064 DAC Register file */ -/* MGA1064 direct registers */ - -#define MGA1064_INDEX 0x00 -#define MGA1064_WADR_PAL 0x00 -#define MGA1064_COL_PAL 0x01 -#define MGA1064_PIX_RD_MSK 0x02 -#define MGA1064_RADR_PAL 0x03 -#define MGA1064_DATA 0x0a - -#define MGA1064_CUR_XLOW 0x0c -#define MGA1064_CUR_XHI 0x0d -#define MGA1064_CUR_YLOW 0x0e -#define MGA1064_CUR_YHI 0x0f - -/* MGA1064 indirect registers */ -#define MGA1064_DVI_PIPE_CTL 0x03 -#define MGA1064_CURSOR_BASE_ADR_LOW 0x04 -#define MGA1064_CURSOR_BASE_ADR_HI 0x05 -#define MGA1064_CURSOR_CTL 0x06 -#define MGA1064_CURSOR_COL0_RED 0x08 -#define MGA1064_CURSOR_COL0_GREEN 0x09 -#define MGA1064_CURSOR_COL0_BLUE 0x0a - -#define MGA1064_CURSOR_COL1_RED 0x0c -#define MGA1064_CURSOR_COL1_GREEN 0x0d -#define MGA1064_CURSOR_COL1_BLUE 0x0e - -#define MGA1064_CURSOR_COL2_RED 0x010 -#define MGA1064_CURSOR_COL2_GREEN 0x011 -#define MGA1064_CURSOR_COL2_BLUE 0x012 - -#define MGA1064_VREF_CTL 0x018 - -#define MGA1064_MUL_CTL 0x19 -#define MGA1064_MUL_CTL_8bits 0x0 -#define MGA1064_MUL_CTL_15bits 0x01 -#define MGA1064_MUL_CTL_16bits 0x02 -#define MGA1064_MUL_CTL_24bits 0x03 -#define MGA1064_MUL_CTL_32bits 0x04 -#define MGA1064_MUL_CTL_2G8V16bits 0x05 -#define MGA1064_MUL_CTL_G16V16bits 0x06 -#define MGA1064_MUL_CTL_32_24bits 0x07 - -#define MGAGDAC_XVREFCTRL 0x18 -#define MGA1064_PIX_CLK_CTL 0x1a -#define MGA1064_PIX_CLK_CTL_CLK_DIS ( 0x01 << 2 ) -#define MGA1064_PIX_CLK_CTL_CLK_POW_DOWN ( 0x01 << 3 ) -#define MGA1064_PIX_CLK_CTL_SEL_PCI ( 0x00 << 0 ) -#define MGA1064_PIX_CLK_CTL_SEL_PLL ( 0x01 << 0 ) -#define MGA1064_PIX_CLK_CTL_SEL_EXT ( 0x02 << 0 ) -#define MGA1064_PIX_CLK_CTL_SEL_MSK ( 0x03 << 0 ) - -#define MGA1064_GEN_CTL 0x1d -#define MGA1064_MISC_CTL 0x1e -#define MGA1064_MISC_CTL_DAC_POW_DN ( 0x01 << 0 ) -#define MGA1064_MISC_CTL_VGA ( 0x01 << 1 ) -#define MGA1064_MISC_CTL_DIS_CON ( 0x03 << 1 ) -#define MGA1064_MISC_CTL_MAFC ( 0x02 << 1 ) -#define MGA1064_MISC_CTL_VGA8 ( 0x01 << 3 ) -#define MGA1064_MISC_CTL_DAC_RAM_CS ( 0x01 << 4 ) - -#define MGA1064_GEN_IO_CTL 0x2a -#define MGA1064_GEN_IO_DATA 0x2b -#define MGA1064_SYS_PLL_M 0x2c -#define MGA1064_SYS_PLL_N 0x2d -#define MGA1064_SYS_PLL_P 0x2e -#define MGA1064_SYS_PLL_STAT 0x2f -#define MGA1064_ZOOM_CTL 0x38 -#define MGA1064_SENSE_TST 0x3a - -#define MGA1064_CRC_LSB 0x3c -#define MGA1064_CRC_MSB 0x3d -#define MGA1064_CRC_CTL 0x3e -#define MGA1064_COL_KEY_MSK_LSB 0x40 -#define MGA1064_COL_KEY_MSK_MSB 0x41 -#define MGA1064_COL_KEY_LSB 0x42 -#define MGA1064_COL_KEY_MSB 0x43 -#define MGA1064_PIX_PLLA_M 0x44 -#define MGA1064_PIX_PLLA_N 0x45 -#define MGA1064_PIX_PLLA_P 0x46 -#define MGA1064_PIX_PLLB_M 0x48 -#define MGA1064_PIX_PLLB_N 0x49 -#define MGA1064_PIX_PLLB_P 0x4a -#define MGA1064_PIX_PLLC_M 0x4c -#define MGA1064_PIX_PLLC_N 0x4d -#define MGA1064_PIX_PLLC_P 0x4e - -#define MGA1064_PIX_PLL_STAT 0x4f - -/*Added for G450 dual head*/ -/* Supported PLL*/ -#define __PIXEL_PLL 1 -#define __SYSTEM_PLL 2 -#define __VIDEO_PLL 3 - -#define MGA1064_VID_PLL_P 0x8D -#define MGA1064_VID_PLL_M 0x8E -#define MGA1064_VID_PLL_N 0x8F - -#define MGA1064_DISP_CTL 0x8a -#define MGA1064_SYNC_CTL 0x8b -#define MGA1064_PWR_CTL 0xa0 -#define MGA1064_PAN_CTL 0xa2 - -/* Using crtc2 */ -#define MGAREG2_C2CTL 0x10 -#define MGAREG2_C2HPARAM 0x14 -#define MGAREG2_C2HSYNC 0x18 -#define MGAREG2_C2VPARAM 0x1c -#define MGAREG2_C2VSYNC 0x20 -#define MGAREG2_C2STARTADD0 0x28 - -#define MGAREG2_C2OFFSET 0x40 -#define MGAREG2_C2DATACTL 0x4c - -#define MGAREG_C2CTL 0x3c10 -#define MGAREG_C2HPARAM 0x3c14 -#define MGAREG_C2HSYNC 0x3c18 -#define MGAREG_C2VPARAM 0x3c1c -#define MGAREG_C2VSYNC 0x3c20 -#define MGAREG_C2STARTADD0 0x3c28 - -#define MGAREG_C2OFFSET 0x3c40 -#define MGAREG_C2DATACTL 0x3c4c - -#define MGA1064_DISP_CTL 0x8a -#define MGA1064_SYNC_CTL 0x8b -#define MGA1064_PWR_CTL 0xa0 - -/* video register */ - -#define MGAREG_BESA1C3ORG 0x3d60 -#define MGAREG_BESA1CORG 0x3d10 -#define MGAREG_BESA1ORG 0x3d00 -#define MGAREG_BESCTL 0x3d20 -#define MGAREG_BESGLOBCTL 0x3dc0 -#define MGAREG_BESHCOORD 0x3d28 -#define MGAREG_BESHISCAL 0x3d30 -#define MGAREG_BESHSRCEND 0x3d3c -#define MGAREG_BESHSRCLST 0x3d50 -#define MGAREG_BESHSRCST 0x3d38 -#define MGAREG_BESLUMACTL 0x3d40 -#define MGAREG_BESPITCH 0x3d24 -#define MGAREG_BESV1SRCLST 0x3d54 -#define MGAREG_BESV1WGHT 0x3d48 -#define MGAREG_BESVCOORD 0x3d2c -#define MGAREG_BESVISCAL 0x3d34 - -/* texture engine registers */ - -#define MGAREG_TMR0 0x2c00 -#define MGAREG_TMR1 0x2c04 -#define MGAREG_TMR2 0x2c08 -#define MGAREG_TMR3 0x2c0c -#define MGAREG_TMR4 0x2c10 -#define MGAREG_TMR5 0x2c14 -#define MGAREG_TMR6 0x2c18 -#define MGAREG_TMR7 0x2c1c -#define MGAREG_TMR8 0x2c20 -#define MGAREG_TEXORG 0x2c24 -#define MGAREG_TEXWIDTH 0x2c28 -#define MGAREG_TEXHEIGHT 0x2c2c -#define MGAREG_TEXCTL 0x2c30 -#define MGAREG_TEXCTL2 0x2c3c -#define MGAREG_TEXTRANS 0x2c34 -#define MGAREG_TEXTRANSHIGH 0x2c38 -#define MGAREG_TEXFILTER 0x2c58 -#define MGAREG_ALPHASTART 0x2c70 -#define MGAREG_ALPHAXINC 0x2c74 -#define MGAREG_ALPHAYINC 0x2c78 -#define MGAREG_ALPHACTRL 0x2c7c -#define MGAREG_DWGSYNC 0x2c4c - -#define MGAREG_AGP_PLL 0x1e4c -#define MGA_AGP2XPLL_ENABLE 0x1 -#define MGA_AGP2XPLL_DISABLE 0x0 - -#endif |