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authormarha <marha@users.sourceforge.net>2013-06-04 09:07:26 +0200
committermarha <marha@users.sourceforge.net>2013-06-04 09:48:59 +0200
commitfd2b28971a2afbf54b6cb641aa6a2d5e940a1450 (patch)
tree1b103a8b2114125ffa8d79827d931aba3744a0d2 /mesalib/src/glsl/ir.h
parent62a1ce0583cf41c173f4edb91511430b552e04da (diff)
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Diffstat (limited to 'mesalib/src/glsl/ir.h')
-rw-r--r--mesalib/src/glsl/ir.h68
1 files changed, 65 insertions, 3 deletions
diff --git a/mesalib/src/glsl/ir.h b/mesalib/src/glsl/ir.h
index 0c3e39979..6d4150136 100644
--- a/mesalib/src/glsl/ir.h
+++ b/mesalib/src/glsl/ir.h
@@ -131,6 +131,7 @@ public:
virtual class ir_swizzle * as_swizzle() { return NULL; }
virtual class ir_constant * as_constant() { return NULL; }
virtual class ir_discard * as_discard() { return NULL; }
+ virtual class ir_jump * as_jump() { return NULL; }
/*@}*/
protected:
@@ -273,7 +274,8 @@ enum ir_variable_mode {
ir_var_function_inout,
ir_var_const_in, /**< "in" param that must be a constant expression */
ir_var_system_value, /**< Ex: front-face, instance-id, etc. */
- ir_var_temporary /**< Temporary variable generated during compilation. */
+ ir_var_temporary, /**< Temporary variable generated during compilation. */
+ ir_var_mode_count /**< Number of variable modes */
};
/**
@@ -1031,6 +1033,16 @@ enum ir_expression_operation {
ir_unop_unpack_half_2x16_split_y,
/*@}*/
+ /**
+ * \name Bit operations, part of ARB_gpu_shader5.
+ */
+ /*@{*/
+ ir_unop_bitfield_reverse,
+ ir_unop_bit_count,
+ ir_unop_find_msb,
+ ir_unop_find_lsb,
+ /*@}*/
+
ir_unop_noise,
/**
@@ -1107,6 +1119,15 @@ enum ir_expression_operation {
/*@}*/
/**
+ * \name First half of a lowered bitfieldInsert() operation.
+ *
+ * \see lower_instructions::bitfield_insert_to_bfm_bfi
+ */
+ /*@{*/
+ ir_binop_bfm,
+ /*@}*/
+
+ /**
* Load a value the size of a given GLSL type from a uniform block.
*
* operand0 is the ir_constant uniform block index in the linked shader.
@@ -1115,20 +1136,55 @@ enum ir_expression_operation {
ir_binop_ubo_load,
/**
+ * Extract a scalar from a vector
+ *
+ * operand0 is the vector
+ * operand1 is the index of the field to read from operand0
+ */
+ ir_binop_vector_extract,
+
+ /**
* A sentinel marking the last of the binary operations.
*/
- ir_last_binop = ir_binop_ubo_load,
+ ir_last_binop = ir_binop_vector_extract,
ir_triop_lrp,
/**
+ * \name Second half of a lowered bitfieldInsert() operation.
+ *
+ * \see lower_instructions::bitfield_insert_to_bfm_bfi
+ */
+ /*@{*/
+ ir_triop_bfi,
+ /*@}*/
+
+ ir_triop_bitfield_extract,
+
+ /**
+ * Generate a value with one field of a vector changed
+ *
+ * operand0 is the vector
+ * operand1 is the value to write into the vector result
+ * operand2 is the index in operand0 to be modified
+ */
+ ir_triop_vector_insert,
+
+ /**
* A sentinel marking the last of the ternary operations.
*/
- ir_last_triop = ir_triop_lrp,
+ ir_last_triop = ir_triop_vector_insert,
+
+ ir_quadop_bitfield_insert,
ir_quadop_vector,
/**
+ * A sentinel marking the last of the ternary operations.
+ */
+ ir_last_quadop = ir_quadop_vector,
+
+ /**
* A sentinel marking the last of all operations.
*/
ir_last_opcode = ir_quadop_vector
@@ -1297,6 +1353,12 @@ protected:
{
ir_type = ir_type_unset;
}
+
+public:
+ virtual ir_jump *as_jump()
+ {
+ return this;
+ }
};
class ir_return : public ir_jump {