diff options
| author | marha <marha@users.sourceforge.net> | 2015-06-15 20:27:26 +0200 |
|---|---|---|
| committer | marha <marha@users.sourceforge.net> | 2015-06-15 20:27:26 +0200 |
| commit | e8d5e7c4bb11f7fcb0a4ba5c13f43e7929849a2f (patch) | |
| tree | a88d66b3d34f8e008f08e2bd77889c6c6718ab11 /mesalib/src/glsl/nir/nir_intrinsics.h | |
| parent | 0b3be550b20ad9f991f77bf979b2c306a7d4ef11 (diff) | |
| download | vcxsrv-release/external.tar.gz vcxsrv-release/external.tar.bz2 vcxsrv-release/external.zip | |
fontconfig libX11 libxcb xcb-proto mesa pixman xserver xkeyboard-config git update 15 June 2015release/external
xserver commit fa12f2c150b2f50de9dac4a2b09265f13af353af
libxcb commit f85661c3bca97faa72431df92a3867be39a74e23
libxcb/xcb-proto commit fef8a4cdc2cacd9541a656026371a3d338dadb8e
xkeyboard-config commit 61fb58a95a071cc1c212f6d3808908c086219fe0
libX11 commit f0286b2770ece10aef5e2e8c004260217f12fd25
pixman commit eebc1b78200aff075dbcae9c8d00edad1f830d91
fontconfig commit f6d61c9beed856a925bd60c025b55284b2d88161
mesa commit 932d1613d1e15ec22555e5ec09105c49eb850e36
Diffstat (limited to 'mesalib/src/glsl/nir/nir_intrinsics.h')
| -rw-r--r-- | mesalib/src/glsl/nir/nir_intrinsics.h | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/mesalib/src/glsl/nir/nir_intrinsics.h b/mesalib/src/glsl/nir/nir_intrinsics.h index 10192c531..bc6e6b8f4 100644 --- a/mesalib/src/glsl/nir/nir_intrinsics.h +++ b/mesalib/src/glsl/nir/nir_intrinsics.h @@ -67,6 +67,7 @@ INTRINSIC(interp_var_at_offset, 1, ARR(2), true, 0, 1, 0, */ #define BARRIER(name) INTRINSIC(name, 0, ARR(), false, 0, 0, 0, 0) +BARRIER(barrier) BARRIER(discard) /* @@ -138,12 +139,11 @@ SYSTEM_VALUE(sample_mask_in, 1) SYSTEM_VALUE(invocation_id, 1) /* - * The first index is the address to load from, and the second index is the - * number of array elements to load. Indirect loads have an additional - * register input, which is added to the constant address to compute the - * final address to load from. For UBO's (and SSBO's), the first source is - * the (possibly constant) UBO buffer index and the indirect (if it exists) - * is the second source. + * The first and only index is the base address to load from. Indirect + * loads have an additional register input, which is added to the constant + * address to compute the final address to load from. For UBO's (and + * SSBO's), the first source is the (possibly constant) UBO buffer index + * and the indirect (if it exists) is the second source. * * For vector backends, the address is in terms of one vec4, and so each array * element is +4 scalar components from the previous array element. For scalar @@ -152,9 +152,9 @@ SYSTEM_VALUE(invocation_id, 1) */ #define LOAD(name, extra_srcs, flags) \ - INTRINSIC(load_##name, extra_srcs, ARR(1), true, 0, 0, 2, flags) \ + INTRINSIC(load_##name, extra_srcs, ARR(1), true, 0, 0, 1, flags) \ INTRINSIC(load_##name##_indirect, extra_srcs + 1, ARR(1, 1), \ - true, 0, 0, 2, flags) + true, 0, 0, 1, flags) LOAD(uniform, 0, NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER) LOAD(ubo, 1, NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER) @@ -172,7 +172,7 @@ LOAD(input, 0, NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER) INTRINSIC(store_##name##_indirect, 2, ARR(0, 1), false, 0, 0, \ num_indices, flags) \ -STORE(output, 2, 0) -/* STORE(ssbo, 3, 0) */ +STORE(output, 1, 0) +/* STORE(ssbo, 2, 0) */ LAST_INTRINSIC(store_output_indirect) |