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author | marha <marha@users.sourceforge.net> | 2012-07-04 10:41:31 +0200 |
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committer | marha <marha@users.sourceforge.net> | 2012-07-04 10:41:31 +0200 |
commit | b3daaeb1467f3d3d52bef2f76413f3a063fc4f33 (patch) | |
tree | 4415e903a15dff8b36bba9fcce197d26a7790186 /mesalib/src/glsl | |
parent | e44d0067ca65d58f258e7f2ae1a240c9bfce5766 (diff) | |
parent | fc8f37239f3af088819c18f5632b2608954af73a (diff) | |
download | vcxsrv-b3daaeb1467f3d3d52bef2f76413f3a063fc4f33.tar.gz vcxsrv-b3daaeb1467f3d3d52bef2f76413f3a063fc4f33.tar.bz2 vcxsrv-b3daaeb1467f3d3d52bef2f76413f3a063fc4f33.zip |
Merge remote-tracking branch 'origin/released'
Conflicts:
xorg-server/include/misc.h
xorg-server/os/utils.c
Diffstat (limited to 'mesalib/src/glsl')
-rw-r--r-- | mesalib/src/glsl/ir.h | 4 | ||||
-rw-r--r-- | mesalib/src/glsl/lower_instructions.cpp | 4 |
2 files changed, 2 insertions, 6 deletions
diff --git a/mesalib/src/glsl/ir.h b/mesalib/src/glsl/ir.h index 505d2e74b..b54e2f2e0 100644 --- a/mesalib/src/glsl/ir.h +++ b/mesalib/src/glsl/ir.h @@ -1245,7 +1245,6 @@ public: { this->ir_type = ir_type_loop_jump; this->mode = mode; - this->loop = loop; } virtual ir_loop_jump *clone(void *mem_ctx, struct hash_table *) const; @@ -1269,9 +1268,6 @@ public: /** Mode selector for the jump instruction. */ enum jump_mode mode; -private: - /** Loop containing this break instruction. */ - ir_loop *loop; }; /** diff --git a/mesalib/src/glsl/lower_instructions.cpp b/mesalib/src/glsl/lower_instructions.cpp index d79eb0a7f..a8ef7654e 100644 --- a/mesalib/src/glsl/lower_instructions.cpp +++ b/mesalib/src/glsl/lower_instructions.cpp @@ -50,7 +50,7 @@ * * DIV_TO_MUL_RCP and INT_DIV_TO_MUL_RCP: * -------------------------------------- - * Breaks an ir_unop_div expression down to op0 * (rcp(op1)). + * Breaks an ir_binop_div expression down to op0 * (rcp(op1)). * * Many GPUs don't have a divide instruction (945 and 965 included), * but they do have an RCP instruction to compute an approximate @@ -74,7 +74,7 @@ * * MOD_TO_FRACT: * ------------- - * Breaks an ir_unop_mod expression down to (op1 * fract(op0 / op1)) + * Breaks an ir_binop_mod expression down to (op1 * fract(op0 / op1)) * * Many GPUs don't have a MOD instruction (945 and 965 included), and * if we have to break it down like this anyway, it gives an |