aboutsummaryrefslogtreecommitdiff
path: root/xorg-server/hw/kdrive/ati
diff options
context:
space:
mode:
authormarha <marha@users.sourceforge.net>2009-06-28 22:07:26 +0000
committermarha <marha@users.sourceforge.net>2009-06-28 22:07:26 +0000
commit3562e78743202e43aec8727005182a2558117eca (patch)
tree8f9113a77d12470c5c851a2a8e4cb02e89df7d43 /xorg-server/hw/kdrive/ati
downloadvcxsrv-3562e78743202e43aec8727005182a2558117eca.tar.gz
vcxsrv-3562e78743202e43aec8727005182a2558117eca.tar.bz2
vcxsrv-3562e78743202e43aec8727005182a2558117eca.zip
Checked in the following released items:
xkeyboard-config-1.4.tar.gz ttf-bitstream-vera-1.10.tar.gz font-alias-1.0.1.tar.gz font-sun-misc-1.0.0.tar.gz font-sun-misc-1.0.0.tar.gz font-sony-misc-1.0.0.tar.gz font-schumacher-misc-1.0.0.tar.gz font-mutt-misc-1.0.0.tar.gz font-misc-misc-1.0.0.tar.gz font-misc-meltho-1.0.0.tar.gz font-micro-misc-1.0.0.tar.gz font-jis-misc-1.0.0.tar.gz font-isas-misc-1.0.0.tar.gz font-dec-misc-1.0.0.tar.gz font-daewoo-misc-1.0.0.tar.gz font-cursor-misc-1.0.0.tar.gz font-arabic-misc-1.0.0.tar.gz font-winitzki-cyrillic-1.0.0.tar.gz font-misc-cyrillic-1.0.0.tar.gz font-cronyx-cyrillic-1.0.0.tar.gz font-screen-cyrillic-1.0.1.tar.gz font-xfree86-type1-1.0.1.tar.gz font-adobe-utopia-type1-1.0.1.tar.gz font-ibm-type1-1.0.0.tar.gz font-bitstream-type1-1.0.0.tar.gz font-bitstream-speedo-1.0.0.tar.gz font-bh-ttf-1.0.0.tar.gz font-bh-type1-1.0.0.tar.gz font-bitstream-100dpi-1.0.0.tar.gz font-bh-lucidatypewriter-100dpi-1.0.0.tar.gz font-bh-100dpi-1.0.0.tar.gz font-adobe-utopia-100dpi-1.0.1.tar.gz font-adobe-100dpi-1.0.0.tar.gz font-util-1.0.1.tar.gz font-bitstream-75dpi-1.0.0.tar.gz font-bh-lucidatypewriter-75dpi-1.0.0.tar.gz font-adobe-utopia-75dpi-1.0.1.tar.gz font-bh-75dpi-1.0.0.tar.gz bdftopcf-1.0.1.tar.gz font-adobe-75dpi-1.0.0.tar.gz mkfontscale-1.0.6.tar.gz openssl-0.9.8k.tar.gz bigreqsproto-1.0.2.tar.gz xtrans-1.2.2.tar.gz resourceproto-1.0.2.tar.gz inputproto-1.4.4.tar.gz compositeproto-0.4.tar.gz damageproto-1.1.0.tar.gz zlib-1.2.3.tar.gz xkbcomp-1.0.5.tar.gz freetype-2.3.9.tar.gz pthreads-w32-2-8-0-release.tar.gz pixman-0.12.0.tar.gz kbproto-1.0.3.tar.gz evieext-1.0.2.tar.gz fixesproto-4.0.tar.gz recordproto-1.13.2.tar.gz randrproto-1.2.2.tar.gz scrnsaverproto-1.1.0.tar.gz renderproto-0.9.3.tar.gz xcmiscproto-1.1.2.tar.gz fontsproto-2.0.2.tar.gz xextproto-7.0.3.tar.gz xproto-7.0.14.tar.gz libXdmcp-1.0.2.tar.gz libxkbfile-1.0.5.tar.gz libfontenc-1.0.4.tar.gz libXfont-1.3.4.tar.gz libX11-1.1.5.tar.gz libXau-1.0.4.tar.gz libxcb-1.1.tar.gz xorg-server-1.5.3.tar.gz
Diffstat (limited to 'xorg-server/hw/kdrive/ati')
-rw-r--r--xorg-server/hw/kdrive/ati/Makefile.am74
-rw-r--r--xorg-server/hw/kdrive/ati/Makefile.in757
-rw-r--r--xorg-server/hw/kdrive/ati/ati.c761
-rw-r--r--xorg-server/hw/kdrive/ati/ati.h409
-rw-r--r--xorg-server/hw/kdrive/ati/ati_cursor.c559
-rw-r--r--xorg-server/hw/kdrive/ati/ati_dma.c1037
-rw-r--r--xorg-server/hw/kdrive/ati/ati_dma.h141
-rw-r--r--xorg-server/hw/kdrive/ati/ati_draw.c918
-rw-r--r--xorg-server/hw/kdrive/ati/ati_draw.h93
-rw-r--r--xorg-server/hw/kdrive/ati/ati_microcode.c857
-rw-r--r--xorg-server/hw/kdrive/ati/ati_reg.h1927
-rw-r--r--xorg-server/hw/kdrive/ati/ati_stub.c77
-rw-r--r--xorg-server/hw/kdrive/ati/ati_video.c988
-rw-r--r--xorg-server/hw/kdrive/ati/r128_composite.c564
-rw-r--r--xorg-server/hw/kdrive/ati/radeon_composite.c875
15 files changed, 10037 insertions, 0 deletions
diff --git a/xorg-server/hw/kdrive/ati/Makefile.am b/xorg-server/hw/kdrive/ati/Makefile.am
new file mode 100644
index 000000000..31462bb04
--- /dev/null
+++ b/xorg-server/hw/kdrive/ati/Makefile.am
@@ -0,0 +1,74 @@
+#if DRI
+#DRI_INCLUDES = -I$(top_srcdir)/dri \
+# -I$(top_srcdir)/drm
+#DRI_LIBS = $(top_builddir)/dri/libdri.a \
+# $(top_builddir)/drm/libdrm.a
+#DRI_SOURCES = ati_dri.c \
+# ati_dri.h \
+# ati_dripriv.h \
+# r128_common.h \
+# r128_sarea.h \
+# radeon_common.h \
+# radeon_sarea.h
+#endif
+
+if KDRIVEFBDEV
+FBDEV_INCLUDES =-I$(top_srcdir)/hw/kdrive/fbdev
+FBDEV_LIBS = $(top_builddir)/hw/kdrive/fbdev/libfbdev.a
+endif
+
+if KDRIVEVESA
+VESA_INCLUDES = -I$(top_srcdir)/hw/kdrive/vesa
+VESA_LIBS = $(top_builddir)/hw/kdrive/vesa/libvesa.a
+endif
+
+INCLUDES = \
+ @KDRIVE_INCS@ \
+ $(DRI_INCLUDES) \
+ $(FBDEV_INCLUDES) \
+ $(VESA_INCLUDES) \
+ @KDRIVE_CFLAGS@
+
+bin_PROGRAMS = Xati
+
+noinst_LIBRARIES = libati.a
+
+libati_a_SOURCES = \
+ ati_cursor.c \
+ ati_dma.c \
+ ati_dma.h \
+ ati_draw.c \
+ ati_draw.h \
+ ati_microcode.c \
+ ati.c \
+ ati.h \
+ ati_reg.h \
+ r128_composite.c \
+ ati_video.c \
+ radeon_composite.c \
+ $(DRI_SOURCES)
+
+Xati_SOURCES = \
+ ati_stub.c
+
+ATI_LIBS = \
+ libati.a \
+ $(FBDEV_LIBS) \
+ $(VESA_LIBS) \
+ $(DRI_LIBS) \
+ @KDRIVE_LIBS@
+
+if GLX
+Xati_LDFLAGS = $(LD_EXPORT_SYMBOLS_FLAG)
+endif
+
+Xati_LDADD = \
+ $(ATI_LIBS) \
+ @KDRIVE_LIBS@
+
+Xati_DEPENDENCIES = \
+ libati.a \
+ @KDRIVE_LOCAL_LIBS@
+
+relink:
+ rm -f $(bin_PROGRAMS) && make $(bin_PROGRAMS)
diff --git a/xorg-server/hw/kdrive/ati/Makefile.in b/xorg-server/hw/kdrive/ati/Makefile.in
new file mode 100644
index 000000000..b38d1a16e
--- /dev/null
+++ b/xorg-server/hw/kdrive/ati/Makefile.in
@@ -0,0 +1,757 @@
+# Makefile.in generated by automake 1.10.1 from Makefile.am.
+# @configure_input@
+
+# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+# 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
+# This Makefile.in is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
+# PARTICULAR PURPOSE.
+
+@SET_MAKE@
+
+#if DRI
+#DRI_INCLUDES = -I$(top_srcdir)/dri \
+# -I$(top_srcdir)/drm
+#DRI_LIBS = $(top_builddir)/dri/libdri.a \
+# $(top_builddir)/drm/libdrm.a
+#DRI_SOURCES = ati_dri.c \
+# ati_dri.h \
+# ati_dripriv.h \
+# r128_common.h \
+# r128_sarea.h \
+# radeon_common.h \
+# radeon_sarea.h
+#endif
+
+
+VPATH = @srcdir@
+pkgdatadir = $(datadir)/@PACKAGE@
+pkglibdir = $(libdir)/@PACKAGE@
+pkgincludedir = $(includedir)/@PACKAGE@
+am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd
+install_sh_DATA = $(install_sh) -c -m 644
+install_sh_PROGRAM = $(install_sh) -c
+install_sh_SCRIPT = $(install_sh) -c
+INSTALL_HEADER = $(INSTALL_DATA)
+transform = $(program_transform_name)
+NORMAL_INSTALL = :
+PRE_INSTALL = :
+POST_INSTALL = :
+NORMAL_UNINSTALL = :
+PRE_UNINSTALL = :
+POST_UNINSTALL = :
+build_triplet = @build@
+host_triplet = @host@
+bin_PROGRAMS = Xati$(EXEEXT)
+subdir = hw/kdrive/ati
+DIST_COMMON = $(srcdir)/Makefile.am $(srcdir)/Makefile.in
+ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
+am__aclocal_m4_deps = $(top_srcdir)/acinclude.m4 \
+ $(top_srcdir)/configure.ac
+am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \
+ $(ACLOCAL_M4)
+mkinstalldirs = $(install_sh) -d
+CONFIG_HEADER = $(top_builddir)/include/do-not-use-config.h \
+ $(top_builddir)/include/xorg-server.h \
+ $(top_builddir)/include/dix-config.h \
+ $(top_builddir)/include/xgl-config.h \
+ $(top_builddir)/include/xorg-config.h \
+ $(top_builddir)/include/xkb-config.h \
+ $(top_builddir)/include/xwin-config.h \
+ $(top_builddir)/include/kdrive-config.h
+CONFIG_CLEAN_FILES =
+LIBRARIES = $(noinst_LIBRARIES)
+ARFLAGS = cru
+libati_a_AR = $(AR) $(ARFLAGS)
+libati_a_LIBADD =
+am_libati_a_OBJECTS = ati_cursor.$(OBJEXT) ati_dma.$(OBJEXT) \
+ ati_draw.$(OBJEXT) ati_microcode.$(OBJEXT) ati.$(OBJEXT) \
+ r128_composite.$(OBJEXT) ati_video.$(OBJEXT) \
+ radeon_composite.$(OBJEXT)
+libati_a_OBJECTS = $(am_libati_a_OBJECTS)
+am__installdirs = "$(DESTDIR)$(bindir)"
+binPROGRAMS_INSTALL = $(INSTALL_PROGRAM)
+PROGRAMS = $(bin_PROGRAMS)
+am_Xati_OBJECTS = ati_stub.$(OBJEXT)
+Xati_OBJECTS = $(am_Xati_OBJECTS)
+am__DEPENDENCIES_1 = libati.a $(FBDEV_LIBS) $(VESA_LIBS)
+Xati_LINK = $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) \
+ --mode=link $(CCLD) $(AM_CFLAGS) $(CFLAGS) $(Xati_LDFLAGS) \
+ $(LDFLAGS) -o $@
+DEFAULT_INCLUDES = -I.@am__isrc@ -I$(top_builddir)/include
+depcomp = $(SHELL) $(top_srcdir)/depcomp
+am__depfiles_maybe = depfiles
+COMPILE = $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) \
+ $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS)
+LTCOMPILE = $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) \
+ --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) \
+ $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS)
+CCLD = $(CC)
+LINK = $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) \
+ --mode=link $(CCLD) $(AM_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) \
+ $(LDFLAGS) -o $@
+SOURCES = $(libati_a_SOURCES) $(Xati_SOURCES)
+DIST_SOURCES = $(libati_a_SOURCES) $(Xati_SOURCES)
+ETAGS = etags
+CTAGS = ctags
+DISTFILES = $(DIST_COMMON) $(DIST_SOURCES) $(TEXINFOS) $(EXTRA_DIST)
+ACLOCAL = @ACLOCAL@
+ADMIN_MAN_DIR = @ADMIN_MAN_DIR@
+ADMIN_MAN_SUFFIX = @ADMIN_MAN_SUFFIX@
+ALLOCA = @ALLOCA@
+AMTAR = @AMTAR@
+APPDEFAULTDIR = @APPDEFAULTDIR@
+APPLE_APPLICATIONS_DIR = @APPLE_APPLICATIONS_DIR@
+APP_MAN_DIR = @APP_MAN_DIR@
+APP_MAN_SUFFIX = @APP_MAN_SUFFIX@
+AR = @AR@
+AS = @AS@
+AUTOCONF = @AUTOCONF@
+AUTOHEADER = @AUTOHEADER@
+AUTOMAKE = @AUTOMAKE@
+AWK = @AWK@
+BASE_FONT_PATH = @BASE_FONT_PATH@
+BUILD_DATE = @BUILD_DATE@
+BUILD_TIME = @BUILD_TIME@
+CC = @CC@
+CCAS = @CCAS@
+CCASDEPMODE = @CCASDEPMODE@
+CCASFLAGS = @CCASFLAGS@
+CCDEPMODE = @CCDEPMODE@
+CFLAGS = @CFLAGS@
+COMPILEDDEFAULTFONTPATH = @COMPILEDDEFAULTFONTPATH@
+CPP = @CPP@
+CPPFLAGS = @CPPFLAGS@
+CXX = @CXX@
+CXXCPP = @CXXCPP@
+CXXDEPMODE = @CXXDEPMODE@
+CXXFLAGS = @CXXFLAGS@
+CYGPATH_W = @CYGPATH_W@
+DARWIN_LIBS = @DARWIN_LIBS@
+DBUS_CFLAGS = @DBUS_CFLAGS@
+DBUS_LIBS = @DBUS_LIBS@
+DEFAULT_LIBRARY_PATH = @DEFAULT_LIBRARY_PATH@
+DEFAULT_LOGPREFIX = @DEFAULT_LOGPREFIX@
+DEFAULT_MODULE_PATH = @DEFAULT_MODULE_PATH@
+DEFS = @DEFS@
+DEPDIR = @DEPDIR@
+DGA_CFLAGS = @DGA_CFLAGS@
+DGA_LIBS = @DGA_LIBS@
+DIX_CFLAGS = @DIX_CFLAGS@
+DLLTOOL = @DLLTOOL@
+DMXEXAMPLES_DEP_CFLAGS = @DMXEXAMPLES_DEP_CFLAGS@
+DMXEXAMPLES_DEP_LIBS = @DMXEXAMPLES_DEP_LIBS@
+DMXMODULES_CFLAGS = @DMXMODULES_CFLAGS@
+DMXMODULES_LIBS = @DMXMODULES_LIBS@
+DMXXIEXAMPLES_DEP_CFLAGS = @DMXXIEXAMPLES_DEP_CFLAGS@
+DMXXIEXAMPLES_DEP_LIBS = @DMXXIEXAMPLES_DEP_LIBS@
+DMXXMUEXAMPLES_DEP_CFLAGS = @DMXXMUEXAMPLES_DEP_CFLAGS@
+DMXXMUEXAMPLES_DEP_LIBS = @DMXXMUEXAMPLES_DEP_LIBS@
+DRI2PROTO_CFLAGS = @DRI2PROTO_CFLAGS@
+DRI2PROTO_LIBS = @DRI2PROTO_LIBS@
+DRIPROTO_CFLAGS = @DRIPROTO_CFLAGS@
+DRIPROTO_LIBS = @DRIPROTO_LIBS@
+DRIVER_MAN_DIR = @DRIVER_MAN_DIR@
+DRIVER_MAN_SUFFIX = @DRIVER_MAN_SUFFIX@
+DRI_DRIVER_PATH = @DRI_DRIVER_PATH@
+DSYMUTIL = @DSYMUTIL@
+DTRACE = @DTRACE@
+ECHO = @ECHO@
+ECHO_C = @ECHO_C@
+ECHO_N = @ECHO_N@
+ECHO_T = @ECHO_T@
+EGREP = @EGREP@
+EXEEXT = @EXEEXT@
+F77 = @F77@
+FFLAGS = @FFLAGS@
+FILE_MAN_DIR = @FILE_MAN_DIR@
+FILE_MAN_SUFFIX = @FILE_MAN_SUFFIX@
+FREETYPE_CFLAGS = @FREETYPE_CFLAGS@
+FREETYPE_LIBS = @FREETYPE_LIBS@
+GLX_ARCH_DEFINES = @GLX_ARCH_DEFINES@
+GLX_DEFINES = @GLX_DEFINES@
+GL_CFLAGS = @GL_CFLAGS@
+GL_LIBS = @GL_LIBS@
+GREP = @GREP@
+HAL_CFLAGS = @HAL_CFLAGS@
+HAL_LIBS = @HAL_LIBS@
+INSTALL = @INSTALL@
+INSTALL_DATA = @INSTALL_DATA@
+INSTALL_PROGRAM = @INSTALL_PROGRAM@
+INSTALL_SCRIPT = @INSTALL_SCRIPT@
+INSTALL_STRIP_PROGRAM = @INSTALL_STRIP_PROGRAM@
+KDRIVE_CFLAGS = @KDRIVE_CFLAGS@
+KDRIVE_INCS = @KDRIVE_INCS@
+KDRIVE_LIBS = @KDRIVE_LIBS@
+KDRIVE_LOCAL_LIBS = @KDRIVE_LOCAL_LIBS@
+KDRIVE_PURE_INCS = @KDRIVE_PURE_INCS@
+KDRIVE_PURE_LIBS = @KDRIVE_PURE_LIBS@
+LAUNCHD = @LAUNCHD@
+LDFLAGS = @LDFLAGS@
+LD_EXPORT_SYMBOLS_FLAG = @LD_EXPORT_SYMBOLS_FLAG@
+LEX = @LEX@
+LEXLIB = @LEXLIB@
+LEX_OUTPUT_ROOT = @LEX_OUTPUT_ROOT@
+LIBDRM_CFLAGS = @LIBDRM_CFLAGS@
+LIBDRM_LIBS = @LIBDRM_LIBS@
+LIBOBJS = @LIBOBJS@
+LIBS = @LIBS@
+LIBTOOL = @LIBTOOL@
+LIB_MAN_DIR = @LIB_MAN_DIR@
+LIB_MAN_SUFFIX = @LIB_MAN_SUFFIX@
+LINUXDOC = @LINUXDOC@
+LN_S = @LN_S@
+LTLIBOBJS = @LTLIBOBJS@
+MAINT = @MAINT@
+MAKEINFO = @MAKEINFO@
+MAKE_HTML = @MAKE_HTML@
+MAKE_PDF = @MAKE_PDF@
+MAKE_PS = @MAKE_PS@
+MAKE_TEXT = @MAKE_TEXT@
+MESA_SOURCE = @MESA_SOURCE@
+MISC_MAN_DIR = @MISC_MAN_DIR@
+MISC_MAN_SUFFIX = @MISC_MAN_SUFFIX@
+MKDIR_P = @MKDIR_P@
+MKFONTDIR = @MKFONTDIR@
+MKFONTSCALE = @MKFONTSCALE@
+NMEDIT = @NMEDIT@
+OBJC = @OBJC@
+OBJCCLD = @OBJCCLD@
+OBJCDEPMODE = @OBJCDEPMODE@
+OBJCFLAGS = @OBJCFLAGS@
+OBJCLINK = @OBJCLINK@
+OBJDUMP = @OBJDUMP@
+OBJEXT = @OBJEXT@
+OPENSSL_CFLAGS = @OPENSSL_CFLAGS@
+OPENSSL_LIBS = @OPENSSL_LIBS@
+PACKAGE = @PACKAGE@
+PACKAGE_BUGREPORT = @PACKAGE_BUGREPORT@
+PACKAGE_NAME = @PACKAGE_NAME@
+PACKAGE_STRING = @PACKAGE_STRING@
+PACKAGE_TARNAME = @PACKAGE_TARNAME@
+PACKAGE_VERSION = @PACKAGE_VERSION@
+PATH_SEPARATOR = @PATH_SEPARATOR@
+PCIACCESS_CFLAGS = @PCIACCESS_CFLAGS@
+PCIACCESS_LIBS = @PCIACCESS_LIBS@
+PCI_TXT_IDS_PATH = @PCI_TXT_IDS_PATH@
+PERL = @PERL@
+PKG_CONFIG = @PKG_CONFIG@
+PROJECTROOT = @PROJECTROOT@
+PS2PDF = @PS2PDF@
+RANLIB = @RANLIB@
+RAWCPP = @RAWCPP@
+RAWCPPFLAGS = @RAWCPPFLAGS@
+SED = @SED@
+SERVER_MISC_CONFIG_PATH = @SERVER_MISC_CONFIG_PATH@
+SET_MAKE = @SET_MAKE@
+SHELL = @SHELL@
+SOLARIS_ASM_CFLAGS = @SOLARIS_ASM_CFLAGS@
+SOLARIS_INOUT_ARCH = @SOLARIS_INOUT_ARCH@
+STRIP = @STRIP@
+TSLIB_CFLAGS = @TSLIB_CFLAGS@
+TSLIB_LIBS = @TSLIB_LIBS@
+UTILS_SYS_LIBS = @UTILS_SYS_LIBS@
+VENDOR_MAN_VERSION = @VENDOR_MAN_VERSION@
+VENDOR_NAME = @VENDOR_NAME@
+VENDOR_NAME_SHORT = @VENDOR_NAME_SHORT@
+VENDOR_RELEASE = @VENDOR_RELEASE@
+VERSION = @VERSION@
+X11APP_ARCHS = @X11APP_ARCHS@
+X11EXAMPLES_DEP_CFLAGS = @X11EXAMPLES_DEP_CFLAGS@
+X11EXAMPLES_DEP_LIBS = @X11EXAMPLES_DEP_LIBS@
+XDMCP_CFLAGS = @XDMCP_CFLAGS@
+XDMCP_LIBS = @XDMCP_LIBS@
+XDMXCONFIG_DEP_CFLAGS = @XDMXCONFIG_DEP_CFLAGS@
+XDMXCONFIG_DEP_LIBS = @XDMXCONFIG_DEP_LIBS@
+XDMX_CFLAGS = @XDMX_CFLAGS@
+XDMX_LIBS = @XDMX_LIBS@
+XDMX_SYS_LIBS = @XDMX_SYS_LIBS@
+XEGLMODULES_CFLAGS = @XEGLMODULES_CFLAGS@
+XEGL_LIBS = @XEGL_LIBS@
+XEGL_SYS_LIBS = @XEGL_SYS_LIBS@
+XEPHYR_CFLAGS = @XEPHYR_CFLAGS@
+XEPHYR_DRI_LIBS = @XEPHYR_DRI_LIBS@
+XEPHYR_INCS = @XEPHYR_INCS@
+XEPHYR_LIBS = @XEPHYR_LIBS@
+XF86CONFIGFILE = @XF86CONFIGFILE@
+XF86MISC_CFLAGS = @XF86MISC_CFLAGS@
+XF86MISC_LIBS = @XF86MISC_LIBS@
+XF86VIDMODE_CFLAGS = @XF86VIDMODE_CFLAGS@
+XF86VIDMODE_LIBS = @XF86VIDMODE_LIBS@
+XGLMODULES_CFLAGS = @XGLMODULES_CFLAGS@
+XGLMODULES_LIBS = @XGLMODULES_LIBS@
+XGLXMODULES_CFLAGS = @XGLXMODULES_CFLAGS@
+XGLXMODULES_LIBS = @XGLXMODULES_LIBS@
+XGLX_LIBS = @XGLX_LIBS@
+XGLX_SYS_LIBS = @XGLX_SYS_LIBS@
+XGL_LIBS = @XGL_LIBS@
+XGL_MODULE_PATH = @XGL_MODULE_PATH@
+XGL_SYS_LIBS = @XGL_SYS_LIBS@
+XKB_BASE_DIRECTORY = @XKB_BASE_DIRECTORY@
+XKB_BIN_DIRECTORY = @XKB_BIN_DIRECTORY@
+XKB_COMPILED_DIR = @XKB_COMPILED_DIR@
+XKM_OUTPUT_DIR = @XKM_OUTPUT_DIR@
+XLIB_CFLAGS = @XLIB_CFLAGS@
+XLIB_LIBS = @XLIB_LIBS@
+XNESTMODULES_CFLAGS = @XNESTMODULES_CFLAGS@
+XNESTMODULES_LIBS = @XNESTMODULES_LIBS@
+XNEST_LIBS = @XNEST_LIBS@
+XNEST_SYS_LIBS = @XNEST_SYS_LIBS@
+XORGCFG_DEP_CFLAGS = @XORGCFG_DEP_CFLAGS@
+XORGCFG_DEP_LIBS = @XORGCFG_DEP_LIBS@
+XORGCONFIG_DEP_CFLAGS = @XORGCONFIG_DEP_CFLAGS@
+XORGCONFIG_DEP_LIBS = @XORGCONFIG_DEP_LIBS@
+XORG_CFLAGS = @XORG_CFLAGS@
+XORG_INCS = @XORG_INCS@
+XORG_LIBS = @XORG_LIBS@
+XORG_MODULES_CFLAGS = @XORG_MODULES_CFLAGS@
+XORG_MODULES_LIBS = @XORG_MODULES_LIBS@
+XORG_OS = @XORG_OS@
+XORG_OS_SUBDIR = @XORG_OS_SUBDIR@
+XORG_SYS_LIBS = @XORG_SYS_LIBS@
+XPRINTMODULES_CFLAGS = @XPRINTMODULES_CFLAGS@
+XPRINTMODULES_LIBS = @XPRINTMODULES_LIBS@
+XPRINTPROTO_CFLAGS = @XPRINTPROTO_CFLAGS@
+XPRINTPROTO_LIBS = @XPRINTPROTO_LIBS@
+XPRINT_CFLAGS = @XPRINT_CFLAGS@
+XPRINT_LIBS = @XPRINT_LIBS@
+XPRINT_SYS_LIBS = @XPRINT_SYS_LIBS@
+XRESEXAMPLES_DEP_CFLAGS = @XRESEXAMPLES_DEP_CFLAGS@
+XRESEXAMPLES_DEP_LIBS = @XRESEXAMPLES_DEP_LIBS@
+XSDL_INCS = @XSDL_INCS@
+XSDL_LIBS = @XSDL_LIBS@
+XSERVERCFLAGS_CFLAGS = @XSERVERCFLAGS_CFLAGS@
+XSERVERCFLAGS_LIBS = @XSERVERCFLAGS_LIBS@
+XSERVERLIBS_CFLAGS = @XSERVERLIBS_CFLAGS@
+XSERVERLIBS_LIBS = @XSERVERLIBS_LIBS@
+XSERVER_LIBS = @XSERVER_LIBS@
+XSERVER_SYS_LIBS = @XSERVER_SYS_LIBS@
+XTSTEXAMPLES_DEP_CFLAGS = @XTSTEXAMPLES_DEP_CFLAGS@
+XTSTEXAMPLES_DEP_LIBS = @XTSTEXAMPLES_DEP_LIBS@
+XVFB_LIBS = @XVFB_LIBS@
+XVFB_SYS_LIBS = @XVFB_SYS_LIBS@
+XWINMODULES_CFLAGS = @XWINMODULES_CFLAGS@
+XWINMODULES_LIBS = @XWINMODULES_LIBS@
+XWIN_LIBS = @XWIN_LIBS@
+XWIN_SERVER_NAME = @XWIN_SERVER_NAME@
+XWIN_SYS_LIBS = @XWIN_SYS_LIBS@
+YACC = @YACC@
+YFLAGS = @YFLAGS@
+__XCONFIGFILE__ = @__XCONFIGFILE__@
+abi_ansic = @abi_ansic@
+abi_extension = @abi_extension@
+abi_font = @abi_font@
+abi_videodrv = @abi_videodrv@
+abi_xinput = @abi_xinput@
+abs_builddir = @abs_builddir@
+abs_srcdir = @abs_srcdir@
+abs_top_builddir = @abs_top_builddir@
+abs_top_srcdir = @abs_top_srcdir@
+ac_ct_CC = @ac_ct_CC@
+ac_ct_CXX = @ac_ct_CXX@
+ac_ct_F77 = @ac_ct_F77@
+am__include = @am__include@
+am__leading_dot = @am__leading_dot@
+am__quote = @am__quote@
+am__tar = @am__tar@
+am__untar = @am__untar@
+bindir = @bindir@
+build = @build@
+build_alias = @build_alias@
+build_cpu = @build_cpu@
+build_os = @build_os@
+build_vendor = @build_vendor@
+builddir = @builddir@
+datadir = @datadir@
+datarootdir = @datarootdir@
+docdir = @docdir@
+driverdir = @driverdir@
+dvidir = @dvidir@
+exec_prefix = @exec_prefix@
+extdir = @extdir@
+ft_config = @ft_config@
+host = @host@
+host_alias = @host_alias@
+host_cpu = @host_cpu@
+host_os = @host_os@
+host_vendor = @host_vendor@
+htmldir = @htmldir@
+includedir = @includedir@
+infodir = @infodir@
+install_sh = @install_sh@
+launchagentsdir = @launchagentsdir@
+libdir = @libdir@
+libexecdir = @libexecdir@
+localedir = @localedir@
+localstatedir = @localstatedir@
+logdir = @logdir@
+mandir = @mandir@
+mkdir_p = @mkdir_p@
+moduledir = @moduledir@
+oldincludedir = @oldincludedir@
+pdfdir = @pdfdir@
+prefix = @prefix@
+program_transform_name = @program_transform_name@
+psdir = @psdir@
+sbindir = @sbindir@
+sdkdir = @sdkdir@
+sharedstatedir = @sharedstatedir@
+srcdir = @srcdir@
+sysconfdir = @sysconfdir@
+target_alias = @target_alias@
+top_build_prefix = @top_build_prefix@
+top_builddir = @top_builddir@
+top_srcdir = @top_srcdir@
+xglmoduledir = @xglmoduledir@
+xpconfigdir = @xpconfigdir@
+@KDRIVEFBDEV_TRUE@FBDEV_INCLUDES = -I$(top_srcdir)/hw/kdrive/fbdev
+@KDRIVEFBDEV_TRUE@FBDEV_LIBS = $(top_builddir)/hw/kdrive/fbdev/libfbdev.a
+@KDRIVEVESA_TRUE@VESA_INCLUDES = -I$(top_srcdir)/hw/kdrive/vesa
+@KDRIVEVESA_TRUE@VESA_LIBS = $(top_builddir)/hw/kdrive/vesa/libvesa.a
+INCLUDES = \
+ @KDRIVE_INCS@ \
+ $(DRI_INCLUDES) \
+ $(FBDEV_INCLUDES) \
+ $(VESA_INCLUDES) \
+ @KDRIVE_CFLAGS@
+
+noinst_LIBRARIES = libati.a
+libati_a_SOURCES = \
+ ati_cursor.c \
+ ati_dma.c \
+ ati_dma.h \
+ ati_draw.c \
+ ati_draw.h \
+ ati_microcode.c \
+ ati.c \
+ ati.h \
+ ati_reg.h \
+ r128_composite.c \
+ ati_video.c \
+ radeon_composite.c \
+ $(DRI_SOURCES)
+
+Xati_SOURCES = \
+ ati_stub.c
+
+ATI_LIBS = \
+ libati.a \
+ $(FBDEV_LIBS) \
+ $(VESA_LIBS) \
+ $(DRI_LIBS) \
+ @KDRIVE_LIBS@
+
+@GLX_TRUE@Xati_LDFLAGS = $(LD_EXPORT_SYMBOLS_FLAG)
+Xati_LDADD = \
+ $(ATI_LIBS) \
+ @KDRIVE_LIBS@
+
+Xati_DEPENDENCIES = \
+ libati.a \
+ @KDRIVE_LOCAL_LIBS@
+
+all: all-am
+
+.SUFFIXES:
+.SUFFIXES: .c .lo .o .obj
+$(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(am__configure_deps)
+ @for dep in $?; do \
+ case '$(am__configure_deps)' in \
+ *$$dep*) \
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh \
+ && exit 0; \
+ exit 1;; \
+ esac; \
+ done; \
+ echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign hw/kdrive/ati/Makefile'; \
+ cd $(top_srcdir) && \
+ $(AUTOMAKE) --foreign hw/kdrive/ati/Makefile
+.PRECIOUS: Makefile
+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
+ @case '$?' in \
+ *config.status*) \
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \
+ *) \
+ echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \
+ cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe);; \
+ esac;
+
+$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+$(top_srcdir)/configure: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+$(ACLOCAL_M4): @MAINTAINER_MODE_TRUE@ $(am__aclocal_m4_deps)
+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh
+
+clean-noinstLIBRARIES:
+ -test -z "$(noinst_LIBRARIES)" || rm -f $(noinst_LIBRARIES)
+libati.a: $(libati_a_OBJECTS) $(libati_a_DEPENDENCIES)
+ -rm -f libati.a
+ $(libati_a_AR) libati.a $(libati_a_OBJECTS) $(libati_a_LIBADD)
+ $(RANLIB) libati.a
+install-binPROGRAMS: $(bin_PROGRAMS)
+ @$(NORMAL_INSTALL)
+ test -z "$(bindir)" || $(MKDIR_P) "$(DESTDIR)$(bindir)"
+ @list='$(bin_PROGRAMS)'; for p in $$list; do \
+ p1=`echo $$p|sed 's/$(EXEEXT)$$//'`; \
+ if test -f $$p \
+ || test -f $$p1 \
+ ; then \
+ f=`echo "$$p1" | sed 's,^.*/,,;$(transform);s/$$/$(EXEEXT)/'`; \
+ echo " $(INSTALL_PROGRAM_ENV) $(LIBTOOL) $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=install $(binPROGRAMS_INSTALL) '$$p' '$(DESTDIR)$(bindir)/$$f'"; \
+ $(INSTALL_PROGRAM_ENV) $(LIBTOOL) $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=install $(binPROGRAMS_INSTALL) "$$p" "$(DESTDIR)$(bindir)/$$f" || exit 1; \
+ else :; fi; \
+ done
+
+uninstall-binPROGRAMS:
+ @$(NORMAL_UNINSTALL)
+ @list='$(bin_PROGRAMS)'; for p in $$list; do \
+ f=`echo "$$p" | sed 's,^.*/,,;s/$(EXEEXT)$$//;$(transform);s/$$/$(EXEEXT)/'`; \
+ echo " rm -f '$(DESTDIR)$(bindir)/$$f'"; \
+ rm -f "$(DESTDIR)$(bindir)/$$f"; \
+ done
+
+clean-binPROGRAMS:
+ @list='$(bin_PROGRAMS)'; for p in $$list; do \
+ f=`echo $$p|sed 's/$(EXEEXT)$$//'`; \
+ echo " rm -f $$p $$f"; \
+ rm -f $$p $$f ; \
+ done
+Xati$(EXEEXT): $(Xati_OBJECTS) $(Xati_DEPENDENCIES)
+ @rm -f Xati$(EXEEXT)
+ $(Xati_LINK) $(Xati_OBJECTS) $(Xati_LDADD) $(LIBS)
+
+mostlyclean-compile:
+ -rm -f *.$(OBJEXT)
+
+distclean-compile:
+ -rm -f *.tab.c
+
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ati.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ati_cursor.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ati_dma.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ati_draw.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ati_microcode.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ati_stub.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ati_video.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/r128_composite.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/radeon_composite.Po@am__quote@
+
+.c.o:
+@am__fastdepCC_TRUE@ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ $<
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='$<' object='$@' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(COMPILE) -c $<
+
+.c.obj:
+@am__fastdepCC_TRUE@ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ `$(CYGPATH_W) '$<'`
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='$<' object='$@' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(COMPILE) -c `$(CYGPATH_W) '$<'`
+
+.c.lo:
+@am__fastdepCC_TRUE@ $(LTCOMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ $<
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Plo
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='$<' object='$@' libtool=yes @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(LTCOMPILE) -c -o $@ $<
+
+mostlyclean-libtool:
+ -rm -f *.lo
+
+clean-libtool:
+ -rm -rf .libs _libs
+
+ID: $(HEADERS) $(SOURCES) $(LISP) $(TAGS_FILES)
+ list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \
+ unique=`for i in $$list; do \
+ if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+ done | \
+ $(AWK) '{ files[$$0] = 1; nonemtpy = 1; } \
+ END { if (nonempty) { for (i in files) print i; }; }'`; \
+ mkid -fID $$unique
+tags: TAGS
+
+TAGS: $(HEADERS) $(SOURCES) $(TAGS_DEPENDENCIES) \
+ $(TAGS_FILES) $(LISP)
+ tags=; \
+ here=`pwd`; \
+ list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \
+ unique=`for i in $$list; do \
+ if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+ done | \
+ $(AWK) '{ files[$$0] = 1; nonempty = 1; } \
+ END { if (nonempty) { for (i in files) print i; }; }'`; \
+ if test -z "$(ETAGS_ARGS)$$tags$$unique"; then :; else \
+ test -n "$$unique" || unique=$$empty_fix; \
+ $(ETAGS) $(ETAGSFLAGS) $(AM_ETAGSFLAGS) $(ETAGS_ARGS) \
+ $$tags $$unique; \
+ fi
+ctags: CTAGS
+CTAGS: $(HEADERS) $(SOURCES) $(TAGS_DEPENDENCIES) \
+ $(TAGS_FILES) $(LISP)
+ tags=; \
+ list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \
+ unique=`for i in $$list; do \
+ if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+ done | \
+ $(AWK) '{ files[$$0] = 1; nonempty = 1; } \
+ END { if (nonempty) { for (i in files) print i; }; }'`; \
+ test -z "$(CTAGS_ARGS)$$tags$$unique" \
+ || $(CTAGS) $(CTAGSFLAGS) $(AM_CTAGSFLAGS) $(CTAGS_ARGS) \
+ $$tags $$unique
+
+GTAGS:
+ here=`$(am__cd) $(top_builddir) && pwd` \
+ && cd $(top_srcdir) \
+ && gtags -i $(GTAGS_ARGS) $$here
+
+distclean-tags:
+ -rm -f TAGS ID GTAGS GRTAGS GSYMS GPATH tags
+
+distdir: $(DISTFILES)
+ @srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \
+ topsrcdirstrip=`echo "$(top_srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \
+ list='$(DISTFILES)'; \
+ dist_files=`for file in $$list; do echo $$file; done | \
+ sed -e "s|^$$srcdirstrip/||;t" \
+ -e "s|^$$topsrcdirstrip/|$(top_builddir)/|;t"`; \
+ case $$dist_files in \
+ */*) $(MKDIR_P) `echo "$$dist_files" | \
+ sed '/\//!d;s|^|$(distdir)/|;s,/[^/]*$$,,' | \
+ sort -u` ;; \
+ esac; \
+ for file in $$dist_files; do \
+ if test -f $$file || test -d $$file; then d=.; else d=$(srcdir); fi; \
+ if test -d $$d/$$file; then \
+ dir=`echo "/$$file" | sed -e 's,/[^/]*$$,,'`; \
+ if test -d $(srcdir)/$$file && test $$d != $(srcdir); then \
+ cp -pR $(srcdir)/$$file $(distdir)$$dir || exit 1; \
+ fi; \
+ cp -pR $$d/$$file $(distdir)$$dir || exit 1; \
+ else \
+ test -f $(distdir)/$$file \
+ || cp -p $$d/$$file $(distdir)/$$file \
+ || exit 1; \
+ fi; \
+ done
+check-am: all-am
+check: check-am
+all-am: Makefile $(LIBRARIES) $(PROGRAMS)
+installdirs:
+ for dir in "$(DESTDIR)$(bindir)"; do \
+ test -z "$$dir" || $(MKDIR_P) "$$dir"; \
+ done
+install: install-am
+install-exec: install-exec-am
+install-data: install-data-am
+uninstall: uninstall-am
+
+install-am: all-am
+ @$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am
+
+installcheck: installcheck-am
+install-strip:
+ $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
+ install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
+ `test -z '$(STRIP)' || \
+ echo "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'"` install
+mostlyclean-generic:
+
+clean-generic:
+
+distclean-generic:
+ -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES)
+
+maintainer-clean-generic:
+ @echo "This command is intended for maintainers to use"
+ @echo "it deletes files that may require special tools to rebuild."
+clean: clean-am
+
+clean-am: clean-binPROGRAMS clean-generic clean-libtool \
+ clean-noinstLIBRARIES mostlyclean-am
+
+distclean: distclean-am
+ -rm -rf ./$(DEPDIR)
+ -rm -f Makefile
+distclean-am: clean-am distclean-compile distclean-generic \
+ distclean-tags
+
+dvi: dvi-am
+
+dvi-am:
+
+html: html-am
+
+info: info-am
+
+info-am:
+
+install-data-am:
+
+install-dvi: install-dvi-am
+
+install-exec-am: install-binPROGRAMS
+
+install-html: install-html-am
+
+install-info: install-info-am
+
+install-man:
+
+install-pdf: install-pdf-am
+
+install-ps: install-ps-am
+
+installcheck-am:
+
+maintainer-clean: maintainer-clean-am
+ -rm -rf ./$(DEPDIR)
+ -rm -f Makefile
+maintainer-clean-am: distclean-am maintainer-clean-generic
+
+mostlyclean: mostlyclean-am
+
+mostlyclean-am: mostlyclean-compile mostlyclean-generic \
+ mostlyclean-libtool
+
+pdf: pdf-am
+
+pdf-am:
+
+ps: ps-am
+
+ps-am:
+
+uninstall-am: uninstall-binPROGRAMS
+
+.MAKE: install-am install-strip
+
+.PHONY: CTAGS GTAGS all all-am check check-am clean clean-binPROGRAMS \
+ clean-generic clean-libtool clean-noinstLIBRARIES ctags \
+ distclean distclean-compile distclean-generic \
+ distclean-libtool distclean-tags distdir dvi dvi-am html \
+ html-am info info-am install install-am install-binPROGRAMS \
+ install-data install-data-am install-dvi install-dvi-am \
+ install-exec install-exec-am install-html install-html-am \
+ install-info install-info-am install-man install-pdf \
+ install-pdf-am install-ps install-ps-am install-strip \
+ installcheck installcheck-am installdirs maintainer-clean \
+ maintainer-clean-generic mostlyclean mostlyclean-compile \
+ mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \
+ tags uninstall uninstall-am uninstall-binPROGRAMS
+
+
+relink:
+ rm -f $(bin_PROGRAMS) && make $(bin_PROGRAMS)
+# Tell versions [3.59,3.63) of GNU make to not export all variables.
+# Otherwise a system limit (for SysV at least) may be exceeded.
+.NOEXPORT:
diff --git a/xorg-server/hw/kdrive/ati/ati.c b/xorg-server/hw/kdrive/ati/ati.c
new file mode 100644
index 000000000..c4f67e171
--- /dev/null
+++ b/xorg-server/hw/kdrive/ati/ati.c
@@ -0,0 +1,761 @@
+/*
+ * Copyright © 2003 Eric Anholt
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that
+ * copyright notice and this permission notice appear in supporting
+ * documentation, and that the name of Eric Anholt not be used in
+ * advertising or publicity pertaining to distribution of the software without
+ * specific, written prior permission. Eric Anholt makes no
+ * representations about the suitability of this software for any purpose. It
+ * is provided "as is" without express or implied warranty.
+ *
+ * ERIC ANHOLT DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL ERIC ANHOLT BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include <kdrive-config.h>
+#endif
+#include "ati.h"
+#include "ati_reg.h"
+#if defined(USE_DRI) && defined(GLXEXT)
+#include "ati_sarea.h"
+#endif
+
+static Bool ATIIsAGP(ATICardInfo *atic);
+
+#define CAP_SERIESMASK 0xf
+#define CAP_R128 0x1 /* If it's a Rage 128 */
+#define CAP_R100 0x2 /* If it's an r100 series radeon. */
+#define CAP_R200 0x3 /* If it's an r200 series radeon. */
+#define CAP_R300 0x4 /* If it's an r300 series radeon. */
+
+#define CAP_FEATURESMASK 0xf0
+#define CAP_NOAGP 0x10 /* If it's a PCI-only card. */
+
+struct pci_id_entry ati_pci_ids[] = {
+ {0x1002, 0x4136, 0x2, "ATI Radeon RS100"},
+ {0x1002, 0x4137, 0x2, "ATI Radeon RS200"},
+ {0x1002, 0x4237, 0x2, "ATI Radeon RS250"},
+ {0x1002, 0x4144, 0x4, "ATI Radeon R300 AD"},
+ {0x1002, 0x4145, 0x4, "ATI Radeon R300 AE"},
+ {0x1002, 0x4146, 0x4, "ATI Radeon R300 AF"},
+ {0x1002, 0x4147, 0x4, "ATI Radeon R300 AG"},
+ {0x1002, 0x4148, 0x4, "ATI Radeon R350 AH"},
+ {0x1002, 0x4149, 0x4, "ATI Radeon R350 AI"},
+ {0x1002, 0x414a, 0x4, "ATI Radeon R350 AJ"},
+ {0x1002, 0x414b, 0x4, "ATI Radeon R350 AK"},
+ {0x1002, 0x4150, 0x4, "ATI Radeon RV350 AP"},
+ {0x1002, 0x4151, 0x4, "ATI Radeon RV350 AQ"},
+ {0x1002, 0x4152, 0x4, "ATI Radeon RV350 AR"},
+ {0x1002, 0x4153, 0x4, "ATI Radeon RV350 AS"},
+ {0x1002, 0x4154, 0x4, "ATI Radeon RV350 AT"},
+ {0x1002, 0x4156, 0x4, "ATI Radeon RV350 AV"},
+ {0x1002, 0x4242, 0x3, "ATI Radeon R200 BB"},
+ {0x1002, 0x4243, 0x3, "ATI Radeon R200 BC"},
+ {0x1002, 0x4336, 0x2, "ATI Radeon RS100"},
+ {0x1002, 0x4337, 0x2, "ATI Radeon RS200"},
+ {0x1002, 0x4437, 0x2, "ATI Radeon RS250"},
+ {0x1002, 0x4964, 0x2, "ATI Radeon RV250 Id"},
+ {0x1002, 0x4965, 0x2, "ATI Radeon RV250 Ie"},
+ {0x1002, 0x4966, 0x2, "ATI Radeon RV250 If"},
+ {0x1002, 0x4967, 0x2, "ATI Radeon R250 Ig"},
+ {0x1002, 0x4c45, 0x11, "ATI Rage 128 LE"},
+ {0x1002, 0x4c46, 0x1, "ATI Rage 128 LF"},
+ {0x1002, 0x4c57, 0x2, "ATI Radeon Mobiliy M7 RV200 LW (7500)"},
+ {0x1002, 0x4c58, 0x2, "ATI Radeon Mobiliy M7 RV200 LX (7500)"},
+ {0x1002, 0x4c59, 0x2, "ATI Radeon Mobility M6 LY"},
+ {0x1002, 0x4c5a, 0x2, "ATI Radeon Mobility M6 LZ"},
+ {0x1002, 0x4c64, 0x3, "ATI Radeon RV250 Ld"},
+ {0x1002, 0x4c65, 0x3, "ATI Radeon RV250 Le"},
+ {0x1002, 0x4c66, 0x3, "ATI Radeon Mobility M9 RV250 Lf"},
+ {0x1002, 0x4c67, 0x3, "ATI Radeon RV250 Lg"},
+ {0x1002, 0x4d46, 0x1, "ATI Rage 128 MF"},
+ {0x1002, 0x4d46, 0x1, "ATI Rage 128 ML"},
+ {0x1002, 0x4e44, 0x4, "ATI Radeon R300 ND"},
+ {0x1002, 0x4e45, 0x4, "ATI Radeon R300 NE"},
+ {0x1002, 0x4e46, 0x4, "ATI Radeon R300 NF"},
+ {0x1002, 0x4e47, 0x4, "ATI Radeon R300 NG"},
+ {0x1002, 0x4e48, 0x4, "ATI Radeon R350 NH"},
+ {0x1002, 0x4e49, 0x4, "ATI Radeon R350 NI"},
+ {0x1002, 0x4e4a, 0x4, "ATI Radeon R350 NJ"},
+ {0x1002, 0x4e4b, 0x4, "ATI Radeon R350 NK"},
+ {0x1002, 0x4e50, 0x4, "ATI Radeon Mobility RV350 NP"},
+ {0x1002, 0x4e51, 0x4, "ATI Radeon Mobility RV350 NQ"},
+ {0x1002, 0x4e52, 0x4, "ATI Radeon Mobility RV350 NR"},
+ {0x1002, 0x4e53, 0x4, "ATI Radeon Mobility RV350 NS"},
+ {0x1002, 0x4e54, 0x4, "ATI Radeon Mobility RV350 NT"},
+ {0x1002, 0x4e56, 0x4, "ATI Radeon Mobility RV350 NV"},
+ {0x1002, 0x5041, 0x1, "ATI Rage 128 PA"},
+ {0x1002, 0x5042, 0x1, "ATI Rage 128 PB"},
+ {0x1002, 0x5043, 0x1, "ATI Rage 128 PC"},
+ {0x1002, 0x5044, 0x11, "ATI Rage 128 PD"},
+ {0x1002, 0x5045, 0x1, "ATI Rage 128 PE"},
+ {0x1002, 0x5046, 0x1, "ATI Rage 128 PF"},
+ {0x1002, 0x5047, 0x1, "ATI Rage 128 PG"},
+ {0x1002, 0x5048, 0x1, "ATI Rage 128 PH"},
+ {0x1002, 0x5049, 0x1, "ATI Rage 128 PI"},
+ {0x1002, 0x504a, 0x1, "ATI Rage 128 PJ"},
+ {0x1002, 0x504b, 0x1, "ATI Rage 128 PK"},
+ {0x1002, 0x504c, 0x1, "ATI Rage 128 PL"},
+ {0x1002, 0x504d, 0x1, "ATI Rage 128 PM"},
+ {0x1002, 0x504e, 0x1, "ATI Rage 128 PN"},
+ {0x1002, 0x504f, 0x1, "ATI Rage 128 PO"},
+ {0x1002, 0x5050, 0x11, "ATI Rage 128 PP"},
+ {0x1002, 0x5051, 0x1, "ATI Rage 128 PQ"},
+ {0x1002, 0x5052, 0x11, "ATI Rage 128 PR"},
+ {0x1002, 0x5053, 0x1, "ATI Rage 128 PS"},
+ {0x1002, 0x5054, 0x1, "ATI Rage 128 PT"},
+ {0x1002, 0x5055, 0x1, "ATI Rage 128 PU"},
+ {0x1002, 0x5056, 0x1, "ATI Rage 128 PV"},
+ {0x1002, 0x5057, 0x1, "ATI Rage 128 PW"},
+ {0x1002, 0x5058, 0x1, "ATI Rage 128 PX"},
+ {0x1002, 0x5144, 0x2, "ATI Radeon R100 QD"},
+ {0x1002, 0x5145, 0x2, "ATI Radeon R100 QE"},
+ {0x1002, 0x5146, 0x2, "ATI Radeon R100 QF"},
+ {0x1002, 0x5147, 0x2, "ATI Radeon R100 QG"},
+ {0x1002, 0x5148, 0x3, "ATI Radeon R200 QH"},
+ {0x1002, 0x514c, 0x3, "ATI Radeon R200 QL"},
+ {0x1002, 0x514d, 0x3, "ATI Radeon R200 QM"},
+ {0x1002, 0x5157, 0x2, "ATI Radeon RV200 QW (7500)"},
+ {0x1002, 0x5158, 0x2, "ATI Radeon RV200 QX (7500)"},
+ {0x1002, 0x5159, 0x2, "ATI Radeon RV100 QY"},
+ {0x1002, 0x515a, 0x2, "ATI Radeon RV100 QZ"},
+ {0x1002, 0x5245, 0x11, "ATI Rage 128 RE"},
+ {0x1002, 0x5246, 0x1, "ATI Rage 128 RF"},
+ {0x1002, 0x5247, 0x1, "ATI Rage 128 RG"},
+ {0x1002, 0x524b, 0x11, "ATI Rage 128 RK"},
+ {0x1002, 0x524c, 0x1, "ATI Rage 128 RL"},
+ {0x1002, 0x5345, 0x1, "ATI Rage 128 SE"},
+ {0x1002, 0x5346, 0x1, "ATI Rage 128 SF"},
+ {0x1002, 0x5347, 0x1, "ATI Rage 128 SG"},
+ {0x1002, 0x5348, 0x1, "ATI Rage 128 SH"},
+ {0x1002, 0x534b, 0x1, "ATI Rage 128 SK"},
+ {0x1002, 0x534c, 0x1, "ATI Rage 128 SL"},
+ {0x1002, 0x534d, 0x1, "ATI Rage 128 SM"},
+ {0x1002, 0x534e, 0x1, "ATI Rage 128 SN"},
+ {0x1002, 0x5446, 0x1, "ATI Rage 128 TF"},
+ {0x1002, 0x544c, 0x1, "ATI Rage 128 TL"},
+ {0x1002, 0x5452, 0x1, "ATI Rage 128 TR"},
+ {0x1002, 0x5453, 0x1, "ATI Rage 128 TS"},
+ {0x1002, 0x5454, 0x1, "ATI Rage 128 TT"},
+ {0x1002, 0x5455, 0x1, "ATI Rage 128 TU"},
+ {0x1002, 0x5834, 0x3, "ATI Radeon RS300"},
+ {0x1002, 0x5835, 0x3, "ATI Radeon RS300 Mobility"},
+ {0x1002, 0x5941, 0x3, "ATI Radeon RV280 (9200)"},
+ {0x1002, 0x5961, 0x3, "ATI Radeon RV280 (9200 SE)"},
+ {0x1002, 0x5964, 0x3, "ATI Radeon RV280 (9200 SE)"},
+ {0x1002, 0x5c60, 0x3, "ATI Radeon RV280"},
+ {0x1002, 0x5c61, 0x3, "ATI Radeon RV280 Mobility"},
+ {0x1002, 0x5c62, 0x3, "ATI Radeon RV280"},
+ {0x1002, 0x5c63, 0x3, "ATI Radeon RV280 Mobility"},
+ {0x1002, 0x5c64, 0x3, "ATI Radeon RV280"},
+ {0, 0, 0, NULL}
+};
+
+static char *
+make_busid(KdCardAttr *attr)
+{
+ char *busid;
+
+ busid = xalloc(20);
+ if (busid == NULL)
+ return NULL;
+ snprintf(busid, 20, "pci:%04x:%02x:%02x.%d", attr->domain, attr->bus,
+ attr->slot, attr->func);
+ return busid;
+}
+
+static Bool
+ATICardInit(KdCardInfo *card)
+{
+ ATICardInfo *atic;
+ int i;
+ Bool initialized = FALSE;
+
+ atic = xcalloc(sizeof(ATICardInfo), 1);
+ if (atic == NULL)
+ return FALSE;
+
+#ifdef KDRIVEFBDEV
+ if (!initialized && fbdevInitialize(card, &atic->backend_priv.fbdev)) {
+ atic->use_fbdev = TRUE;
+ initialized = TRUE;
+ atic->backend_funcs.cardfini = fbdevCardFini;
+ atic->backend_funcs.scrfini = fbdevScreenFini;
+ atic->backend_funcs.initScreen = fbdevInitScreen;
+ atic->backend_funcs.finishInitScreen = fbdevFinishInitScreen;
+ atic->backend_funcs.createRes = fbdevCreateResources;
+ atic->backend_funcs.preserve = fbdevPreserve;
+ atic->backend_funcs.restore = fbdevRestore;
+ atic->backend_funcs.dpms = fbdevDPMS;
+ atic->backend_funcs.enable = fbdevEnable;
+ atic->backend_funcs.disable = fbdevDisable;
+ atic->backend_funcs.getColors = fbdevGetColors;
+ atic->backend_funcs.putColors = fbdevPutColors;
+#ifdef RANDR
+ atic->backend_funcs.randrSetConfig = fbdevRandRSetConfig;
+#endif
+ }
+#endif
+#ifdef KDRIVEVESA
+ if (!initialized && vesaInitialize(card, &atic->backend_priv.vesa)) {
+ atic->use_vesa = TRUE;
+ initialized = TRUE;
+ atic->backend_funcs.cardfini = vesaCardFini;
+ atic->backend_funcs.scrfini = vesaScreenFini;
+ atic->backend_funcs.initScreen = vesaInitScreen;
+ atic->backend_funcs.finishInitScreen = vesaFinishInitScreen;
+ atic->backend_funcs.createRes = vesaCreateResources;
+ atic->backend_funcs.preserve = vesaPreserve;
+ atic->backend_funcs.restore = vesaRestore;
+ atic->backend_funcs.dpms = vesaDPMS;
+ atic->backend_funcs.enable = vesaEnable;
+ atic->backend_funcs.disable = vesaDisable;
+ atic->backend_funcs.getColors = vesaGetColors;
+ atic->backend_funcs.putColors = vesaPutColors;
+#ifdef RANDR
+ atic->backend_funcs.randrSetConfig = vesaRandRSetConfig;
+#endif
+ }
+#endif
+
+ if (!initialized || !ATIMapReg(card, atic)) {
+ xfree(atic);
+ return FALSE;
+ }
+
+ atic->busid = make_busid(&card->attr);
+ if (atic->busid == NULL) {
+ xfree(atic);
+ return FALSE;
+ }
+
+#ifdef USE_DRI
+ /* We demand identification by busid, not driver name */
+ atic->drmFd = drmOpen(NULL, atic->busid);
+ if (atic->drmFd < 0)
+ ErrorF("Failed to open DRM, DRI disabled.\n");
+#endif /* USE_DRI */
+
+ card->driver = atic;
+
+ for (i = 0; ati_pci_ids[i].name != NULL; i++) {
+ if (ati_pci_ids[i].device == card->attr.deviceID) {
+ atic->pci_id = &ati_pci_ids[i];
+ break;
+ }
+ }
+
+ if ((atic->pci_id->caps & CAP_SERIESMASK) != CAP_R128)
+ atic->is_radeon = TRUE;
+ if ((atic->pci_id->caps & CAP_SERIESMASK) == CAP_R100)
+ atic->is_r100 = TRUE;
+ if ((atic->pci_id->caps & CAP_SERIESMASK) == CAP_R200)
+ atic->is_r200 = TRUE;
+ if ((atic->pci_id->caps & CAP_SERIESMASK) == CAP_R300)
+ atic->is_r300 = TRUE;
+
+ atic->is_agp = ATIIsAGP(atic);
+
+ ErrorF("Using ATI card: %s (%s) at %s\n", atic->pci_id->name,
+ atic->is_agp ? "AGP" : "PCI", atic->busid);
+
+ return TRUE;
+}
+
+static void
+ATICardFini(KdCardInfo *card)
+{
+ ATICardInfo *atic = (ATICardInfo *)card->driver;
+
+ ATIUnmapReg(card, atic);
+ atic->backend_funcs.cardfini(card);
+}
+
+/*
+ * Once screen->off_screen_base is set, this function
+ * allocates the remaining memory appropriately
+ */
+
+static void
+ATISetOffscreen (KdScreenInfo *screen)
+{
+ ATICardInfo(screen);
+#if defined(USE_DRI) && defined(GLXEXT)
+ ATIScreenInfo *atis = (ATIScreenInfo *)screen->driver;
+ int l;
+#endif
+ int screen_size;
+ char *mmio = atic->reg_base;
+
+ /* check (and adjust) pitch */
+ if (mmio)
+ {
+ int byteStride = screen->fb[0].byteStride;
+ int bitStride;
+ int pixelStride;
+ int bpp = screen->fb[0].bitsPerPixel;
+
+ /*
+ * Ensure frame buffer is correctly aligned
+ */
+ if (byteStride & 0x3f)
+ {
+ byteStride = (byteStride + 0x3f) & ~0x3f;
+ bitStride = byteStride * 8;
+ pixelStride = bitStride / bpp;
+
+ screen->fb[0].byteStride = byteStride;
+ screen->fb[0].pixelStride = pixelStride;
+ }
+ }
+
+ screen_size = screen->fb[0].byteStride * screen->height;
+
+ screen->off_screen_base = screen_size;
+
+#if defined(USE_DRI) && defined(GLXEXT)
+ /* Reserve a static area for the back buffer the same size as the
+ * visible screen. XXX: This would be better initialized in ati_dri.c
+ * when GLX is set up, but the offscreen memory manager's allocations
+ * don't last through VT switches, while the kernel's understanding of
+ * offscreen locations does.
+ */
+ atis->frontOffset = 0;
+ atis->frontPitch = screen->fb[0].byteStride;
+
+ if (screen->off_screen_base + screen_size <= screen->memory_size) {
+ atis->backOffset = screen->off_screen_base;
+ atis->backPitch = screen->fb[0].byteStride;
+ screen->off_screen_base += screen_size;
+ }
+
+ /* Reserve the depth span for Rage 128 */
+ if (!atic->is_radeon && screen->off_screen_base +
+ screen->fb[0].byteStride <= screen->memory_size) {
+ atis->spanOffset = screen->off_screen_base;
+ screen->off_screen_base += screen->fb[0].byteStride;
+ }
+
+ /* Reserve the static depth buffer, which happens to be the same
+ * bitsPerPixel as the screen.
+ */
+ if (screen->off_screen_base + screen_size <= screen->memory_size) {
+ atis->depthOffset = screen->off_screen_base;
+ atis->depthPitch = screen->fb[0].byteStride;
+ screen->off_screen_base += screen_size;
+ }
+
+ /* Reserve approx. half of remaining offscreen memory for local
+ * textures. Round down to a whole number of texture regions.
+ */
+ atis->textureSize = (screen->memory_size - screen->off_screen_base) / 2;
+ l = ATILog2(atis->textureSize / ATI_NR_TEX_REGIONS);
+ if (l < ATI_LOG_TEX_GRANULARITY)
+ l = ATI_LOG_TEX_GRANULARITY;
+ atis->textureSize = (atis->textureSize >> l) << l;
+ if (atis->textureSize >= 512 * 1024) {
+ atis->textureOffset = screen->off_screen_base;
+ screen->off_screen_base += atis->textureSize;
+ } else {
+ /* Minimum texture size is for 2 256x256x32bpp textures */
+ atis->textureSize = 0;
+ }
+#endif /* USE_DRI && GLXEXT */
+}
+
+static void
+ATISetPitch (KdScreenInfo *screen)
+{
+ ATICardInfo(screen);
+#if defined(USE_DRI) && defined(GLXEXT)
+ ATIScreenInfo *atis = (ATIScreenInfo *)screen->driver;
+ int l;
+#endif
+ char *mmio = atic->reg_base;
+
+ /* check (and adjust) pitch for radeon */
+ if (mmio)
+ {
+ int byteStride = screen->fb[0].byteStride;
+ int bitStride;
+ int pixelStride;
+ int bpp = screen->fb[0].bitsPerPixel;
+ CARD32 crtc_pitch;
+ CARD32 crtc2_pitch;
+#if 0
+ CARD32 crtc_ext_cntl;
+ CARD32 dac_cntl;
+#endif
+ bitStride = byteStride * 8;
+ pixelStride = bitStride / bpp;
+
+ crtc_pitch = (pixelStride >> 3);
+ crtc_pitch |= crtc_pitch << 16;
+ crtc2_pitch = (pixelStride >> 3);
+ crtc2_pitch |= crtc2_pitch << 16;
+#if 0
+ crtc_ext_cntl = MMIO_IN32 (mmio, ATI_REG_CRTC_EXT_CNTL);
+ dac_cntl = MMIO_IN32 (mmio, ATI_REG_DAC_CNTL);
+ /* Turn off the screen */
+ MMIO_OUT32 (mmio, ATI_REG_CRTC_EXT_CNTL,
+ crtc_ext_cntl |
+ ATI_CRTC_VSYNC_DIS |
+ ATI_CRTC_HSYNC_DIS |
+ ATI_CRTC_DISPLAY_DIS);
+ MMIO_OUT32 (mmio, ATI_REG_DAC_CNTL,
+ dac_cntl |
+ ATI_DAC_RANGE_CNTL |
+ ATI_DAC_BLANKING);
+#endif
+ MMIO_OUT32 (mmio, ATI_REG_CRTC_PITCH, crtc_pitch);
+ MMIO_OUT32 (mmio, ATI_REG_CRTC2_PITCH, crtc2_pitch);
+#if 0
+ /* Turn the screen back on */
+ MMIO_OUT32 (mmio, ATI_REG_CRTC_EXT_CNTL,
+ crtc_ext_cntl);
+ MMIO_OUT32 (mmio, ATI_REG_DAC_CNTL,
+ dac_cntl);
+#endif
+ }
+}
+
+static Bool
+ATIScreenInit(KdScreenInfo *screen)
+{
+ ATIScreenInfo *atis;
+ ATICardInfo(screen);
+ Bool success = FALSE;
+
+ atis = xcalloc(sizeof(ATIScreenInfo), 1);
+ if (atis == NULL)
+ return FALSE;
+
+ atis->atic = atic;
+ atis->screen = screen;
+ screen->driver = atis;
+
+ if (screen->fb[0].depth == 0)
+ screen->fb[0].depth = 16;
+#ifdef KDRIVEFBDEV
+ if (atic->use_fbdev) {
+ success = fbdevScreenInitialize(screen,
+ &atis->backend_priv.fbdev);
+ }
+#endif
+#ifdef KDRIVEVESA
+ if (atic->use_vesa) {
+ success = vesaScreenInitialize(screen,
+ &atis->backend_priv.vesa);
+ }
+#endif
+
+ if (!success) {
+ screen->driver = NULL;
+ xfree(atis);
+ return FALSE;
+ }
+
+ ATISetOffscreen (screen);
+
+ return TRUE;
+}
+
+#ifdef RANDR
+static Bool
+ATIRandRSetConfig (ScreenPtr pScreen,
+ Rotation randr,
+ int rate,
+ RRScreenSizePtr pSize)
+{
+ KdScreenPriv(pScreen);
+ KdScreenInfo *screen = pScreenPriv->screen;
+ ATICardInfo *atic = screen->card->driver;
+ Bool ret;
+
+ ATIDrawDisable (pScreen);
+ ret = atic->backend_funcs.randrSetConfig(pScreen, randr, rate, pSize);
+ ATISetOffscreen (screen);
+ ATISetPitch (screen);
+ /*
+ * Set frame buffer mapping
+ */
+ (*pScreen->ModifyPixmapHeader) (fbGetScreenPixmap (pScreen),
+ pScreen->width,
+ pScreen->height,
+ screen->fb[0].depth,
+ screen->fb[0].bitsPerPixel,
+ screen->fb[0].byteStride,
+ screen->fb[0].frameBuffer);
+
+ ATIDrawEnable (pScreen);
+ return ret;
+}
+
+static Bool
+ATIRandRInit (ScreenPtr pScreen)
+{
+ rrScrPrivPtr pScrPriv;
+
+ pScrPriv = rrGetScrPriv(pScreen);
+ pScrPriv->rrSetConfig = ATIRandRSetConfig;
+ return TRUE;
+}
+#endif
+
+static void
+ATIScreenFini(KdScreenInfo *screen)
+{
+ ATIScreenInfo *atis = (ATIScreenInfo *)screen->driver;
+ ATICardInfo *atic = screen->card->driver;
+
+#ifdef XV
+ ATIFiniVideo(screen->pScreen);
+#endif
+
+ atic->backend_funcs.scrfini(screen);
+ xfree(atis);
+ screen->driver = 0;
+}
+
+Bool
+ATIMapReg(KdCardInfo *card, ATICardInfo *atic)
+{
+ atic->reg_base = (char *)KdMapDevice(ATI_REG_BASE(card),
+ ATI_REG_SIZE(card));
+
+ if (atic->reg_base == NULL)
+ return FALSE;
+
+ KdSetMappedMode(ATI_REG_BASE(card), ATI_REG_SIZE(card),
+ KD_MAPPED_MODE_REGISTERS);
+
+ return TRUE;
+}
+
+void
+ATIUnmapReg(KdCardInfo *card, ATICardInfo *atic)
+{
+ if (atic->reg_base) {
+ KdResetMappedMode(ATI_REG_BASE(card), ATI_REG_SIZE(card),
+ KD_MAPPED_MODE_REGISTERS);
+ KdUnmapDevice((void *)atic->reg_base, ATI_REG_SIZE(card));
+ atic->reg_base = 0;
+ }
+}
+
+static Bool
+ATIInitScreen(ScreenPtr pScreen)
+{
+ KdScreenPriv(pScreen);
+ ATICardInfo(pScreenPriv);
+
+#ifdef XV
+ ATIInitVideo(pScreen);
+#endif
+ return atic->backend_funcs.initScreen(pScreen);
+}
+
+static Bool
+ATIFinishInitScreen(ScreenPtr pScreen)
+{
+ KdScreenPriv(pScreen);
+ ATICardInfo(pScreenPriv);
+
+ if (!atic->backend_funcs.finishInitScreen(pScreen))
+ return FALSE;
+#ifdef RANDR
+ if (!ATIRandRInit (pScreen))
+ return FALSE;
+#endif
+ return TRUE;
+}
+
+static Bool
+ATICreateResources(ScreenPtr pScreen)
+{
+ KdScreenPriv(pScreen);
+ ATICardInfo(pScreenPriv);
+
+ return atic->backend_funcs.createRes(pScreen);
+}
+
+static void
+ATIPreserve(KdCardInfo *card)
+{
+ ATICardInfo *atic = card->driver;
+ char *mmio = atic->reg_base;
+
+ atic->backend_funcs.preserve(card);
+ if (atic->is_radeon && mmio)
+ {
+ atic->crtc_pitch = MMIO_IN32(mmio, ATI_REG_CRTC_PITCH);
+ atic->crtc2_pitch = MMIO_IN32(mmio, ATI_REG_CRTC2_PITCH);
+
+ }
+}
+
+static void
+ATIRestore(KdCardInfo *card)
+{
+ ATICardInfo *atic = card->driver;
+ char *mmio = atic->reg_base;
+
+ if (mmio)
+ {
+ MMIO_OUT32(mmio, ATI_REG_CRTC_PITCH, atic->crtc_pitch);
+ MMIO_OUT32(mmio, ATI_REG_CRTC2_PITCH, atic->crtc2_pitch);
+ }
+ ATIUnmapReg(card, atic);
+
+ atic->backend_funcs.restore(card);
+}
+
+static Bool
+ATIDPMS(ScreenPtr pScreen, int mode)
+{
+ KdScreenPriv(pScreen);
+ ATICardInfo(pScreenPriv);
+
+ return atic->backend_funcs.dpms(pScreen, mode);
+}
+
+static Bool
+ATIEnable(ScreenPtr pScreen)
+{
+ KdScreenPriv(pScreen);
+ ATICardInfo(pScreenPriv);
+
+ if (!atic->backend_funcs.enable(pScreen))
+ return FALSE;
+
+ if ((atic->reg_base == NULL) && !ATIMapReg(pScreenPriv->screen->card,
+ atic))
+ return FALSE;
+
+ ATISetOffscreen (pScreenPriv->screen);
+
+ ATISetPitch (pScreenPriv->screen);
+
+ return TRUE;
+}
+
+static void
+ATIDisable(ScreenPtr pScreen)
+{
+ KdScreenPriv(pScreen);
+#if defined(USE_DRI) && defined(GLXEXT)
+ ATIScreenInfo(pScreenPriv);
+#endif /* USE_DRI && GLXEXT */
+ ATICardInfo(pScreenPriv);
+
+ ATIUnmapReg(pScreenPriv->card, atic);
+
+ atic->backend_funcs.disable(pScreen);
+}
+
+static void
+ATIGetColors(ScreenPtr pScreen, int fb, int n, xColorItem *pdefs)
+{
+ KdScreenPriv(pScreen);
+ ATICardInfo(pScreenPriv);
+
+ atic->backend_funcs.getColors(pScreen, fb, n, pdefs);
+}
+
+static void
+ATIPutColors(ScreenPtr pScreen, int fb, int n, xColorItem *pdefs)
+{
+ KdScreenPriv(pScreen);
+ ATICardInfo(pScreenPriv);
+
+ atic->backend_funcs.putColors(pScreen, fb, n, pdefs);
+}
+
+/* Compute log base 2 of val. */
+int
+ATILog2(int val)
+{
+ int bits;
+
+ for (bits = 0; val != 0; val >>= 1, ++bits)
+ ;
+ return bits - 1;
+}
+
+static Bool
+ATIIsAGP(ATICardInfo *atic)
+{
+ char *mmio = atic->reg_base;
+ CARD32 cap_ptr, cap_id;
+
+ if (mmio == NULL)
+ return FALSE;
+
+ if (MMIO_IN32(mmio, ATI_REG_PCI_CFG_STATUS) & ATI_CAP_LIST) {
+ cap_ptr = MMIO_IN32(mmio, ATI_REG_PCI_CFG_CAPABILITIES_PTR) &
+ ATI_CAP_PTR_MASK;
+ while (cap_ptr != ATI_CAP_ID_NULL) {
+ cap_id = MMIO_IN32(mmio, ATI_PCI_CFG_OFFSET + cap_ptr);
+ if ((cap_id & 0xff) == ATI_CAP_ID_AGP)
+ return TRUE;
+ cap_ptr = (cap_id >> 8) & ATI_CAP_PTR_MASK;
+ }
+ }
+
+ return FALSE;
+}
+
+/* This function is required to work around a hardware bug in some (all?)
+ * revisions of the R300. This workaround should be called after every
+ * CLOCK_CNTL_INDEX register access. If not, register reads afterward
+ * may not be correct.
+ */
+void R300CGWorkaround(ATIScreenInfo *atis) {
+ ATICardInfo *atic = atis->atic;
+ char *mmio = atic->reg_base;
+ CARD32 save;
+
+ save = MMIO_IN32(mmio, ATI_REG_CLOCK_CNTL_INDEX);
+ MMIO_OUT32(mmio, ATI_REG_CLOCK_CNTL_INDEX, save & ~(0x3f |
+ ATI_PLL_WR_EN));
+ MMIO_IN32(mmio, ATI_REG_CLOCK_CNTL_INDEX);
+ MMIO_OUT32(mmio, ATI_REG_CLOCK_CNTL_INDEX, save);
+}
+
+KdCardFuncs ATIFuncs = {
+ ATICardInit, /* cardinit */
+ ATIScreenInit, /* scrinit */
+ ATIInitScreen, /* initScreen */
+ ATIFinishInitScreen, /* finishInitScreen */
+ ATICreateResources, /* createRes */
+ ATIPreserve, /* preserve */
+ ATIEnable, /* enable */
+ ATIDPMS, /* dpms */
+ ATIDisable, /* disable */
+ ATIRestore, /* restore */
+ ATIScreenFini, /* scrfini */
+ ATICardFini, /* cardfini */
+
+ ATICursorInit, /* initCursor */
+ ATICursorEnable, /* enableCursor */
+ ATICursorDisable, /* disableCursor */
+ ATICursorFini, /* finiCursor */
+ ATIRecolorCursor, /* recolorCursor */
+
+ ATIDrawInit, /* initAccel */
+ ATIDrawEnable, /* enableAccel */
+ ATIDrawDisable, /* disableAccel */
+ ATIDrawFini, /* finiAccel */
+
+ ATIGetColors, /* getColors */
+ ATIPutColors, /* putColors */
+};
diff --git a/xorg-server/hw/kdrive/ati/ati.h b/xorg-server/hw/kdrive/ati/ati.h
new file mode 100644
index 000000000..3ff3e3ff3
--- /dev/null
+++ b/xorg-server/hw/kdrive/ati/ati.h
@@ -0,0 +1,409 @@
+/*
+ * Copyright © 2003 Eric Anholt
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that
+ * copyright notice and this permission notice appear in supporting
+ * documentation, and that the name of Eric Anholt not be used in
+ * advertising or publicity pertaining to distribution of the software without
+ * specific, written prior permission. Eric Anholt makes no
+ * representations about the suitability of this software for any purpose. It
+ * is provided "as is" without express or implied warranty.
+ *
+ * ERIC ANHOLT DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL ERIC ANHOLT BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef _ATI_H_
+#define _ATI_H_
+
+#ifdef HAVE_CONFIG_H
+#include <kdrive-config.h>
+#endif
+
+#ifdef KDRIVEFBDEV
+#include <fbdev.h>
+#endif
+#ifdef KDRIVEVESA
+#include <vesa.h>
+#endif
+
+#include "kxv.h"
+
+#undef XF86DRI
+#ifdef XF86DRI
+#define USE_DRI
+#include "xf86drm.h"
+#include "dri.h"
+#ifdef GLXEXT
+#include "GL/glxint.h"
+#include "GL/glxtokens.h"
+#include "ati_dripriv.h"
+#endif
+#endif
+
+#define ATI_REG_BASE(c) ((c)->attr.address[1])
+#define ATI_REG_SIZE(c) (0x4000)
+
+#ifdef __powerpc__
+
+static __inline__ void
+MMIO_OUT32(__volatile__ void *base, const unsigned long offset,
+ const unsigned int val)
+{
+ __asm__ __volatile__(
+ "stwbrx %1,%2,%3\n\t"
+ "eieio"
+ : "=m" (*((volatile unsigned char *)base+offset))
+ : "r" (val), "b" (base), "r" (offset));
+}
+
+static __inline__ CARD32
+MMIO_IN32(__volatile__ void *base, const unsigned long offset)
+{
+ register unsigned int val;
+ __asm__ __volatile__(
+ "lwbrx %0,%1,%2\n\t"
+ "eieio"
+ : "=r" (val)
+ : "b" (base), "r" (offset),
+ "m" (*((volatile unsigned char *)base+offset)));
+ return val;
+}
+
+#else
+
+#define MMIO_OUT32(mmio, a, v) (*(VOL32 *)((mmio) + (a)) = (v))
+#define MMIO_IN32(mmio, a) (*(VOL32 *)((mmio) + (a)))
+
+#endif
+
+#define MMIO_OUT8(mmio, a, v) (*(VOL8 *)((mmio) + (a)) = (v))
+#define MMIO_IN8(mmio, a, v) (*(VOL8 *)((mmio) + (a)))
+
+#define INPLL(mmio, addr) \
+ (MMIO_OUT8(mmio, ATI_REG_CLOCK_CNTL_INDEX, addr), \
+ MMIO_IN32(mmio, ATI_REG_CLOCK_CNTL_DATA))
+
+#define OUTPLL(mmio, addr, val) do { \
+ MMIO_OUT8(mmio, ATI_REG_CLOCK_CNTL_INDEX, (addr) | ATI_PLL_WR_EN); \
+ MMIO_OUT32(mmio, ATI_REG_CLOCK_CNTL_DATA, val); \
+} while (0)
+
+typedef volatile CARD8 VOL8;
+typedef volatile CARD16 VOL16;
+typedef volatile CARD32 VOL32;
+
+struct pci_id_entry {
+ CARD16 vendor;
+ CARD16 device;
+ CARD8 caps;
+ char *name;
+};
+
+struct backend_funcs {
+ void (*cardfini)(KdCardInfo *);
+ void (*scrfini)(KdScreenInfo *);
+ Bool (*initScreen)(ScreenPtr);
+ Bool (*finishInitScreen)(ScreenPtr pScreen);
+ Bool (*createRes)(ScreenPtr);
+ void (*preserve)(KdCardInfo *);
+ void (*restore)(KdCardInfo *);
+ Bool (*dpms)(ScreenPtr, int);
+ Bool (*enable)(ScreenPtr);
+ void (*disable)(ScreenPtr);
+ void (*getColors)(ScreenPtr, int, int, xColorItem *);
+ void (*putColors)(ScreenPtr, int, int, xColorItem *);
+#ifdef RANDR
+ Bool (*randrSetConfig) (ScreenPtr, Rotation, int, RRScreenSizePtr);
+#endif
+};
+
+typedef struct _ATICardInfo {
+ union {
+#ifdef KDRIVEFBDEV
+ FbdevPriv fbdev;
+#endif
+#ifdef KDRIVEVESA
+ VesaCardPrivRec vesa;
+#endif
+ } backend_priv;
+ struct backend_funcs backend_funcs;
+
+ struct pci_id_entry *pci_id;
+ char *reg_base;
+ Bool is_radeon;
+ Bool is_r100;
+ Bool is_r200;
+ Bool is_r300;
+ Bool is_agp;
+ char *busid;
+ CARD32 crtc_pitch;
+ CARD32 crtc2_pitch;
+#ifdef USE_DRI
+ int drmFd;
+#endif /* USE_DRI */
+ Bool use_fbdev, use_vesa;
+} ATICardInfo;
+
+#define getATICardInfo(kd) ((ATICardInfo *) ((kd)->card->driver))
+#define ATICardInfo(kd) ATICardInfo *atic = getATICardInfo(kd)
+
+typedef struct _ATICursor {
+ int width, height;
+ int xhot, yhot;
+
+ Bool has_cursor;
+ CursorPtr pCursor;
+ Pixel source, mask;
+ KdOffscreenArea *area;
+} ATICursor;
+
+typedef struct _ATIPortPriv {
+ int brightness;
+ int saturation;
+ RegionRec clip;
+ CARD32 size;
+ KdOffscreenArea *off_screen;
+ DrawablePtr pDraw;
+ PixmapPtr pPixmap;
+
+ CARD32 src_offset;
+ CARD32 src_pitch;
+ CARD8 *src_addr;
+
+ int id;
+ int src_x1, src_y1, src_x2, src_y2;
+ int dst_x1, dst_y1, dst_x2, dst_y2;
+ int src_w, src_h, dst_w, dst_h;
+} ATIPortPrivRec, *ATIPortPrivPtr;
+
+typedef struct _dmaBuf {
+ int size;
+ int used;
+ void *address;
+#ifdef USE_DRI
+ drmBufPtr drmBuf;
+#endif
+} dmaBuf;
+
+typedef struct _ATIScreenInfo {
+ union {
+#ifdef KDRIVEFBDEV
+ FbdevScrPriv fbdev;
+#endif
+#ifdef KDRIVEVESA
+ VesaScreenPrivRec vesa;
+#endif
+ } backend_priv;
+ KaaScreenInfoRec kaa;
+
+ ATICardInfo *atic;
+ KdScreenInfo *screen;
+
+ int scratch_offset;
+ int scratch_next;
+ KdOffscreenArea *scratch_area;
+
+ ATICursor cursor;
+
+ KdVideoAdaptorPtr pAdaptor;
+ int num_texture_ports;
+
+ Bool using_pio; /* If we use decode DMA packets to MMIO. */
+ Bool using_pseudo; /* If we use MMIO to submit DMA packets. */
+ Bool using_dma; /* If we use non-DRI DMA to submit packets. */
+ Bool using_dri; /* If we use the DRM for DMA. */
+ Bool using_agp; /* If we are using AGP or not for DMA. */
+
+ KdOffscreenArea *dma_space; /* For "DMA" from framebuffer. */
+ void *agp_addr; /* Mapped AGP aperture */
+ int agp_size;
+ int agp_key; /* Key of AGP memory for DMA */
+ CARD32 *ring_addr; /* Beginning of ring buffer. */
+ int ring_write; /* Index of write ptr in ring. */
+ int ring_read; /* Index of read ptr in ring. */
+ int ring_len;
+
+
+ dmaBuf *indirectBuffer;
+ int indirectStart;
+
+ int mmio_avail;
+ int cce_pri_size;
+ int cce_pri_avail;
+
+#ifdef USE_DRI
+ Bool dma_started;
+
+ drmSize registerSize;
+ drmHandle registerHandle;
+ drmHandle fbHandle;
+
+ drmSize gartSize;
+ drmHandle agpMemHandle; /* Handle from drmAgpAlloc */
+ unsigned long gartOffset;
+ unsigned char *AGP; /* Map */
+ int agpMode;
+ drmSize pciSize;
+ drmHandle pciMemHandle;
+
+ /* ring buffer data */
+ unsigned long ringStart; /* Offset into AGP space */
+ drmHandle ringHandle; /* Handle from drmAddMap */
+ drmSize ringMapSize; /* Size of map */
+ int ringSize; /* Size of ring (MB) */
+ unsigned char *ring; /* Map */
+
+ unsigned long ringReadOffset; /* Offset into AGP space */
+ drmHandle ringReadPtrHandle; /* Handle from drmAddMap */
+ drmSize ringReadMapSize; /* Size of map */
+ unsigned char *ringReadPtr; /* Map */
+
+ /* vertex/indirect buffer data */
+ unsigned long bufStart; /* Offset into AGP space */
+ drmHandle bufHandle; /* Handle from drmAddMap */
+ drmSize bufMapSize; /* Size of map */
+ int bufSize; /* Size of buffers (MB) */
+ unsigned char *buf; /* Map */
+ int bufNumBufs; /* Number of buffers */
+ drmBufMapPtr buffers; /* Buffer map */
+
+ /* AGP Texture data */
+ unsigned long gartTexStart; /* Offset into AGP space */
+ drmHandle gartTexHandle; /* Handle from drmAddMap */
+ drmSize gartTexMapSize; /* Size of map */
+ int gartTexSize; /* Size of AGP tex space (MB) */
+ unsigned char *gartTex; /* Map */
+ int log2GARTTexGran;
+
+ int DMAusecTimeout; /* CCE timeout in usecs */
+
+ /* DRI screen private data */
+ int frontOffset;
+ int frontPitch;
+ int backOffset;
+ int backPitch;
+ int depthOffset;
+ int depthPitch;
+ int spanOffset;
+ int textureOffset;
+ int textureSize;
+ int log2TexGran;
+
+ int irqEnabled;
+
+ int serverContext;
+
+ DRIInfoPtr pDRIInfo;
+#ifdef GLXEXT
+ int numVisualConfigs;
+ __GLXvisualConfig *pVisualConfigs;
+ ATIConfigPrivPtr pVisualConfigsPriv;
+#endif /* GLXEXT */
+#endif /* USE_DRI */
+} ATIScreenInfo;
+
+#define getATIScreenInfo(kd) ((ATIScreenInfo *) ((kd)->screen->driver))
+#define ATIScreenInfo(kd) ATIScreenInfo *atis = getATIScreenInfo(kd)
+
+typedef union { float f; CARD32 i; } fi_type;
+
+/* Surely there's a better way to go about this */
+static inline CARD32
+ATIFloatAsInt(float val)
+{
+ fi_type fi;
+
+ fi.f = val;
+ return fi.i;
+}
+
+#define GET_FLOAT_BITS(x) ATIFloatAsInt(x)
+
+/* ati.c */
+Bool
+ATIMapReg(KdCardInfo *card, ATICardInfo *atic);
+
+void
+ATIUnmapReg(KdCardInfo *card, ATICardInfo *atic);
+
+void
+R300CGWorkaround(ATIScreenInfo *atis);
+
+/* ati_draw.c */
+void
+ATIDrawSetup(ScreenPtr pScreen);
+
+Bool
+ATIDrawInit(ScreenPtr pScreen);
+
+void
+ATIDrawEnable(ScreenPtr pScreen);
+
+void
+ATIDrawDisable(ScreenPtr pScreen);
+
+void
+ATIDrawFini(ScreenPtr pScreen);
+
+/* ati_dri.c */
+#ifdef USE_DRI
+Bool
+ATIDRIScreenInit(ScreenPtr pScreen);
+
+void
+ATIDRICloseScreen(ScreenPtr pScreen);
+
+void
+ATIDRIDMAStart(ATIScreenInfo *atis);
+
+void
+ATIDRIDMAStop(ATIScreenInfo *atis);
+
+void
+ATIDRIDMAReset(ATIScreenInfo *atis);
+
+void
+ATIDRIDispatchIndirect(ATIScreenInfo *atis, Bool discard);
+
+drmBufPtr
+ATIDRIGetBuffer(ATIScreenInfo *atis);
+
+#endif /* USE_DRI */
+
+/* ati_cursor.c */
+Bool
+ATICursorInit(ScreenPtr pScreen);
+
+void
+ATICursorEnable(ScreenPtr pScreen);
+
+void
+ATICursorDisable(ScreenPtr pScreen);
+
+void
+ATICursorFini(ScreenPtr pScreen);
+
+void
+ATIRecolorCursor(ScreenPtr pScreen, int ndef, xColorItem *pdef);
+
+int
+ATILog2(int val);
+
+/* ati_video.c */
+Bool
+ATIInitVideo(ScreenPtr pScreen);
+
+void
+ATIFiniVideo(ScreenPtr pScreen);
+
+extern KdCardFuncs ATIFuncs;
+
+#endif /* _ATI_H_ */
diff --git a/xorg-server/hw/kdrive/ati/ati_cursor.c b/xorg-server/hw/kdrive/ati/ati_cursor.c
new file mode 100644
index 000000000..d2ce686df
--- /dev/null
+++ b/xorg-server/hw/kdrive/ati/ati_cursor.c
@@ -0,0 +1,559 @@
+/*
+ * Copyright © 2004 Eric Anholt
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that
+ * copyright notice and this permission notice appear in supporting
+ * documentation, and that the name of Eric Anholt not be used in
+ * advertising or publicity pertaining to distribution of the software without
+ * specific, written prior permission. Eric Anholt makes no
+ * representations about the suitability of this software for any purpose. It
+ * is provided "as is" without express or implied warranty.
+ *
+ * ERIC ANHOLT DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL ERIC ANHOLT BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include <kdrive-config.h>
+#endif
+#include "ati.h"
+#include "ati_reg.h"
+#include "cursorstr.h"
+#include "ati_draw.h"
+
+static void
+ATIMoveCursor(ScreenPtr pScreen, int x, int y)
+{
+ KdScreenPriv(pScreen);
+ ATICardInfo(pScreenPriv);
+ ATIScreenInfo(pScreenPriv);
+ ATICursor *pCurPriv = &atis->cursor;
+ CARD16 xoff, yoff;
+ char *mmio = atic->reg_base;
+ int stride = atic->is_radeon ? 256 : 16;
+
+ if (!pCurPriv->has_cursor)
+ return;
+
+ if (!pScreenPriv->enabled)
+ return;
+
+ x -= pCurPriv->xhot;
+ xoff = 0;
+ if (x < 0) {
+ xoff = -x;
+ x = 0;
+ }
+ y -= pCurPriv->yhot;
+ yoff = 0;
+ if (y < 0) {
+ yoff = -y;
+ y = 0;
+ }
+
+ MMIO_OUT32(mmio, ATI_REG_CUR_HORZ_VERT_OFF, ATI_CUR_LOCK |
+ (xoff << 16) | yoff);
+ MMIO_OUT32(mmio, ATI_REG_CUR_HORZ_VERT_POSN, ATI_CUR_LOCK |
+ (x << 16) | y);
+ MMIO_OUT32(mmio, ATI_REG_CUR_OFFSET, (pCurPriv->area->offset + yoff *
+ stride));
+}
+
+static void
+ClassicAllocCursorColors(ScreenPtr pScreen)
+{
+ KdScreenPriv(pScreen);
+ ATIScreenInfo(pScreenPriv);
+ ATICursor *pCurPriv = &atis->cursor;
+ CursorPtr pCursor = pCurPriv->pCursor;
+
+ KdAllocateCursorPixels(pScreen, 0, pCursor, &pCurPriv->source,
+ &pCurPriv->mask);
+ switch (pScreenPriv->screen->fb[0].bitsPerPixel) {
+ case 4:
+ pCurPriv->source |= pCurPriv->source << 4;
+ pCurPriv->mask |= pCurPriv->mask << 4;
+ /* FALLTHROUGH */
+ case 8:
+ pCurPriv->source |= pCurPriv->source << 8;
+ pCurPriv->mask |= pCurPriv->mask << 8;
+ /* FALLTHROUGH */
+ case 16:
+ pCurPriv->source |= pCurPriv->source << 16;
+ pCurPriv->mask |= pCurPriv->mask << 16;
+ }
+}
+
+static void
+ClassicSetCursorColors(ScreenPtr pScreen)
+{
+ KdScreenPriv(pScreen);
+ ATICardInfo(pScreenPriv);
+ ATIScreenInfo(pScreenPriv);
+ ATICursor *pCurPriv = &atis->cursor;
+ char *mmio = atic->reg_base;
+
+ MMIO_OUT32(mmio, ATI_REG_CUR_CLR0, pCurPriv->mask);
+ MMIO_OUT32(mmio, ATI_REG_CUR_CLR1, pCurPriv->source);
+}
+
+static void
+ClassicRecolorCursor(ScreenPtr pScreen, int ndef, xColorItem *pdef)
+{
+ KdScreenPriv(pScreen);
+ ATIScreenInfo(pScreenPriv);
+ ATICursor *pCurPriv = &atis->cursor;
+ CursorPtr pCursor = pCurPriv->pCursor;
+
+ if (!pCurPriv->has_cursor || !pCursor)
+ return;
+
+ if (!pScreenPriv->enabled)
+ return;
+
+ if (pdef) {
+ while (ndef != 0) {
+ if (pdef->pixel == pCurPriv->source ||
+ pdef->pixel == pCurPriv->mask)
+ break;
+ ndef--;
+ }
+
+ if (ndef == 0)
+ return;
+ }
+ ClassicAllocCursorColors(pScreen);
+ ClassicSetCursorColors(pScreen);
+}
+
+#define InvertBits32(v) do { \
+ v = ((v & 0x55555555) << 1) | ((v >> 1) & 0x55555555); \
+ v = ((v & 0x33333333) << 2) | ((v >> 2) & 0x33333333); \
+ v = ((v & 0x0f0f0f0f) << 4) | ((v >> 4) & 0x0f0f0f0f); \
+} while (0)
+
+static void
+ClassicLoadCursor(ScreenPtr pScreen)
+{
+ KdScreenPriv(pScreen);
+ ATICardInfo(pScreenPriv);
+ ATIScreenInfo(pScreenPriv);
+ ATICursor *pCurPriv = &atis->cursor;
+ CursorPtr pCursor = pCurPriv->pCursor;
+ CursorBitsPtr bits = pCursor->bits;
+ int h;
+ CARD32 *ram, *msk, *mskLine, *src, *srcLine;
+ int i;
+ int lwsrc;
+ CARD32 tmp;
+ char *mmio = atic->reg_base;
+
+ ClassicAllocCursorColors(pScreen);
+
+ pCurPriv->pCursor = pCursor;
+ pCurPriv->xhot = pCursor->bits->xhot;
+ pCurPriv->yhot = pCursor->bits->yhot;
+
+ /* Stick new image into cursor memory */
+ ram = (CARD32 *)(pScreenPriv->screen->memory_base +
+ pCurPriv->area->offset);
+ mskLine = (CARD32 *)bits->mask;
+ srcLine = (CARD32 *)bits->source;
+
+ h = bits->height;
+ if (h > ATI_CURSOR_HEIGHT)
+ h = ATI_CURSOR_HEIGHT;
+
+ lwsrc = BitmapBytePad(bits->width) / 4; /* words per line */
+
+ tmp = MMIO_IN32(mmio, ATI_REG_GEN_CNTL);
+ MMIO_OUT32(mmio, ATI_REG_GEN_CNTL, tmp & ~ATI_CRTC_CUR_EN);
+
+ for (i = 0; i < ATI_CURSOR_HEIGHT; i++) {
+ CARD32 m1, m2, s1, s2;
+
+ msk = mskLine;
+ src = srcLine;
+ mskLine += lwsrc;
+ srcLine += lwsrc;
+
+ if (i < h && 0 < lwsrc) {
+ m1 = ~*msk++;
+ s1 = *src++;
+ InvertBits32(m1);
+ InvertBits32(s1);
+ } else {
+ m1 = 0xffffffff;
+ s1 = 0x0;
+ }
+ if (i < h && 1 < lwsrc) {
+ m2 = ~*msk++;
+ s2 = *src++;
+ InvertBits32(m2);
+ InvertBits32(s2);
+ } else {
+ m2 = 0xffffffff;
+ s2 = 0x0;
+ }
+
+ *ram++ = m1;
+ *ram++ = m2;
+ *ram++ = s1;
+ *ram++ = s2;
+ }
+
+ /* Not sure why this is necessary, but it prevents some cursor
+ * corruption. Not even all of it.
+ */
+ for (i = 0; i < ATI_CURSOR_HEIGHT; i++) {
+ *ram++ = 0xffffffff;
+ *ram++ = 0xffffffff;
+ *ram++ = 0x0;
+ *ram++ = 0x0;
+ }
+
+ /* Enable the cursor */
+ tmp = MMIO_IN32(mmio, ATI_REG_GEN_CNTL);
+ MMIO_OUT32(mmio, ATI_REG_GEN_CNTL, tmp | ATI_CRTC_CUR_EN);
+
+ /* Set new color */
+ ClassicSetCursorColors(pScreen);
+
+}
+
+static void
+RadeonLoadCursor(ScreenPtr pScreen)
+{
+ KdScreenPriv(pScreen);
+ ATICardInfo(pScreenPriv);
+ ATIScreenInfo(pScreenPriv);
+ ATICursor *pCurPriv = &atis->cursor;
+ CursorPtr pCursor = pCurPriv->pCursor;
+ CursorBitsPtr bits = pCursor->bits;
+ int h, w;
+ int x, y;
+ CARD32 *ram, *msk, *mskLine, *src, *srcLine;
+ int lwsrc;
+ CARD32 tmp;
+ char *mmio = atic->reg_base;
+
+ pCurPriv->pCursor = pCursor;
+ pCurPriv->xhot = pCursor->bits->xhot;
+ pCurPriv->yhot = pCursor->bits->yhot;
+
+ w = bits->width;
+ if (w > ATI_CURSOR_WIDTH)
+ w = ATI_CURSOR_WIDTH;
+
+ h = bits->height;
+ if (h > ATI_CURSOR_HEIGHT)
+ h = ATI_CURSOR_HEIGHT;
+
+ tmp = MMIO_IN32(mmio, 0x7c);
+ tmp = 0x00010f80;
+ MMIO_OUT32 (mmio, 0x7c, tmp);
+
+ tmp = MMIO_IN32(mmio, ATI_REG_GEN_CNTL);
+ tmp &= ~(ATI_CRTC_CUR_EN | ATI_CRTC_ICON_EN | ATI_CRTC_ARGB_EN);
+ MMIO_OUT32(mmio, ATI_REG_GEN_CNTL, tmp);
+
+ /* Stick new image into cursor memory */
+ ram = (CARD32 *)(pScreenPriv->screen->memory_base +
+ pCurPriv->area->offset);
+ if (pCursor->bits->argb)
+ {
+ srcLine = pCursor->bits->argb;
+ for (y = 0; y < h; y++)
+ {
+ src = srcLine;
+ srcLine += pCursor->bits->width;
+ for (x = 0; x < w; x++)
+ *ram++ = *src++;
+ for (; x < ATI_CURSOR_WIDTH; x++)
+ *ram++ = 0;
+ }
+ for (; y < ATI_CURSOR_HEIGHT; y++)
+ for (x = 0; x < ATI_CURSOR_WIDTH; x++)
+ *ram++ = 0;
+ }
+ else
+ {
+ CARD32 colors[4];
+
+ colors[0] = 0;
+ colors[1] = 0;
+ colors[2] = (((pCursor->backRed >> 8) << 16) |
+ ((pCursor->backGreen >> 8) << 8) |
+ ((pCursor->backBlue >> 8) << 0) |
+ 0xff000000);
+ colors[3] = (((pCursor->foreRed >> 8) << 16) |
+ ((pCursor->foreGreen >> 8) << 8) |
+ ((pCursor->foreBlue >> 8) << 0) |
+ 0xff000000);
+
+ mskLine = (CARD32 *)bits->mask;
+ srcLine = (CARD32 *)bits->source;
+
+ /* words per line */
+ lwsrc = BitmapBytePad(bits->width) / 4;
+
+ for (y = 0; y < ATI_CURSOR_HEIGHT; y++)
+ {
+ CARD32 m, s;
+
+ msk = mskLine;
+ src = srcLine;
+ mskLine += lwsrc;
+ srcLine += lwsrc;
+
+ for (x = 0; x < ATI_CURSOR_WIDTH / 32; x++)
+ {
+ int k;
+ if (y < h && x < lwsrc)
+ {
+ m = *msk++;
+ s = *src++;
+ }
+ else
+ {
+ m = 0x0;
+ s = 0x0;
+ }
+
+ for (k = 0; k < 32; k++)
+ {
+ CARD32 bits = (s & 1) | ((m & 1) << 1);
+ *ram++ = colors[bits];
+ s >>= 1;
+ m >>= 1;
+ }
+ }
+ }
+ }
+
+ /* Enable the cursor */
+ tmp &= ~(ATI_CRTC_ICON_EN);
+ tmp |= ATI_CRTC_ARGB_EN;
+ tmp |= ATI_CRTC_CUR_EN;
+ MMIO_OUT32(mmio, ATI_REG_GEN_CNTL, tmp);
+}
+
+static void
+ATIUnloadCursor(ScreenPtr pScreen)
+{
+ KdScreenPriv(pScreen);
+ ATICardInfo(pScreenPriv);
+ char *mmio = atic->reg_base;
+ CARD32 tmp;
+
+ tmp = MMIO_IN32(mmio, ATI_REG_GEN_CNTL);
+ tmp &= ~(ATI_CRTC_CUR_EN | ATI_CRTC_ICON_EN | ATI_CRTC_ARGB_EN);
+ MMIO_OUT32(mmio, ATI_REG_GEN_CNTL, tmp);
+}
+
+static Bool
+ATIRealizeCursor(ScreenPtr pScreen, CursorPtr pCursor)
+{
+ KdScreenPriv(pScreen);
+ ATICardInfo(pScreenPriv);
+ ATIScreenInfo(pScreenPriv);
+ ATICursor *pCurPriv = &atis->cursor;
+
+ if (!pScreenPriv->enabled)
+ return TRUE;
+
+ /* miRecolorCursor does this */
+ if (pCursor && pCurPriv->pCursor == pCursor)
+ {
+ int x, y;
+
+ miPointerPosition(&x, &y);
+ if (atic->is_radeon)
+ RadeonLoadCursor (pScreen);
+ else
+ ClassicLoadCursor(pScreen);
+ /* Move to new position */
+ ATIMoveCursor(pScreen, x, y);
+ }
+
+ return TRUE;
+}
+
+static Bool
+ATIUnrealizeCursor(ScreenPtr pScreen, CursorPtr pCursor)
+{
+ return TRUE;
+}
+
+static void
+ATISetCursor(ScreenPtr pScreen, CursorPtr pCursor, int x, int y)
+{
+ KdScreenPriv(pScreen);
+ ATICardInfo(pScreenPriv);
+ ATIScreenInfo(pScreenPriv);
+ ATICursor *pCurPriv = &atis->cursor;
+
+ pCurPriv->pCursor = pCursor;
+
+ if (!pScreenPriv->enabled)
+ return;
+
+ if (pCursor)
+ {
+ if (atic->is_radeon)
+ RadeonLoadCursor (pScreen);
+ else
+ ClassicLoadCursor(pScreen);
+ /* Move to new position */
+ ATIMoveCursor(pScreen, x, y);
+ }
+ else
+ ATIUnloadCursor(pScreen);
+}
+
+miPointerSpriteFuncRec ATIPointerSpriteFuncs = {
+ ATIRealizeCursor,
+ ATIUnrealizeCursor,
+ ATISetCursor,
+ ATIMoveCursor,
+};
+
+static void
+ATIQueryBestSize(int class, unsigned short *pwidth, unsigned short *pheight,
+ ScreenPtr pScreen)
+{
+ KdScreenPriv(pScreen);
+ ATIScreenInfo(pScreenPriv);
+ ATICursor *pCurPriv = &atis->cursor;
+
+ switch (class)
+ {
+ case CursorShape:
+ if (*pwidth > pCurPriv->width)
+ *pwidth = pCurPriv->width;
+ if (*pheight > pCurPriv->height)
+ *pheight = pCurPriv->height;
+ if (*pwidth > pScreen->width)
+ *pwidth = pScreen->width;
+ if (*pheight > pScreen->height)
+ *pheight = pScreen->height;
+ break;
+ default:
+ fbQueryBestSize(class, pwidth, pheight, pScreen);
+ break;
+ }
+}
+
+static void
+ATICursorSave(ScreenPtr pScreen, KdOffscreenArea *area)
+{
+ KdScreenPriv(pScreen);
+ ATIScreenInfo(pScreenPriv);
+ ATICursor *pCurPriv = &atis->cursor;
+
+ pCurPriv->area = NULL;
+}
+
+void
+ATICursorEnable(ScreenPtr pScreen)
+{
+ KdScreenPriv(pScreen);
+ ATICardInfo(pScreenPriv);
+ ATIScreenInfo(pScreenPriv);
+ ATICursor *pCurPriv = &atis->cursor;
+
+ if (!pCurPriv->has_cursor)
+ return;
+
+ if (pCurPriv->area == NULL) {
+ if (atic->is_radeon)
+ pCurPriv->area = KdOffscreenAlloc(pScreen,
+ ATI_CURSOR_HEIGHT * ATI_CURSOR_WIDTH * 4,
+ 128, TRUE, ATICursorSave, atis);
+ else
+ pCurPriv->area = KdOffscreenAlloc(pScreen,
+ ATI_CURSOR_HEIGHT * ATI_CURSOR_PITCH * 2,
+ 32, TRUE, ATICursorSave, atis);
+ }
+ if (pCurPriv->area == NULL)
+ FatalError("Couldn't allocate offscreen memory for cursor.\n");
+
+ if (pCurPriv->pCursor) {
+ int x, y;
+
+ miPointerPosition(&x, &y);
+ if (atic->is_radeon)
+ RadeonLoadCursor(pScreen);
+ else
+ ClassicLoadCursor(pScreen);
+ /* Move to new position */
+ ATIMoveCursor(pScreen, x, y);
+ }
+ else
+ ATIUnloadCursor(pScreen);
+}
+
+void
+ATICursorDisable(ScreenPtr pScreen)
+{
+ KdScreenPriv(pScreen);
+ ATIScreenInfo(pScreenPriv);
+ ATICursor *pCurPriv = &atis->cursor;
+
+ if (!pScreenPriv->enabled || !pCurPriv->has_cursor)
+ return;
+
+ if (pCurPriv->pCursor)
+ ATIUnloadCursor(pScreen);
+}
+
+Bool
+ATICursorInit(ScreenPtr pScreen)
+{
+ KdScreenPriv(pScreen);
+ ATICardInfo(pScreenPriv);
+ ATIScreenInfo(pScreenPriv);
+ ATICursor *pCurPriv = &atis->cursor;
+
+ pCurPriv->has_cursor = FALSE;
+
+ if (atic->reg_base == NULL)
+ return FALSE;
+
+ pCurPriv->width = ATI_CURSOR_WIDTH;
+ pCurPriv->height= ATI_CURSOR_HEIGHT;
+ pScreen->QueryBestSize = ATIQueryBestSize;
+ miPointerInitialize(pScreen, &ATIPointerSpriteFuncs,
+ &kdPointerScreenFuncs, FALSE);
+ pCurPriv->has_cursor = TRUE;
+ pCurPriv->pCursor = NULL;
+ return TRUE;
+}
+
+void
+ATIRecolorCursor (ScreenPtr pScreen, int ndef, xColorItem *pdef)
+{
+ KdScreenPriv(pScreen);
+ ATICardInfo(pScreenPriv);
+
+ if (!atic->is_radeon)
+ ClassicRecolorCursor (pScreen, ndef, pdef);
+}
+
+void
+ATICursorFini(ScreenPtr pScreen)
+{
+ KdScreenPriv(pScreen);
+ ATIScreenInfo(pScreenPriv);
+ ATICursor *pCurPriv = &atis->cursor;
+
+ pCurPriv->has_cursor = FALSE;
+ pCurPriv->pCursor = NULL;
+}
diff --git a/xorg-server/hw/kdrive/ati/ati_dma.c b/xorg-server/hw/kdrive/ati/ati_dma.c
new file mode 100644
index 000000000..b97d79b25
--- /dev/null
+++ b/xorg-server/hw/kdrive/ati/ati_dma.c
@@ -0,0 +1,1037 @@
+/*
+ * Copyright © 2004 Eric Anholt
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that
+ * copyright notice and this permission notice appear in supporting
+ * documentation, and that the name of Eric Anholt not be used in
+ * advertising or publicity pertaining to distribution of the software without
+ * specific, written prior permission. Eric Anholt makes no
+ * representations about the suitability of this software for any purpose. It
+ * is provided "as is" without express or implied warranty.
+ *
+ * ERIC ANHOLT DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL ERIC ANHOLT BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#include <sys/time.h>
+
+#include "ati.h"
+#include "ati_reg.h"
+#include "ati_dma.h"
+#include "ati_draw.h"
+
+#ifdef USE_DRI
+#include "radeon_common.h"
+#include "r128_common.h"
+#include "ati_sarea.h"
+#endif /* USE_DRI */
+
+#include "agp.h"
+
+#define DEBUG_FIFO 0
+
+extern CARD32 r128_cce_microcode[];
+extern CARD32 radeon_cp_microcode[][2];
+extern CARD32 r200_cp_microcode[][2];
+extern CARD32 r300_cp_microcode[][2];
+
+#if DEBUG_FIFO
+static void
+ATIDebugFifo(ATIScreenInfo *atis)
+{
+ ATICardInfo *atic = atis->atic;
+ char *mmio = atic->reg_base;
+
+ if (atic->is_radeon) {
+ ErrorF("RADEON_REG_CP_CSQ_CNTL: 0x%08x\n",
+ MMIO_IN32(mmio, RADEON_REG_CP_CSQ_CNTL));
+ ErrorF("RADEON_REG_CP_CSQ_STAT: 0x%08x\n",
+ MMIO_IN32(mmio, RADEON_REG_CP_CSQ_STAT));
+ ErrorF("RADEON_REG_RBBM_STATUS: 0x%08x\n",
+ MMIO_IN32(mmio, RADEON_REG_RBBM_STATUS));
+ ErrorF("RADEON_REG_RB3D_DSTCACHE_CTLSTAT: 0x%08x\n",
+ MMIO_IN32(mmio, RADEON_REG_RB3D_DSTCACHE_CTLSTAT));
+ } else {
+ ErrorF("R128_REG_PM4_BUFFER_CNTL: 0x%08x\n",
+ MMIO_IN32(mmio, R128_REG_PM4_BUFFER_CNTL));
+ ErrorF("R128_REG_PM4_STAT: 0x%08x\n",
+ MMIO_IN32(mmio, R128_REG_PM4_STAT));
+ ErrorF("R128_REG_GUI_STAT: 0x%08x\n",
+ MMIO_IN32(mmio, R128_REG_GUI_STAT));
+ ErrorF("R128_REG_PC_NGUI_CTLSTAT: 0x%08x\n",
+ MMIO_IN32(mmio, R128_REG_PC_NGUI_CTLSTAT));
+ }
+}
+#endif
+
+static void
+ATIUploadMicrocode(ATIScreenInfo *atis)
+{
+ ATICardInfo *atic = atis->atic;
+ char *mmio = atic->reg_base;
+ int i;
+
+ MMIO_OUT32(mmio, ATI_REG_MICROCODE_RAM_ADDR, 0);
+ if (atic->is_radeon && atic->is_r300) {
+ for (i = 0; i < 256; i++) {
+ MMIO_OUT32(mmio, ATI_REG_MICROCODE_RAM_DATAH,
+ r300_cp_microcode[i][1]);
+ MMIO_OUT32(mmio, ATI_REG_MICROCODE_RAM_DATAL,
+ r300_cp_microcode[i][0]);
+ }
+ } else if (atic->is_radeon && atic->is_r200) {
+ for (i = 0; i < 256; i++) {
+ MMIO_OUT32(mmio, ATI_REG_MICROCODE_RAM_DATAH,
+ r200_cp_microcode[i][1]);
+ MMIO_OUT32(mmio, ATI_REG_MICROCODE_RAM_DATAL,
+ r200_cp_microcode[i][0]);
+ }
+ } else if (atic->is_radeon && atic->is_r100) {
+ for (i = 0; i < 256; i++) {
+ MMIO_OUT32(mmio, ATI_REG_MICROCODE_RAM_DATAH,
+ radeon_cp_microcode[i][1]);
+ MMIO_OUT32(mmio, ATI_REG_MICROCODE_RAM_DATAL,
+ radeon_cp_microcode[i][0]);
+ }
+ } else {
+ for (i = 0; i < 256; i++) {
+ MMIO_OUT32(mmio, ATI_REG_MICROCODE_RAM_DATAH,
+ r128_cce_microcode[i * 2]);
+ MMIO_OUT32(mmio, ATI_REG_MICROCODE_RAM_DATAL,
+ r128_cce_microcode[i * 2 + 1]);
+ }
+ }
+}
+
+/* Required when reading from video memory after acceleration to make sure all
+ * data has been flushed to video memory from the pixel cache.
+ */
+static void
+ATIFlushPixelCache(ATIScreenInfo *atis)
+{
+ ATICardInfo *atic = atis->atic;
+ char *mmio = atic->reg_base;
+ CARD32 temp;
+ TIMEOUT_LOCALS;
+
+ if (atic->is_radeon) {
+ temp = MMIO_IN32(mmio, RADEON_REG_RB3D_DSTCACHE_CTLSTAT);
+ temp |= RADEON_RB3D_DC_FLUSH_ALL;
+ MMIO_OUT32(mmio, RADEON_REG_RB3D_DSTCACHE_CTLSTAT, temp);
+
+ WHILE_NOT_TIMEOUT(.2) {
+ if ((MMIO_IN32(mmio, RADEON_REG_RB3D_DSTCACHE_CTLSTAT) &
+ RADEON_RB3D_DC_BUSY) == 0)
+ break;
+ }
+ } else {
+ temp = MMIO_IN32(mmio, R128_REG_PC_NGUI_CTLSTAT);
+ temp |= R128_PC_FLUSH_ALL;
+ MMIO_OUT32(mmio, R128_REG_PC_NGUI_CTLSTAT, temp);
+
+ WHILE_NOT_TIMEOUT(.2) {
+ if ((MMIO_IN32(mmio, R128_REG_PC_NGUI_CTLSTAT) &
+ R128_PC_BUSY) != R128_PC_BUSY)
+ break;
+ }
+ }
+ if (TIMEDOUT())
+ ErrorF("Timeout flushing pixel cache.\n");
+}
+
+static void
+ATIEngineReset(ATIScreenInfo *atis)
+{
+ ATICardInfo *atic = atis->atic;
+ char *mmio = atic->reg_base;
+ CARD32 clockcntlindex, mclkcntl;
+
+#if DEBUG_FIFO
+ ErrorF("Engine Reset!\n");
+ ATIDebugFifo(atis);
+#endif
+
+ ATIFlushPixelCache(atis);
+
+ clockcntlindex = MMIO_IN32(mmio, ATI_REG_CLOCK_CNTL_INDEX);
+ if (atic->is_r300)
+ R300CGWorkaround(atis);
+
+ if (atic->is_radeon) {
+ CARD32 host_path_cntl;
+
+ mclkcntl = INPLL(mmio, RADEON_REG_MCLK_CNTL);
+
+ OUTPLL(mmio, RADEON_REG_MCLK_CNTL, mclkcntl |
+ RADEON_FORCEON_MCLKA |
+ RADEON_FORCEON_MCLKB |
+ RADEON_FORCEON_YCLKA |
+ RADEON_FORCEON_YCLKB |
+ RADEON_FORCEON_MC |
+ RADEON_FORCEON_AIC);
+
+ host_path_cntl = MMIO_IN32(mmio, RADEON_REG_HOST_PATH_CNTL);
+
+ if (atic->is_r300) {
+ MMIO_OUT32(mmio, RADEON_REG_RBBM_SOFT_RESET,
+ RADEON_SOFT_RESET_CP |
+ RADEON_SOFT_RESET_HI |
+ RADEON_SOFT_RESET_E2);
+ } else {
+ MMIO_OUT32(mmio, RADEON_REG_RBBM_SOFT_RESET,
+ RADEON_SOFT_RESET_CP |
+ RADEON_SOFT_RESET_SE |
+ RADEON_SOFT_RESET_RE |
+ RADEON_SOFT_RESET_PP |
+ RADEON_SOFT_RESET_E2 |
+ RADEON_SOFT_RESET_RB);
+ }
+ MMIO_IN32(mmio, RADEON_REG_RBBM_SOFT_RESET);
+ MMIO_OUT32(mmio, RADEON_REG_RBBM_SOFT_RESET, 0);
+
+ MMIO_OUT32(mmio, RADEON_REG_HOST_PATH_CNTL, host_path_cntl |
+ RADEON_HDP_SOFT_RESET);
+ MMIO_IN32(mmio, RADEON_REG_HOST_PATH_CNTL);
+ MMIO_OUT32(mmio, RADEON_REG_HOST_PATH_CNTL, host_path_cntl);
+
+ MMIO_OUT32(mmio, ATI_REG_CLOCK_CNTL_INDEX, clockcntlindex);
+ OUTPLL(mmio, RADEON_REG_MCLK_CNTL, mclkcntl);
+ if (atic->is_r300)
+ R300CGWorkaround(atis);
+ } else {
+ CARD32 temp;
+
+ mclkcntl = INPLL(mmio, R128_REG_MCLK_CNTL);
+
+ OUTPLL(mmio, R128_REG_MCLK_CNTL,
+ mclkcntl | R128_FORCE_GCP | R128_FORCE_PIPE3D_CP);
+
+ temp = MMIO_IN32(mmio, R128_REG_GEN_RESET_CNTL);
+ MMIO_OUT32(mmio, R128_REG_GEN_RESET_CNTL,
+ temp | R128_SOFT_RESET_GUI);
+ temp = MMIO_IN32(mmio, R128_REG_GEN_RESET_CNTL);
+ MMIO_OUT32(mmio, R128_REG_GEN_RESET_CNTL,
+ temp & ~R128_SOFT_RESET_GUI);
+ temp = MMIO_IN32(mmio, R128_REG_GEN_RESET_CNTL);
+
+ OUTPLL(mmio, R128_REG_MCLK_CNTL, mclkcntl);
+ MMIO_OUT32(mmio, ATI_REG_CLOCK_CNTL_INDEX, clockcntlindex);
+ }
+#ifdef USE_DRI
+ if (atis->using_dri) {
+ ATIDRIDMAReset(atis);
+ ATIDRIDMAStart(atis);
+ }
+#endif
+}
+
+static void
+ATIWaitAvailMMIO(ATIScreenInfo *atis, int n)
+{
+ ATICardInfo *atic = atis->atic;
+ char *mmio = atic->reg_base;
+ TIMEOUT_LOCALS;
+
+ if (atis->mmio_avail >= n) {
+ atis->mmio_avail -= n;
+ return;
+ }
+ if (atic->is_radeon) {
+ WHILE_NOT_TIMEOUT(.2) {
+ atis->mmio_avail = MMIO_IN32(mmio,
+ RADEON_REG_RBBM_STATUS) & RADEON_RBBM_FIFOCNT_MASK;
+ if (atis->mmio_avail >= n)
+ break;
+ }
+ } else {
+ WHILE_NOT_TIMEOUT(.2) {
+ atis->mmio_avail = MMIO_IN32(mmio, R128_REG_GUI_STAT) &
+ 0xfff;
+ if (atis->mmio_avail >= n)
+ break;
+ }
+ }
+ if (TIMEDOUT()) {
+ ErrorF("Timeout waiting for %d MMIO slots.\n", n);
+ ATIEngineReset(atis);
+ ATIDrawSetup(atis->screen->pScreen);
+ }
+ atis->mmio_avail -= n;
+}
+
+static int
+ATIGetAvailPrimary(ATIScreenInfo *atis)
+{
+ ATICardInfo *atic = atis->atic;
+ char *mmio = atic->reg_base;
+
+ if (atic->is_radeon) {
+ int csq_stat, diff;
+
+ csq_stat = MMIO_IN32(mmio, RADEON_REG_CP_CSQ_STAT);
+ if (atic->is_r200)
+ diff = ((csq_stat & R200_CSQ_WPTR_PRIMARY_MASK) >> 9) -
+ (csq_stat & R200_CSQ_RPTR_PRIMARY_MASK);
+ else
+ diff = ((csq_stat & RADEON_CSQ_WPTR_PRIMARY_MASK) >> 8) -
+ (csq_stat & RADEON_CSQ_RPTR_PRIMARY_MASK);
+
+ if (diff < 0)
+ return -diff;
+ else
+ return atis->cce_pri_size - diff;
+ } else {
+ return MMIO_IN32(mmio, R128_REG_PM4_STAT) &
+ R128_PM4_FIFOCNT_MASK;
+ }
+}
+
+static void
+ATIWaitAvailPrimary(ATIScreenInfo *atis, int n)
+{
+ TIMEOUT_LOCALS;
+
+ if (atis->cce_pri_avail >= n) {
+ atis->cce_pri_avail -= n;
+ return;
+ }
+
+ WHILE_NOT_TIMEOUT(.2) {
+ if (atis->cce_pri_avail >= n)
+ break;
+ atis->cce_pri_avail = ATIGetAvailPrimary(atis);
+ if (atis->cce_pri_avail >= n)
+ break;
+ }
+ if (TIMEDOUT()) {
+ ErrorF("Timeout waiting for %d CCE slots (%d avail).\n", n,
+ atis->cce_pri_avail);
+ ATIEngineReset(atis);
+ ATIDrawSetup(atis->screen->pScreen);
+ }
+ atis->cce_pri_avail -= n;
+}
+
+void
+ATIWaitIdle(ATIScreenInfo *atis)
+{
+ ATICardInfo *atic = atis->atic;
+ char *mmio = atic->reg_base;
+ TIMEOUT_LOCALS;
+
+ if (atis->indirectBuffer != NULL)
+ ATIFlushIndirect(atis, 0);
+
+#ifdef USE_DRI
+ if (atis->using_dri) {
+ int ret = 0;
+ int cmd = (atic->is_radeon ? DRM_RADEON_CP_IDLE :
+ DRM_R128_CCE_IDLE);
+ WHILE_NOT_TIMEOUT(2) {
+ ret = drmCommandNone(atic->drmFd, cmd);
+ if (ret != -EBUSY)
+ break;
+ }
+ if (TIMEDOUT()) {
+ ATIDebugFifo(atis);
+ FatalError("Timed out idling CCE (card hung)\n");
+ }
+ if (ret != 0)
+ ErrorF("Failed to idle DMA, returned %d\n", ret);
+ return;
+ }
+#endif
+
+ if (!atic->is_radeon && (atis->using_pseudo || atis->using_dma)) {
+ ATIWaitAvailPrimary(atis, atis->cce_pri_size);
+
+ WHILE_NOT_TIMEOUT(.2) {
+ if ((MMIO_IN32(mmio, R128_REG_PM4_STAT) &
+ (R128_PM4_BUSY | R128_PM4_GUI_ACTIVE)) == 0)
+ break;
+ }
+ if (TIMEDOUT()) {
+ ErrorF("Timeout idling CCE, resetting...\n");
+ ATIEngineReset(atis);
+ ATIDrawSetup(atis->screen->pScreen);
+ }
+ }
+
+ /* Radeon CP idle is the same as MMIO idle. */
+ if (atis->using_pio || atic->is_radeon) {
+ /* Empty the fifo */
+ ATIWaitAvailMMIO(atis, 64);
+
+ if (atic->is_radeon) {
+ WHILE_NOT_TIMEOUT(.2) {
+ if ((MMIO_IN32(mmio, RADEON_REG_RBBM_STATUS) &
+ RADEON_RBBM_ACTIVE) == 0)
+ break;
+ }
+ } else {
+ WHILE_NOT_TIMEOUT(.2) {
+ if ((MMIO_IN32(mmio, R128_REG_GUI_STAT) &
+ R128_GUI_ACTIVE) == 0)
+ break;
+ }
+ }
+ if (TIMEDOUT()) {
+ ErrorF("Timeout idling accelerator, resetting...\n");
+ ATIEngineReset(atis);
+ ATIDrawSetup(atis->screen->pScreen);
+ }
+ }
+
+ ATIFlushPixelCache(atis);
+
+#if DEBUG_FIFO
+ ErrorF("Idle?\n");
+ ATIDebugFifo(atis);
+#endif
+}
+
+dmaBuf *
+ATIGetDMABuffer(ATIScreenInfo *atis)
+{
+ dmaBuf *buf;
+
+ buf = (dmaBuf *)xalloc(sizeof(dmaBuf));
+ if (buf == NULL)
+ return NULL;
+
+#ifdef USE_DRI
+ if (atis->using_dri) {
+ buf->drmBuf = ATIDRIGetBuffer(atis);
+ if (buf->drmBuf == NULL) {
+ xfree(buf);
+ return NULL;
+ }
+ buf->size = buf->drmBuf->total;
+ buf->used = buf->drmBuf->used;
+ buf->address = buf->drmBuf->address;
+ return buf;
+ }
+#endif /* USE_DRI */
+
+ if (atis->using_dma)
+ buf->size = atis->ring_len / 2;
+ else
+ buf->size = 512 * 1024;
+ buf->address = xalloc(buf->size);
+ if (buf->address == NULL) {
+ xfree(buf);
+ return NULL;
+ }
+ buf->used = 0;
+
+ return buf;
+}
+
+/* Decode a type-3 packet into MMIO register writes. Only some type-3 packets
+ * supported, and only partially.
+ */
+static void
+ATIDispatchPacket3MMIO(ATIScreenInfo *atis, CARD32 header, CARD32 *addr,
+ int count)
+{
+ ATICardInfo *atic = atis->atic;
+ char *mmio = atic->reg_base;
+ CARD32 settings;
+ int i = 0;
+
+ settings = addr[i++];
+
+ if ((settings & ATI_GMC_SRC_PITCH_OFFSET_CNTL) != 0)
+ MMIO_OUT32(mmio, ATI_REG_SRC_PITCH_OFFSET, addr[i++]);
+ if ((settings & ATI_GMC_DST_PITCH_OFFSET_CNTL) != 0)
+ MMIO_OUT32(mmio, ATI_REG_DST_PITCH_OFFSET, addr[i++]);
+ if ((settings & ATI_GMC_BRUSH_MASK) == ATI_GMC_BRUSH_SOLID_COLOR)
+ MMIO_OUT32(mmio, ATI_REG_DP_BRUSH_FRGD_CLR, addr[i++]);
+
+ switch (header & (ATI_CCE_PACKETTYPE_MASK |
+ ATI_CCE_PACKET3_IT_OPCODE_MASK))
+ {
+ case ATI_CCE_PACKET3_PAINT_MULTI:
+ while (i < count) {
+ MMIO_OUT32(mmio, ATI_REG_DST_Y_X,
+ (addr[i] >> 16) | (addr[i] << 16));
+ i++;
+ MMIO_OUT32(mmio, ATI_REG_DST_HEIGHT_WIDTH,
+ (addr[i] >> 16) | (addr[i] << 16));
+ i++;
+ }
+ break;
+ case ATI_CCE_PACKET3_BITBLT_MULTI:
+ while (i < count) {
+ MMIO_OUT32(mmio, ATI_REG_SRC_Y_X,
+ (addr[i] >> 16) | (addr[i] << 16));
+ i++;
+ MMIO_OUT32(mmio, ATI_REG_DST_Y_X,
+ (addr[i] >> 16) | (addr[i] << 16));
+ i++;
+ MMIO_OUT32(mmio, ATI_REG_DST_HEIGHT_WIDTH,
+ (addr[i] >> 16) | (addr[i] << 16));
+ i++;
+ }
+ break;
+ default:
+ ErrorF("Unsupported packet: 0x%x\n", header);
+ }
+}
+
+/* Dispatch packets by decoding them and writing to registers. Doesn't support
+ * the type 3 packets.
+ */
+static void
+ATIDispatchIndirectMMIO(ATIScreenInfo *atis)
+{
+ ATICardInfo *atic = atis->atic;
+ dmaBuf *buf = atis->indirectBuffer;
+ char *mmio = atic->reg_base;
+ CARD32 *addr;
+ CARD32 reg;
+ int i, n, count;
+
+ addr = (CARD32 *)((char *)buf->address + atis->indirectStart);
+ count = (buf->used - atis->indirectStart) / 4;
+
+ for (i = 0; i < count; i++) {
+ CARD32 header = addr[i];
+
+ switch (header & ATI_CCE_PACKETTYPE_MASK)
+ {
+ case ATI_CCE_PACKET0:
+ n = ((header & ATI_CCE_PACKET0_COUNT_MASK) >> 16) + 1;
+ reg = (header & ATI_CCE_PACKET0_REG_MASK) << 2;
+ ATIWaitAvailMMIO(atis, n);
+ while (n > 0) {
+ i++;
+ MMIO_OUT32(mmio, reg, addr[i]);
+ if ((header & ATI_CCE_PACKET0_ONE_REG_WR) == 0)
+ reg += 4;
+ n--;
+ }
+ break;
+ case ATI_CCE_PACKET1:
+ reg = (header & ATI_CCE_PACKET1_REG_1) << 2;
+ MMIO_OUT32(mmio, reg, addr[++i]);
+ reg = ((header & ATI_CCE_PACKET1_REG_2) >>
+ ATI_CCE_PACKET1_REG_2_SHIFT) << 2;
+ MMIO_OUT32(mmio, reg, addr[++i]);
+ break;
+ case ATI_CCE_PACKET2:
+ /* PACKET2 is a no-op packet. */
+ break;
+ case ATI_CCE_PACKET3:
+ n = ((header & ATI_CCE_PACKET3_COUNT_MASK) >> 16) + 1;
+ ATIDispatchPacket3MMIO(atis, header, &addr[i], n);
+ i += n;
+ break;
+ default:
+ ErrorF("Unsupported packet: 0x%x\n", addr[i]);
+ }
+ }
+}
+
+/* Dispatch packets by sending them through the MMIO aperture. */
+static void
+R128DispatchIndirectPDMA(ATIScreenInfo *atis)
+{
+ ATICardInfo *atic = atis->atic;
+ dmaBuf *buf = atis->indirectBuffer;
+ char *mmio = atic->reg_base;
+ CARD32 *addr;
+ int count;
+
+ addr = (CARD32 *)((char *)buf->address + atis->indirectStart);
+ count = (buf->used - atis->indirectStart) / 4;
+
+ while (count > 1) {
+ ATIWaitAvailPrimary(atis, 2);
+ MMIO_OUT32(mmio, R128_REG_PM4_FIFO_DATA_EVEN, *addr++);
+ MMIO_OUT32(mmio, R128_REG_PM4_FIFO_DATA_ODD, *addr++);
+ count -= 2;
+ }
+
+ /* Submit last DWORD if necessary. */
+ if (count != 0) {
+ ATIWaitAvailPrimary(atis, 2);
+ MMIO_OUT32(mmio, R128_REG_PM4_FIFO_DATA_EVEN, *addr++);
+ MMIO_OUT32(mmio, R128_REG_PM4_FIFO_DATA_ODD, ATI_CCE_PACKET2);
+ }
+}
+
+/* Dispatch packets by sending them through the MMIO aperture, using the
+ * primary CCE ring. */
+static void
+RadeonDispatchIndirectPDMA(ATIScreenInfo *atis)
+{
+ ATICardInfo *atic = atis->atic;
+ dmaBuf *buf = atis->indirectBuffer;
+ char *mmio = atic->reg_base;
+ CARD32 *addr;
+ int count, avail, reg, i;
+ TIMEOUT_LOCALS;
+
+ addr = (CARD32 *)((char *)buf->address + atis->indirectStart);
+ count = (buf->used - atis->indirectStart) / 4;
+
+ reg = RADEON_REG_CSQ_APER_PRIMARY;
+ WHILE_NOT_TIMEOUT(3) {
+ /* 3 seconds is empirical, using render_bench on an r100. */
+ if (count <= 0)
+ break;
+ avail = ATIGetAvailPrimary(atis);
+ for (i = 0; i < min(count, avail); i++) {
+ MMIO_OUT32(mmio, reg, *addr++);
+ if (reg == RADEON_REG_CSQ_APER_PRIMARY_END)
+ reg = RADEON_REG_CSQ_APER_PRIMARY;
+ else
+ reg += 4;
+ }
+ count -= i;
+ }
+ if (TIMEDOUT()) {
+ ErrorF("Timeout submitting packets, resetting...\n");
+ ATIEngineReset(atis);
+ ATIDrawSetup(atis->screen->pScreen);
+ }
+}
+
+
+/* Dispatch packets by writing them to the (primary) ring buffer, which happens
+ * to be in framebuffer memory.
+ */
+static void
+R128DispatchIndirectDMA(ATIScreenInfo *atis)
+{
+ ATICardInfo *atic = atis->atic;
+ dmaBuf *buf = atis->indirectBuffer;
+ char *mmio = atic->reg_base;
+ CARD32 *addr;
+ int count, ring_count;
+ TIMEOUT_LOCALS;
+
+ addr = (CARD32 *)((char *)buf->address + atis->indirectStart);
+ count = (buf->used - atis->indirectStart) / 4;
+ ring_count = atis->ring_len / 4;
+
+ WHILE_NOT_TIMEOUT(.2) {
+ if (count <= 0)
+ break;
+
+ atis->ring_addr[atis->ring_write++] = *addr++;
+ if (atis->ring_write >= ring_count)
+ atis->ring_write = 0;
+ while (atis->ring_write == atis->ring_read) {
+ atis->ring_read = MMIO_IN32(mmio, ATI_REG_CCE_RPTR);
+ }
+ count--;
+ }
+ if (TIMEDOUT()) {
+ ErrorF("Timeout submitting packets, resetting...\n");
+ ATIEngineReset(atis);
+ ATIDrawSetup(atis->screen->pScreen);
+ }
+
+ /* Workaround for some early Rage 128 ASIC spins where the CCE parser
+ * may read up to 32 DWORDS beyond the end of the ring buffer memory
+ * before wrapping around, if the ring buffer was empty and a <32 DWORD
+ * packet that wraps around the end of the ring buffer is submitted.
+ * To work around that, copy the beginning of the ring buffer past the
+ * end if that may happen.
+ */
+ if (atis->ring_write < 32)
+ memcpy(atis->ring_addr + ring_count, atis->ring_addr, 32 * 4);
+
+ /* Update write pointer */
+ MMIO_OUT32(mmio, ATI_REG_CCE_WPTR, atis->ring_write);
+}
+
+void
+ATIFlushIndirect(ATIScreenInfo *atis, Bool discard)
+{
+ ATICardInfo *atic = atis->atic;
+ dmaBuf *buf = atis->indirectBuffer;
+
+ if ((atis->indirectStart == buf->used) && !discard)
+ return;
+
+#if DEBUG_FIFO
+ ErrorF("Dispatching %d DWORDS\n", (buf->used - atis->indirectStart) /
+ 4);
+#endif
+
+#ifdef USE_DRI
+ if (atis->using_dri) {
+ buf->drmBuf->used = buf->used;
+ ATIDRIDispatchIndirect(atis, discard);
+ if (discard) {
+ buf->drmBuf = ATIDRIGetBuffer(atis);
+ buf->size = buf->drmBuf->total;
+ buf->used = buf->drmBuf->used;
+ buf->address = buf->drmBuf->address;
+ atis->indirectStart = 0;
+ } else {
+ /* Start on a double word boundary */
+ atis->indirectStart = buf->used = (buf->used + 7) & ~7;
+ }
+ return;
+ }
+#endif /* USE_DRI */
+
+ if (atis->using_dma && !atic->is_radeon)
+ R128DispatchIndirectDMA(atis);
+ else if (atis->using_pseudo) {
+ if (atic->is_radeon)
+ RadeonDispatchIndirectPDMA(atis);
+ else
+ R128DispatchIndirectPDMA(atis);
+ } else
+ ATIDispatchIndirectMMIO(atis);
+
+ buf->used = 0;
+ atis->indirectStart = 0;
+}
+
+static Bool
+ATIInitAGP(ScreenPtr pScreen, int size)
+{
+ KdScreenPriv(pScreen);
+ ATIScreenInfo(pScreenPriv);
+ ATICardInfo(pScreenPriv);
+ AgpInfoPtr agp_info;
+ int screennum = atis->screen->mynum;
+
+ if (atic->is_radeon)
+ return FALSE;
+
+ if (!KdAgpGARTSupported())
+ return FALSE;
+
+ if (!KdAcquireGART(screennum))
+ return FALSE;
+
+ atis->agp_key = KdAllocateGARTMemory(screennum, size, 0, NULL);
+ if (atis->agp_key == -1) {
+ ErrorF("Failed to allocate %dKB GART memory\n", size/1024);
+ KdReleaseGART(screennum);
+ return FALSE;
+ }
+
+ if (!KdBindGARTMemory(screennum, atis->agp_key, 0)) {
+ ErrorF("Failed to bind GART memory\n");
+ KdReleaseGART(screennum);
+ return FALSE;
+ }
+
+ agp_info = KdGetAGPInfo(screennum);
+ if (agp_info == NULL) {
+ KdUnbindGARTMemory(screennum, atis->agp_key);
+ KdReleaseGART(screennum);
+ return FALSE;
+ }
+
+ atis->agp_addr = KdMapDevice(agp_info->base, agp_info->size);
+ if (atis->agp_addr == NULL) {
+ ErrorF("Failed to map GART memory\n");
+ KdUnbindGARTMemory(screennum, atis->agp_key);
+ KdReleaseGART(screennum);
+ free(agp_info);
+ return FALSE;
+ }
+ KdSetMappedMode(agp_info->base, agp_info->size,
+ KD_MAPPED_MODE_FRAMEBUFFER);
+
+ atis->agp_size = size;
+ free(agp_info);
+
+ return TRUE;
+}
+
+static void
+ATIFiniAGP(ScreenPtr pScreen)
+{
+ KdScreenPriv(pScreen);
+ ATIScreenInfo(pScreenPriv);
+ int screennum = atis->screen->mynum;
+
+ KdUnbindGARTMemory(screennum, atis->agp_key);
+ KdReleaseGART(screennum);
+ atis->agp_addr = NULL;
+ atis->agp_size = 0;
+}
+
+static Bool
+ATIPseudoDMAInit(ScreenPtr pScreen)
+{
+ KdScreenPriv(pScreen);
+ ATIScreenInfo(pScreenPriv);
+ ATICardInfo(pScreenPriv);
+ char *mmio = atic->reg_base;
+
+ if (atic->is_r300)
+ return FALSE;
+
+ ATIUploadMicrocode(atis);
+ ATIEngineReset(atis);
+
+ if (atic->is_r200) {
+ MMIO_OUT32(mmio, RADEON_REG_CP_CSQ_CNTL,
+ RADEON_CSQ_PRIPIO_INDDIS);
+ atis->cce_pri_size = MMIO_IN32(mmio, RADEON_REG_CP_CSQ_CNTL) &
+ R200_CSQ_CNT_PRIMARY_MASK;
+ MMIO_OUT32(mmio, RADEON_REG_ME_CNTL, RADEON_ME_MODE_FREE_RUN);
+ } else if (atic->is_radeon) {
+ MMIO_OUT32(mmio, RADEON_REG_CP_CSQ_CNTL,
+ RADEON_CSQ_PRIPIO_INDDIS);
+ atis->cce_pri_size = MMIO_IN32(mmio, RADEON_REG_CP_CSQ_CNTL) &
+ RADEON_CSQ_CNT_PRIMARY_MASK;
+ MMIO_OUT32(mmio, RADEON_REG_ME_CNTL, RADEON_ME_MODE_FREE_RUN);
+ } else {
+ MMIO_OUT32(mmio, R128_REG_PM4_BUFFER_CNTL, R128_PM4_192PIO |
+ R128_PM4_BUFFER_CNTL_NOUPDATE);
+ atis->cce_pri_size = 192;
+ MMIO_OUT32(mmio, R128_REG_PM4_MICRO_CNTL,
+ R128_PM4_MICRO_FREERUN);
+ }
+
+ return TRUE;
+}
+
+static Bool
+ATIPseudoDMAFini(ScreenPtr pScreen)
+{ KdScreenPriv(pScreen);
+ ATIScreenInfo(pScreenPriv);
+ ATICardInfo(pScreenPriv);
+ char *mmio = atic->reg_base;
+
+ if (atic->is_radeon) {
+ MMIO_OUT32(mmio, RADEON_REG_ME_CNTL, 0);
+ MMIO_OUT32(mmio, RADEON_REG_CP_CSQ_CNTL,
+ RADEON_CSQ_PRIDIS_INDDIS);
+ } else {
+ MMIO_OUT32(mmio, R128_REG_PM4_MICRO_CNTL, 0);
+ MMIO_OUT32(mmio, R128_REG_PM4_BUFFER_CNTL,
+ R128_PM4_NONPM4 | R128_PM4_BUFFER_CNTL_NOUPDATE);
+ }
+ atis->cce_pri_size = 0;
+
+ ATIEngineReset(atis);
+
+ return TRUE;
+}
+
+static Bool
+ATIDMAInit(ScreenPtr pScreen, Bool use_agp)
+{
+ KdScreenPriv(pScreen);
+ ATIScreenInfo(pScreenPriv);
+ ATICardInfo(pScreenPriv);
+ char *mmio = atic->reg_base;
+ int dma_offset;
+ CARD32 tmp;
+
+ /* XXX: Not for radeons. Yet? */
+ if (atic->is_radeon)
+ return FALSE;
+
+ if (use_agp) {
+ if (1)
+ return FALSE; /* XXX */
+ /* Allocate a 1MB AGP space, but only use 128k + 128 for DMA.
+ * XXX: Should use the rest for things like scratch space.
+ */
+ if (!ATIInitAGP(pScreen, 1024 * 1024))
+ return FALSE;
+ atis->ring_addr = atis->agp_addr;
+ atis->ring_len = 128 * 1024;
+ dma_offset = R128_AGP_OFFSET;
+ } else {
+ if (1)
+ return FALSE; /* XXX */
+ /* Allocate a 128K buffer, plus 32 DWORDS to give space for the
+ * R128 ASIC bug workaround.
+ */
+ atis->dma_space = KdOffscreenAlloc(pScreen, 128 * 1024 + 128,
+ 128, TRUE, NULL, NULL);
+ if (atis->dma_space == NULL)
+ return FALSE;
+ atis->ring_addr = (CARD32 *)(atis->dma_space->offset +
+ pScreenPriv->screen->memory_base);
+ atis->ring_len = 128 * 1024;
+ dma_offset = atis->dma_space->offset;
+ }
+
+ ATIUploadMicrocode(atis);
+ ATIEngineReset(atis);
+
+ atis->ring_read = 0;
+ atis->ring_write = 0;
+
+ tmp = MMIO_IN32(mmio, ATI_REG_BUS_CNTL);
+ MMIO_OUT32(mmio, ATI_REG_BUS_CNTL, tmp & ~ATI_BUS_MASTER_DIS);
+
+ MMIO_OUT32(mmio, ATI_REG_CCE_RB_BASE, dma_offset);
+ MMIO_OUT32(mmio, ATI_REG_CCE_WPTR, atis->ring_write);
+ MMIO_OUT32(mmio, ATI_REG_CCE_RPTR, atis->ring_read);
+ MMIO_OUT32(mmio, ATI_REG_CCE_RPTR_ADDR, 0 /* XXX? */);
+
+ if (atic->is_r200) {
+ MMIO_OUT32(mmio, RADEON_REG_CP_CSQ_CNTL,
+ RADEON_CSQ_PRIBM_INDBM);
+ atis->cce_pri_size = MMIO_IN32(mmio, RADEON_REG_CP_CSQ_CNTL) &
+ R200_CSQ_CNT_PRIMARY_MASK;
+ MMIO_OUT32(mmio, RADEON_REG_ME_CNTL, RADEON_ME_MODE_FREE_RUN);
+ } else if (atic->is_radeon) {
+ MMIO_OUT32(mmio, RADEON_REG_CP_CSQ_CNTL,
+ RADEON_CSQ_PRIBM_INDBM);
+ atis->cce_pri_size = MMIO_IN32(mmio, RADEON_REG_CP_CSQ_CNTL) &
+ RADEON_CSQ_CNT_PRIMARY_MASK;
+ MMIO_OUT32(mmio, RADEON_REG_ME_CNTL, RADEON_ME_MODE_FREE_RUN);
+ } else {
+ MMIO_OUT32(mmio, R128_REG_PM4_BUFFER_WM_CNTL,
+ ((R128_WATERMARK_L/4) << R128_WMA_SHIFT) |
+ ((R128_WATERMARK_M/4) << R128_WMB_SHIFT) |
+ ((R128_WATERMARK_N/4) << R128_WMC_SHIFT) |
+ ((R128_WATERMARK_K/64) << R128_WB_WM_SHIFT));
+ /* The sample code reads from an undocumneted register
+ * (PM4_BUFFER_ADDR). Perhaps it's a write posting thing? Do
+ * a read in case that's it.
+ */
+ MMIO_IN32(mmio, R128_REG_PM4_BUFFER_CNTL);
+ if (use_agp) {
+ /* XXX Magic num */
+ MMIO_OUT32(mmio, R128_REG_PCI_GART_PAGE, 1);
+ MMIO_OUT32(mmio, R128_REG_PM4_BUFFER_CNTL,
+ ATILog2(atis->ring_len) |
+ R128_PM4_192BM |
+ R128_PM4_BUFFER_CNTL_NOUPDATE);
+ } else {
+ MMIO_OUT32(mmio, R128_REG_PM4_BUFFER_CNTL,
+ ATILog2(atis->ring_len) |
+ R128_PM4_192BM |
+ R128_PM4_BUFFER_CNTL_NOUPDATE |
+ R128_PM4_IN_FRAME_BUFFER);
+ }
+ atis->cce_pri_size = 192;
+ MMIO_IN32(mmio, R128_REG_PM4_BUFFER_CNTL);
+ MMIO_OUT32(mmio, R128_REG_PM4_MICRO_CNTL,
+ R128_PM4_MICRO_FREERUN);
+ }
+
+ return TRUE;
+}
+
+static Bool
+ATIDMAFini(ScreenPtr pScreen)
+{
+ KdScreenPriv(pScreen);
+ ATIScreenInfo(pScreenPriv);
+ ATICardInfo(pScreenPriv);
+ char *mmio = atic->reg_base;
+
+ if (atic->is_radeon) {
+ MMIO_OUT32(mmio, RADEON_REG_ME_CNTL, 0);
+ MMIO_OUT32(mmio, RADEON_REG_CP_CSQ_CNTL,
+ RADEON_CSQ_PRIDIS_INDDIS);
+ } else {
+ MMIO_OUT32(mmio, ATI_REG_CCE_WPTR,
+ atis->ring_write | R128_PM4_BUFFER_DL_DONE);
+ MMIO_OUT32(mmio, R128_REG_PM4_MICRO_CNTL, 0);
+ MMIO_OUT32(mmio, R128_REG_PM4_BUFFER_CNTL,
+ R128_PM4_NONPM4 | R128_PM4_BUFFER_CNTL_NOUPDATE);
+ }
+ atis->cce_pri_size = 0;
+
+ ATIEngineReset(atis);
+
+ if (atis->using_agp)
+ ATIFiniAGP(pScreen);
+ else
+ KdOffscreenFree(pScreen, atis->dma_space);
+
+ return TRUE;
+}
+
+void
+ATIDMASetup(ScreenPtr pScreen)
+{
+ KdScreenPriv(pScreen);
+ ATICardInfo(pScreenPriv);
+ ATIScreenInfo(pScreenPriv);
+
+#ifdef USE_DRI
+ if (atis->using_dri)
+ ATIDRIDMAStart(atis);
+#endif /* USE_DRI */
+
+ if (!atis->using_dri) {
+ atis->using_agp = FALSE;
+ if (atic->is_agp && ATIDMAInit(pScreen, TRUE)) {
+ atis->using_agp = TRUE;
+ atis->using_dma = TRUE;
+ } else if (ATIDMAInit(pScreen, FALSE)) {
+ atis->using_agp = FALSE;
+ atis->using_dma = TRUE;
+ } else if (ATIPseudoDMAInit(pScreen))
+ atis->using_pseudo = TRUE;
+ else
+ atis->using_pio = TRUE;
+ }
+
+ atis->indirectBuffer = ATIGetDMABuffer(atis);
+ if (atis->indirectBuffer == FALSE)
+ FatalError("Failed to allocate DMA buffer.\n");
+
+ if (atis->using_dri)
+ ErrorF("Initialized %s DRI DMA\n",
+ atis->using_agp ? "AGP" : "PCI");
+ else if (atis->using_dma && atis->using_agp)
+ ErrorF("Initialized AGP DMA\n");
+ else if (atis->using_dma)
+ ErrorF("Initialized framebuffer pseudo-DMA\n");
+ else if (atis->using_pseudo)
+ ErrorF("Initialized pseudo-DMA\n");
+ else if (atis->using_pio)
+ ErrorF("Initialized PIO\n");
+}
+
+void
+ATIDMATeardown(ScreenPtr pScreen)
+{
+ KdScreenPriv(pScreen);
+ ATIScreenInfo(pScreenPriv);
+
+ ATIWaitIdle(atis);
+
+#ifdef USE_DRI
+ if (atis->using_dri)
+ ATIDRIDMAStop(atis);
+#endif /* USE_DRI */
+
+ if (atis->using_dma)
+ ATIDMAFini(pScreen);
+
+ if (atis->using_pseudo)
+ ATIPseudoDMAFini(pScreen);
+
+ if (atis->using_pio || atis->using_pseudo || atis->using_dma) {
+ xfree(atis->indirectBuffer->address);
+ xfree(atis->indirectBuffer);
+ }
+ atis->indirectBuffer = NULL;
+
+ atis->using_pio = FALSE;
+ atis->using_pseudo = FALSE;
+ atis->using_dma = FALSE;
+ atis->using_agp = FALSE;
+}
+
diff --git a/xorg-server/hw/kdrive/ati/ati_dma.h b/xorg-server/hw/kdrive/ati/ati_dma.h
new file mode 100644
index 000000000..4c2092b2c
--- /dev/null
+++ b/xorg-server/hw/kdrive/ati/ati_dma.h
@@ -0,0 +1,141 @@
+/*
+ * Copyright © 2004 Eric Anholt
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that
+ * copyright notice and this permission notice appear in supporting
+ * documentation, and that the name of Eric Anholt not be used in
+ * advertising or publicity pertaining to distribution of the software without
+ * specific, written prior permission. Eric Anholt makes no
+ * representations about the suitability of this software for any purpose. It
+ * is provided "as is" without express or implied warranty.
+ *
+ * ERIC ANHOLT DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL ERIC ANHOLT BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef _ATI_DMA_H_
+#define _ATI_DMA_H_
+
+#define CCE_DEBUG 1
+
+#if !CCE_DEBUG
+#define DMA_PACKET0(reg, count) \
+ (ATI_CCE_PACKET0 | (((count) - 1) << 16) | ((reg) >> 2))
+#else
+#define DMA_PACKET0(reg, count) \
+ (__packet0count = (count), __reg = (reg), \
+ ATI_CCE_PACKET0 | (((count) - 1) << 16) | ((reg) >> 2))
+#endif
+#define DMA_PACKET1(reg1, reg2) \
+ (ATI_CCE_PACKET1 | \
+ (((reg2) >> 2) << ATI_CCE_PACKET1_REG_2_SHIFT) | ((reg1) >> 2))
+#define DMA_PACKET3(type, count) \
+ ((type) | (((count) - 1) << 16))
+
+#if !CCE_DEBUG
+
+#define RING_LOCALS CARD32 *__head; int __count
+#define BEGIN_DMA(n) \
+do { \
+ if ((atis->indirectBuffer->used + 4*(n)) > \
+ atis->indirectBuffer->size) { \
+ ATIFlushIndirect(atis, 1); \
+ } \
+ __head = (CARD32 *)((char *)atis->indirectBuffer->address + \
+ atis->indirectBuffer->used); \
+ __count = 0; \
+} while (0)
+#define END_DMA() do { \
+ atis->indirectBuffer->used += __count * 4; \
+} while (0)
+
+#else
+
+#define RING_LOCALS \
+ CARD32 *__head; int __count, __total, __reg, __packet0count
+#define BEGIN_DMA(n) \
+do { \
+ if ((atis->indirectBuffer->used + 4*(n)) > \
+ atis->indirectBuffer->size) { \
+ ATIFlushIndirect(atis, 1); \
+ } \
+ __head = (CARD32 *)((char *)atis->indirectBuffer->address + \
+ atis->indirectBuffer->used); \
+ __count = 0; \
+ __total = n; \
+ __reg = 0; \
+ __packet0count = 0; \
+} while (0)
+#define END_DMA() do { \
+ if (__count != __total) \
+ FatalError("count != total (%d vs %d) at %s:%d\n", \
+ __count, __total, __FILE__, __LINE__); \
+ atis->indirectBuffer->used += __count * 4; \
+} while (0)
+
+#endif
+
+#define OUT_RING(val) do { \
+ __head[__count++] = (val); \
+} while (0)
+
+#define OUT_RING_REG(reg, val) do { \
+ if (__reg != reg) \
+ FatalError("unexpected reg (0x%x vs 0x%x) at %s:%d\n", \
+ reg, __reg, __FILE__, __LINE__); \
+ if (__packet0count-- <= 0) \
+ FatalError("overrun of packet0 at %s:%d\n", \
+ __FILE__, __LINE__); \
+ __head[__count++] = (val); \
+ __reg += 4; \
+} while (0)
+
+#define OUT_RING_F(x) OUT_RING(GET_FLOAT_BITS(x))
+
+#define OUT_REG(reg, val) \
+do { \
+ OUT_RING(DMA_PACKET0(reg, 1)); \
+ OUT_RING(val); \
+} while (0)
+
+#define TIMEOUT_LOCALS struct timeval _target, _curtime
+
+static inline Bool
+tv_le(struct timeval *tv1, struct timeval *tv2)
+{
+ if (tv1->tv_sec < tv2->tv_sec ||
+ (tv1->tv_sec == tv2->tv_sec && tv1->tv_usec < tv2->tv_usec))
+ return TRUE;
+ else
+ return FALSE;
+}
+
+#define WHILE_NOT_TIMEOUT(_timeout) \
+ gettimeofday(&_target, NULL); \
+ _target.tv_usec += ((_timeout) * 1000000); \
+ _target.tv_sec += _target.tv_usec / 1000000; \
+ _target.tv_usec = _target.tv_usec % 1000000; \
+ while (gettimeofday(&_curtime, NULL), tv_le(&_curtime, &_target))
+
+#define TIMEDOUT() (!tv_le(&_curtime, &_target))
+
+dmaBuf *
+ATIGetDMABuffer(ATIScreenInfo *atis);
+
+void
+ATIFlushIndirect(ATIScreenInfo *atis, Bool discard);
+
+void
+ATIDMASetup(ScreenPtr pScreen);
+
+void
+ATIDMATeardown(ScreenPtr pScreen);
+
+#endif /* _ATI_DMA_H_ */
diff --git a/xorg-server/hw/kdrive/ati/ati_draw.c b/xorg-server/hw/kdrive/ati/ati_draw.c
new file mode 100644
index 000000000..c10fea471
--- /dev/null
+++ b/xorg-server/hw/kdrive/ati/ati_draw.c
@@ -0,0 +1,918 @@
+/*
+ * Copyright © 2003 Eric Anholt
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that
+ * copyright notice and this permission notice appear in supporting
+ * documentation, and that the name of Eric Anholt not be used in
+ * advertising or publicity pertaining to distribution of the software without
+ * specific, written prior permission. Eric Anholt makes no
+ * representations about the suitability of this software for any purpose. It
+ * is provided "as is" without express or implied warranty.
+ *
+ * ERIC ANHOLT DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL ERIC ANHOLT BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include <kdrive-config.h>
+#endif
+#include "ati.h"
+#include "ati_reg.h"
+#include "ati_dma.h"
+#include "ati_draw.h"
+#include "kaa.h"
+
+CARD8 ATISolidRop[16] = {
+ /* GXclear */ 0x00, /* 0 */
+ /* GXand */ 0xa0, /* src AND dst */
+ /* GXandReverse */ 0x50, /* src AND NOT dst */
+ /* GXcopy */ 0xf0, /* src */
+ /* GXandInverted*/ 0x0a, /* NOT src AND dst */
+ /* GXnoop */ 0xaa, /* dst */
+ /* GXxor */ 0x5a, /* src XOR dst */
+ /* GXor */ 0xfa, /* src OR dst */
+ /* GXnor */ 0x05, /* NOT src AND NOT dst */
+ /* GXequiv */ 0xa5, /* NOT src XOR dst */
+ /* GXinvert */ 0x55, /* NOT dst */
+ /* GXorReverse */ 0xf5, /* src OR NOT dst */
+ /* GXcopyInverted*/ 0x0f, /* NOT src */
+ /* GXorInverted */ 0xaf, /* NOT src OR dst */
+ /* GXnand */ 0x5f, /* NOT src OR NOT dst */
+ /* GXset */ 0xff, /* 1 */
+};
+
+CARD8 ATIBltRop[16] = {
+ /* GXclear */ 0x00, /* 0 */
+ /* GXand */ 0x88, /* src AND dst */
+ /* GXandReverse */ 0x44, /* src AND NOT dst */
+ /* GXcopy */ 0xcc, /* src */
+ /* GXandInverted*/ 0x22, /* NOT src AND dst */
+ /* GXnoop */ 0xaa, /* dst */
+ /* GXxor */ 0x66, /* src XOR dst */
+ /* GXor */ 0xee, /* src OR dst */
+ /* GXnor */ 0x11, /* NOT src AND NOT dst */
+ /* GXequiv */ 0x99, /* NOT src XOR dst */
+ /* GXinvert */ 0x55, /* NOT dst */
+ /* GXorReverse */ 0xdd, /* src OR NOT dst */
+ /* GXcopyInverted*/ 0x33, /* NOT src */
+ /* GXorInverted */ 0xbb, /* NOT src OR dst */
+ /* GXnand */ 0x77, /* NOT src OR NOT dst */
+ /* GXset */ 0xff, /* 1 */
+};
+
+int copydx, copydy;
+ATIScreenInfo *accel_atis;
+/* If is_24bpp is set, then we are using the accelerator in 8-bit mode due
+ * to it being broken for 24bpp, so coordinates have to be multiplied by 3.
+ */
+Bool is_24bpp;
+CARD32 settings, color, src_pitch_offset, dst_pitch_offset;
+
+int sample_count;
+float sample_offsets_x[255];
+float sample_offsets_y[255];
+
+#define DRAW_USING_PACKET3 0
+
+void
+ATIDrawSetup(ScreenPtr pScreen)
+{
+ KdScreenPriv(pScreen);
+ ATIScreenInfo(pScreenPriv);
+ ATICardInfo(pScreenPriv);
+ RING_LOCALS;
+
+ /* XXX: this shouldn't be necessary, but fixes some R128 composite
+ * issues.
+ */
+ /*if (!atic->is_radeon) {
+ char *mmio = atic->reg_base;
+ ATIWaitIdle(atis);
+ MMIO_OUT32(mmio, R128_REG_PC_GUI_MODE,
+ R128_PC_BYPASS_EN);
+ }*/
+
+ BEGIN_DMA(2);
+ OUT_REG(ATI_REG_DEFAULT_SC_BOTTOM_RIGHT,
+ ATI_DEFAULT_SC_RIGHT_MAX | ATI_DEFAULT_SC_BOTTOM_MAX);
+ END_DMA();
+
+ if (!atic->is_radeon) {
+ /* Setup for R128 Composite */
+ BEGIN_DMA(12);
+ OUT_REG(R128_REG_SCALE_3D_CNTL,
+ R128_SCALE_3D_TEXMAP_SHADE |
+ R128_SCALE_PIX_REPLICATE |
+ R128_TEX_CACHE_SPLIT |
+ R128_TEX_MAP_ALPHA_IN_TEXTURE |
+ R128_TEX_CACHE_LINE_SIZE_4QW);
+ OUT_REG(R128_REG_SETUP_CNTL,
+ R128_COLOR_SOLID_COLOR |
+ R128_PRIM_TYPE_TRI |
+ R128_TEXTURE_ST_MULT_W |
+ R128_STARTING_VERTEX_1 |
+ R128_ENDING_VERTEX_3 |
+ R128_SUB_PIX_4BITS);
+ OUT_REG(R128_REG_PM4_VC_FPU_SETUP,
+ R128_FRONT_DIR_CCW |
+ R128_BACKFACE_CULL |
+ R128_FRONTFACE_SOLID |
+ R128_FPU_COLOR_SOLID |
+ R128_FPU_SUB_PIX_4BITS |
+ R128_FPU_MODE_3D |
+ R128_TRAP_BITS_DISABLE |
+ R128_XFACTOR_2 |
+ R128_YFACTOR_2 |
+ R128_FLAT_SHADE_VERTEX_OGL |
+ R128_FPU_ROUND_TRUNCATE |
+ R128_WM_SEL_8DW);
+ OUT_REG(R128_REG_PLANE_3D_MASK_C, 0xffffffff);
+ OUT_REG(R128_REG_CONSTANT_COLOR_C, 0xff000000);
+ OUT_REG(R128_REG_WINDOW_XY_OFFSET, 0x00000000);
+ END_DMA();
+ } else if (!atic->is_r300) {
+ /* Setup for R100/R200 Composite */
+ BEGIN_DMA(8);
+ OUT_REG(RADEON_REG_RE_TOP_LEFT, 0);
+ OUT_REG(RADEON_REG_RE_WIDTH_HEIGHT, 0xffffffff);
+ OUT_REG(RADEON_REG_RB3D_PLANEMASK, 0xffffffff);
+ OUT_REG(RADEON_REG_SE_CNTL,
+ RADEON_FFACE_CULL_CCW |
+ RADEON_FFACE_SOLID |
+ RADEON_VTX_PIX_CENTER_OGL);
+ END_DMA();
+
+ if (atic->is_r100) {
+ BEGIN_DMA(6);
+ OUT_REG(RADEON_REG_SE_CNTL_STATUS, RADEON_TCL_BYPASS);
+ OUT_REG(RADEON_REG_SE_COORD_FMT,
+ RADEON_VTX_XY_PRE_MULT_1_OVER_W0 |
+ RADEON_VTX_ST0_NONPARAMETRIC |
+ RADEON_VTX_ST1_NONPARAMETRIC |
+ RADEON_TEX1_W_ROUTING_USE_W0);
+ OUT_REG(RADEON_REG_RB3D_DSTCACHE_MODE,
+ RADEON_RB3D_DC_2D_CACHE_AUTOFLUSH |
+ RADEON_RB3D_DC_3D_CACHE_AUTOFLUSH);
+ END_DMA();
+ } else {
+ BEGIN_DMA(18);
+ /* XXX: The 0 below should be RADEON_TCL_BYPASS on
+ * RS300s.
+ */
+ OUT_REG(R200_REG_SE_VAP_CNTL_STATUS, 0);
+ OUT_REG(R200_REG_PP_CNTL_X, 0);
+ OUT_REG(R200_REG_PP_TXMULTI_CTL_0, 0);
+ OUT_REG(R200_REG_SE_VTX_STATE_CNTL, 0);
+ OUT_REG(R200_REG_RE_CNTL, 0);
+ /* XXX: VTX_ST_DENORMALIZED is illegal for the case of
+ * repeating textures.
+ */
+ OUT_REG(R200_REG_SE_VTE_CNTL, R200_VTX_ST_DENORMALIZED);
+ OUT_REG(R200_REG_SE_VAP_CNTL,
+ R200_VAP_FORCE_W_TO_ONE |
+ R200_VAP_VF_MAX_VTX_NUM);
+ OUT_REG(R200_REG_RE_AUX_SCISSOR_CNTL, 0);
+ OUT_REG(RADEON_REG_RB3D_DSTCACHE_MODE,
+ RADEON_RB3D_DC_2D_CACHE_AUTOFLUSH |
+ RADEON_RB3D_DC_3D_CACHE_AUTOFLUSH |
+ R200_RB3D_DC_2D_CACHE_AUTOFREE |
+ R200_RB3D_DC_3D_CACHE_AUTOFREE);
+ END_DMA();
+ }
+ }
+}
+
+static void
+ATIWaitMarker(ScreenPtr pScreen, int marker)
+{
+ KdScreenPriv(pScreen);
+ ATIScreenInfo(pScreenPriv);
+
+ ENTER_DRAW(0);
+ ATIWaitIdle(atis);
+ LEAVE_DRAW(0);
+}
+
+void
+RadeonSwitchTo2D(ATIScreenInfo *atis)
+{
+ RING_LOCALS;
+
+ ENTER_DRAW(0);
+ BEGIN_DMA(4);
+ OUT_REG(RADEON_REG_RB3D_DSTCACHE_CTLSTAT, RADEON_RB3D_DC_FLUSH);
+ OUT_REG(ATI_REG_WAIT_UNTIL,
+ RADEON_WAIT_HOST_IDLECLEAN | RADEON_WAIT_3D_IDLECLEAN);
+ END_DMA();
+ LEAVE_DRAW(0);
+}
+
+void
+RadeonSwitchTo3D(ATIScreenInfo *atis)
+{
+ RING_LOCALS;
+
+ ENTER_DRAW(0);
+ BEGIN_DMA(4);
+ OUT_REG(RADEON_REG_RB3D_DSTCACHE_CTLSTAT, RADEON_RB3D_DC_FLUSH);
+ /* We must wait for 3d to idle, in case source was just written as a dest. */
+ OUT_REG(ATI_REG_WAIT_UNTIL,
+ RADEON_WAIT_HOST_IDLECLEAN | RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_3D_IDLECLEAN);
+ END_DMA();
+ LEAVE_DRAW(0);
+}
+
+#if ATI_TRACE_DRAW
+void
+ATIEnterDraw (PixmapPtr pPix, char *function)
+{
+ if (pPix != NULL) {
+ KdScreenPriv(pPix->drawable.pScreen);
+ CARD32 offset;
+
+ offset = ((CARD8 *)pPix->devPrivate.ptr -
+ pScreenPriv->screen->memory_base);
+
+ ErrorF ("Enter %s 0x%x (%dx%dx%d/%d)\n", function, offset,
+ pPix->drawable.width, pPix->drawable.height, pPix->drawable.depth,
+ pPix->drawable.bitsPerPixel);
+ } else
+ ErrorF ("Enter %s\n", function);
+}
+
+void
+ATILeaveDraw (PixmapPtr pPix, char *function)
+{
+ if (pPix != NULL) {
+ KdScreenPriv(pPix->drawable.pScreen);
+ CARD32 offset;
+
+ offset = ((CARD8 *)pPix->devPrivate.ptr -
+ pScreenPriv->screen->memory_base);
+
+ ErrorF ("Leave %s 0x%x\n", function, offset);
+ } else
+ ErrorF ("Leave %s\n", function);
+}
+#endif
+
+/* Assumes that depth 15 and 16 can be used as depth 16, which is okay since we
+ * require src and dest datatypes to be equal.
+ */
+static Bool
+ATIGetDatatypeBpp(int bpp, CARD32 *type)
+{
+ switch (bpp) {
+ case 8:
+ *type = R128_DATATYPE_CI8;
+ return TRUE;
+ case 16:
+ *type = R128_DATATYPE_RGB565;
+ return TRUE;
+ case 24:
+ *type = R128_DATATYPE_CI8;
+ return TRUE;
+ case 32:
+ *type = R128_DATATYPE_ARGB8888;
+ return TRUE;
+ default:
+ ATI_FALLBACK(("Unsupported bpp: %d\n", bpp));
+ return FALSE;
+ }
+}
+
+Bool
+ATIGetOffsetPitch(ATIScreenInfo *atis, int bpp, CARD32 *pitch_offset,
+ int offset, int pitch)
+{
+ ATICardInfo *atic = atis->atic;
+
+ /* On the R128, depending on the bpp the screen can be set up so that it
+ * doesn't meet the pitchAlign requirement but can still be
+ * accelerated, so we check the specific pitch requirement of alignment
+ * to 8 pixels.
+ */
+ if (atic->is_radeon) {
+ if (pitch % atis->kaa.pitchAlign != 0)
+ ATI_FALLBACK(("Bad pitch 0x%08x\n", pitch));
+ *pitch_offset = ((pitch >> 6) << 22) | (offset >> 10);
+
+ } else {
+ if (pitch % bpp != 0)
+ ATI_FALLBACK(("Bad pitch 0x%08x\n", pitch));
+ *pitch_offset = ((pitch / bpp) << 21) | (offset >> 5);
+ }
+
+ if (offset % atis->kaa.offsetAlign != 0)
+ ATI_FALLBACK(("Bad offset 0x%08x\n", offset));
+
+ return TRUE;
+}
+
+Bool
+ATIGetPixmapOffsetPitch(PixmapPtr pPix, CARD32 *pitch_offset)
+{
+ KdScreenPriv(pPix->drawable.pScreen);
+ ATIScreenInfo(pScreenPriv);
+ CARD32 pitch, offset;
+ int bpp;
+
+ bpp = pPix->drawable.bitsPerPixel;
+ if (bpp == 24)
+ bpp = 8;
+
+ offset = ((CARD8 *)pPix->devPrivate.ptr -
+ pScreenPriv->screen->memory_base);
+ pitch = pPix->devKind;
+
+ return ATIGetOffsetPitch(atis, bpp, pitch_offset, offset, pitch);
+}
+
+static Bool
+ATIPrepareSolid(PixmapPtr pPix, int alu, Pixel pm, Pixel fg)
+{
+ KdScreenPriv(pPix->drawable.pScreen);
+ ATIScreenInfo(pScreenPriv);
+ ATICardInfo(pScreenPriv);
+ CARD32 datatype;
+ RING_LOCALS;
+
+ is_24bpp = (pPix->drawable.bitsPerPixel == 24);
+ accel_atis = atis;
+
+ if (is_24bpp) {
+ /* Solid fills in fake-24bpp mode only work if the pixel color
+ * and planemask are all the same byte.
+ */
+ if ((fg & 0xffffff) != (((fg & 0xff) << 16) | ((fg >> 8) &
+ 0xffff)))
+ ATI_FALLBACK(("Can't do solid color 0x%08x in 24bpp\n",
+ fg));
+ if ((pm & 0xffffff) != (((pm & 0xff) << 16) | ((pm >> 8) &
+ 0xffff)))
+ ATI_FALLBACK(("Can't do planemask 0x%08x in 24bpp\n",
+ pm));
+ }
+
+ if (!ATIGetDatatypeBpp(pPix->drawable.bitsPerPixel, &datatype))
+ return FALSE;
+ if (!ATIGetPixmapOffsetPitch(pPix, &dst_pitch_offset))
+ return FALSE;
+
+ ENTER_DRAW(pPix);
+
+ if (atic->is_radeon)
+ RadeonSwitchTo2D(atis);
+
+ settings =
+ ATI_GMC_DST_PITCH_OFFSET_CNTL |
+ ATI_GMC_BRUSH_SOLID_COLOR |
+ (datatype << 8) |
+ ATI_GMC_SRC_DATATYPE_COLOR |
+ (ATISolidRop[alu] << 16) |
+ ATI_GMC_CLR_CMP_CNTL_DIS |
+ R128_GMC_AUX_CLIP_DIS;
+ color = fg;
+
+#if DRAW_USING_PACKET3
+ BEGIN_DMA(6);
+ OUT_REG(ATI_REG_DEFAULT_SC_BOTTOM_RIGHT,
+ ATI_DEFAULT_SC_RIGHT_MAX | ATI_DEFAULT_SC_BOTTOM_MAX);
+ OUT_REG(ATI_REG_DP_WRITE_MASK, pm);
+ OUT_REG(ATI_REG_DP_CNTL, ATI_DST_X_LEFT_TO_RIGHT |
+ ATI_DST_Y_TOP_TO_BOTTOM);
+ END_DMA();
+#else
+ BEGIN_DMA(12);
+ OUT_REG(ATI_REG_DEFAULT_SC_BOTTOM_RIGHT,
+ ATI_DEFAULT_SC_RIGHT_MAX | ATI_DEFAULT_SC_BOTTOM_MAX);
+ OUT_REG(ATI_REG_DST_PITCH_OFFSET, dst_pitch_offset);
+ OUT_REG(ATI_REG_DP_GUI_MASTER_CNTL, settings);
+ OUT_REG(ATI_REG_DP_BRUSH_FRGD_CLR, fg);
+ OUT_REG(ATI_REG_DP_WRITE_MASK, pm);
+ OUT_REG(ATI_REG_DP_CNTL, ATI_DST_X_LEFT_TO_RIGHT |
+ ATI_DST_Y_TOP_TO_BOTTOM);
+ END_DMA();
+#endif
+
+ LEAVE_DRAW(pPix);
+ return TRUE;
+}
+
+static void
+ATISolid(int x1, int y1, int x2, int y2)
+{
+ ENTER_DRAW(0);
+ ATIScreenInfo *atis = accel_atis;
+ RING_LOCALS;
+
+ if (is_24bpp) {
+ x1 *= 3;
+ x2 *= 3;
+ }
+#if DRAW_USING_PACKET3
+ BEGIN_DMA(6);
+ OUT_RING(DMA_PACKET3(ATI_CCE_PACKET3_PAINT_MULTI, 5));
+ OUT_RING(settings);
+ OUT_RING(dst_pitch_offset);
+ OUT_RING(color);
+ OUT_RING((x1 << 16) | y1);
+ OUT_RING(((x2 - x1) << 16) | (y2 - y1));
+ END_DMA();
+#else
+ BEGIN_DMA(3);
+ OUT_RING(DMA_PACKET0(ATI_REG_DST_Y_X, 2));
+ OUT_RING_REG(ATI_REG_DST_Y_X, (y1 << 16) | x1);
+ OUT_RING_REG(ATI_REG_DST_HEIGHT_WIDTH, ((y2 - y1) << 16) | (x2 - x1));
+ END_DMA();
+#endif
+ LEAVE_DRAW(0);
+}
+
+static void
+ATIDoneSolid(void)
+{
+ ENTER_DRAW(0);
+ LEAVE_DRAW(0);
+}
+
+static Bool
+ATIPrepareCopy(PixmapPtr pSrc, PixmapPtr pDst, int dx, int dy, int alu, Pixel pm)
+{
+ KdScreenPriv(pDst->drawable.pScreen);
+ ATIScreenInfo(pScreenPriv);
+ ATICardInfo(pScreenPriv);
+ CARD32 datatype;
+ RING_LOCALS;
+
+ copydx = dx;
+ copydy = dy;
+ is_24bpp = pDst->drawable.bitsPerPixel == 24;
+ accel_atis = atis;
+
+ if (is_24bpp && ((pm & 0xffffff) != (((pm & 0xff) << 16) | ((pm >> 8) &
+ 0xffff))))
+ ATI_FALLBACK(("Can't do planemask 0x%08x in 24bpp\n", pm));
+
+ if (!ATIGetDatatypeBpp(pDst->drawable.bitsPerPixel, &datatype))
+ return FALSE;
+ if (!ATIGetPixmapOffsetPitch(pSrc, &src_pitch_offset))
+ return FALSE;
+ if (!ATIGetPixmapOffsetPitch(pDst, &dst_pitch_offset))
+ return FALSE;
+
+ ENTER_DRAW (pDst);
+ if (atic->is_radeon)
+ RadeonSwitchTo2D(atis);
+
+ settings =
+ ATI_GMC_SRC_PITCH_OFFSET_CNTL |
+ ATI_GMC_DST_PITCH_OFFSET_CNTL |
+ ATI_GMC_BRUSH_NONE |
+ (datatype << 8) |
+ ATI_GMC_SRC_DATATYPE_COLOR |
+ (ATIBltRop[alu] << 16) |
+ ATI_DP_SRC_SOURCE_MEMORY |
+ ATI_GMC_CLR_CMP_CNTL_DIS |
+ R128_GMC_AUX_CLIP_DIS;
+
+#if DRAW_USING_PACKET3
+ BEGIN_DMA(6);
+ OUT_REG(ATI_REG_DEFAULT_SC_BOTTOM_RIGHT,
+ ATI_DEFAULT_SC_RIGHT_MAX | ATI_DEFAULT_SC_BOTTOM_MAX);
+ OUT_REG(ATI_REG_DP_WRITE_MASK, pm);
+ OUT_REG(ATI_REG_DP_CNTL,
+ (dx >= 0 ? ATI_DST_X_LEFT_TO_RIGHT : 0) |
+ (dy >= 0 ? ATI_DST_Y_TOP_TO_BOTTOM : 0));
+ END_DMA();
+
+#else
+ BEGIN_DMA(12);
+ OUT_REG(ATI_REG_DEFAULT_SC_BOTTOM_RIGHT,
+ ATI_DEFAULT_SC_RIGHT_MAX | ATI_DEFAULT_SC_BOTTOM_MAX);
+ OUT_REG(ATI_REG_SRC_PITCH_OFFSET, src_pitch_offset);
+ OUT_REG(ATI_REG_DST_PITCH_OFFSET, dst_pitch_offset);
+ OUT_REG(ATI_REG_DP_GUI_MASTER_CNTL, settings);
+ OUT_REG(ATI_REG_DP_WRITE_MASK, pm);
+ OUT_REG(ATI_REG_DP_CNTL,
+ (dx >= 0 ? ATI_DST_X_LEFT_TO_RIGHT : 0) |
+ (dy >= 0 ? ATI_DST_Y_TOP_TO_BOTTOM : 0));
+ END_DMA();
+#endif
+ LEAVE_DRAW(pDst);
+
+ return TRUE;
+}
+
+static void
+ATICopy(int srcX, int srcY, int dstX, int dstY, int w, int h)
+{
+ ATIScreenInfo *atis = accel_atis;
+ RING_LOCALS;
+
+ if (is_24bpp) {
+ srcX *= 3;
+ dstX *= 3;
+ w *= 3;
+ }
+
+#if !DRAW_USING_PACKET3
+ if (copydx < 0) {
+ srcX += w - 1;
+ dstX += w - 1;
+ }
+
+ if (copydy < 0) {
+ srcY += h - 1;
+ dstY += h - 1;
+ }
+#endif
+
+#if DRAW_USING_PACKET3
+ BEGIN_DMA(7);
+ OUT_RING(DMA_PACKET3(ATI_CCE_PACKET3_BITBLT_MULTI, 6));
+ OUT_RING(settings);
+ OUT_RING(src_pitch_offset);
+ OUT_RING(dst_pitch_offset);
+ OUT_RING((srcX << 16) | srcY);
+ OUT_RING((dstX << 16) | dstY);
+ OUT_RING((w << 16) | h);
+ END_DMA();
+#else
+ BEGIN_DMA(4);
+ OUT_RING(DMA_PACKET0(ATI_REG_SRC_Y_X, 3));
+ OUT_RING_REG(ATI_REG_SRC_Y_X, (srcY << 16) | srcX);
+ OUT_RING_REG(ATI_REG_DST_Y_X, (dstY << 16) | dstX);
+ OUT_RING_REG(ATI_REG_DST_HEIGHT_WIDTH, (h << 16) | w);
+ END_DMA();
+#endif
+}
+
+static void
+ATIDoneCopy(void)
+{
+}
+
+static Bool
+ATIUploadToScreen(PixmapPtr pDst, char *src, int src_pitch)
+{
+ ScreenPtr pScreen = pDst->drawable.pScreen;
+ KdScreenPriv(pScreen);
+ ATIScreenInfo(pScreenPriv);
+ ATICardInfo(pScreenPriv);
+ int width, height, bpp, i, dwords;
+ int dst_pitch, dst_offset;
+ CARD32 dst_pitch_offset, datatype;
+ Bool success;
+ RING_LOCALS;
+
+ ENTER_DRAW (pDst);
+
+ LEAVE_DRAW (pDst);
+ /* XXX: Hostdata uploads aren't working yet. */
+ return FALSE;
+
+ dst_offset = ((CARD8 *)pDst->devPrivate.ptr -
+ pScreenPriv->screen->memory_base);
+ dst_pitch = pDst->devKind;
+ width = pDst->drawable.width;
+ height = pDst->drawable.height;
+ bpp = pDst->drawable.bitsPerPixel;
+
+ success = ATIGetDatatypeBpp(bpp, &datatype);
+
+ if (bpp == 24) {
+ is_24bpp = TRUE;
+ bpp = 8;
+ } else
+ is_24bpp = FALSE;
+
+ if (!ATIGetOffsetPitch(atis, bpp, &dst_pitch_offset, dst_offset,
+ dst_pitch))
+ return FALSE;
+
+ if (src_pitch != (width * bpp / 8))
+ return FALSE;
+
+ /* No PACKET3 packets when in PIO mode. */
+ if (atis->using_pio)
+ return FALSE;
+
+ dwords = (width * height * (bpp / 8) + 3) / 4;
+
+ /* Flush pixel cache so nothing being written to the destination
+ * previously gets mixed up with the hostdata blit.
+ */
+ if (atic->is_radeon) {
+ BEGIN_DMA(4);
+ OUT_REG(RADEON_REG_RB3D_DSTCACHE_CTLSTAT, RADEON_RB3D_DC_FLUSH);
+ OUT_REG(ATI_REG_WAIT_UNTIL,
+ RADEON_WAIT_2D_IDLECLEAN |
+ RADEON_WAIT_3D_IDLECLEAN |
+ RADEON_WAIT_HOST_IDLECLEAN);
+ END_DMA();
+ } else {
+ BEGIN_DMA(2);
+ OUT_REG(R128_REG_PC_GUI_CTLSTAT,
+ R128_PC_FLUSH_GUI | R128_PC_RI_GUI);
+ END_DMA();
+ }
+
+ BEGIN_DMA(8);
+ OUT_RING(DMA_PACKET3(ATI_CCE_PACKET3_HOSTDATA_BLT, 7 + dwords));
+ OUT_RING(ATI_GMC_DST_PITCH_OFFSET_CNTL |
+ ATI_GMC_BRUSH_NONE |
+ (datatype << 8) |
+ ATI_GMC_SRC_DATATYPE_COLOR |
+ (ATISolidRop[GXcopy] << 16) |
+ ATI_DP_SRC_SOURCE_HOST_DATA |
+ ATI_GMC_CLR_CMP_CNTL_DIS |
+ R128_GMC_AUX_CLIP_DIS |
+ ATI_GMC_WR_MSK_DIS);
+ OUT_RING(dst_pitch_offset);
+ OUT_RING(0xffffffff);
+ OUT_RING(0xffffffff);
+ OUT_RING((0 << 16) | 0);
+ OUT_RING((height << 16) | width);
+ OUT_RING(dwords);
+ END_DMA();
+
+ for (i = 0; i < dwords; i++) {
+ BEGIN_DMA(1);
+ OUT_RING(((CARD32 *)src)[i]);
+ END_DMA();
+ }
+
+ if (atic->is_radeon) {
+ BEGIN_DMA(4);
+ OUT_REG(RADEON_REG_RB3D_DSTCACHE_CTLSTAT,
+ RADEON_RB3D_DC_FLUSH_ALL);
+ OUT_REG(ATI_REG_WAIT_UNTIL,
+ RADEON_WAIT_2D_IDLECLEAN |
+ RADEON_WAIT_HOST_IDLECLEAN);
+ END_DMA();
+ } else {
+ BEGIN_DMA(2);
+ OUT_REG(R128_REG_PC_GUI_CTLSTAT, R128_PC_FLUSH_GUI);
+ END_DMA();
+ }
+
+ kaaMarkSync(pScreen);
+
+ ErrorF("hostdata upload %d,%d %dbpp\n", width, height, bpp);
+
+ return TRUE;
+}
+
+
+static Bool
+ATIUploadToScratch(PixmapPtr pSrc, PixmapPtr pDst)
+{
+ KdScreenPriv(pSrc->drawable.pScreen);
+ ATICardInfo(pScreenPriv);
+ ATIScreenInfo(pScreenPriv);
+ int dst_pitch, src_pitch, w, i, size, bytes;
+ unsigned char *dst, *src;
+ RING_LOCALS;
+
+ ENTER_DRAW(pSrc);
+ /* Align width to log 2, useful for R128 composite. This should be a
+ * KAA flag we check for (and supported in kaa.c in general) since many
+ * older bits of hardware are going to want POT pitches.
+ */
+ w = pSrc->drawable.width;
+ if (atis->kaa.flags & KAA_OFFSCREEN_ALIGN_POT)
+ w = 1 << (ATILog2(w - 1) + 1);
+ dst_pitch = (w * pSrc->drawable.bitsPerPixel / 8 +
+ atis->kaa.pitchAlign - 1) & ~(atis->kaa.pitchAlign - 1);
+
+ size = dst_pitch * pSrc->drawable.height;
+ if (size > atis->scratch_area->size)
+ ATI_FALLBACK(("Pixmap too large for scratch (%d,%d)\n",
+ pSrc->drawable.width, pSrc->drawable.height));
+
+ atis->scratch_next = (atis->scratch_next + atis->kaa.offsetAlign - 1) &
+ ~(atis->kaa.offsetAlign - 1);
+ if (atis->scratch_next + size > atis->scratch_area->offset +
+ atis->scratch_area->size) {
+ /* Only sync when we've used all of the scratch area. */
+ kaaWaitSync(pSrc->drawable.pScreen);
+ atis->scratch_next = atis->scratch_area->offset;
+ }
+ memcpy(pDst, pSrc, sizeof(*pDst));
+ pDst->devKind = dst_pitch;
+ pDst->devPrivate.ptr = pScreenPriv->screen->memory_base +
+ atis->scratch_next;
+ atis->scratch_next += size;
+
+ src = pSrc->devPrivate.ptr;
+ src_pitch = pSrc->devKind;
+ dst = pDst->devPrivate.ptr;
+ bytes = src_pitch < dst_pitch ? src_pitch : dst_pitch;
+
+ i = pSrc->drawable.height;
+ while (i--) {
+ memcpy(dst, src, bytes);
+ dst += dst_pitch;
+ src += src_pitch;
+ }
+
+ /* Flush the pixel cache */
+ if (atic->is_radeon) {
+ BEGIN_DMA(4);
+ OUT_REG(RADEON_REG_RB3D_DSTCACHE_CTLSTAT,
+ RADEON_RB3D_DC_FLUSH_ALL);
+ OUT_REG(ATI_REG_WAIT_UNTIL, RADEON_WAIT_HOST_IDLECLEAN);
+ END_DMA();
+ } else {
+ BEGIN_DMA(2);
+ OUT_REG(R128_REG_PC_GUI_CTLSTAT, R128_PC_FLUSH_ALL);
+ END_DMA();
+ }
+
+ LEAVE_DRAW(pSrc);
+ return TRUE;
+}
+
+static void
+ATIBlockHandler(pointer blockData, OSTimePtr timeout, pointer readmask)
+{
+ ScreenPtr pScreen = (ScreenPtr) blockData;
+ KdScreenPriv(pScreen);
+ ATIScreenInfo(pScreenPriv);
+
+ /* When the server is going to sleep, make sure that all DMA data has
+ * been flushed.
+ */
+ if (atis->indirectBuffer)
+ ATIFlushIndirect(atis, 1);
+}
+
+static void
+ATIWakeupHandler(pointer blockData, int result, pointer readmask)
+{
+}
+
+Bool
+ATIDrawInit(ScreenPtr pScreen)
+{
+ KdScreenPriv(pScreen);
+ ATIScreenInfo(pScreenPriv);
+ ATICardInfo(pScreenPriv);
+
+ ErrorF("Screen: %d/%d depth/bpp\n", pScreenPriv->screen->fb[0].depth,
+ pScreenPriv->screen->fb[0].bitsPerPixel);
+
+ RegisterBlockAndWakeupHandlers(ATIBlockHandler, ATIWakeupHandler,
+ pScreen);
+
+#ifdef USE_DRI
+ atis->using_dri = ATIDRIScreenInit(pScreen);
+#endif /* USE_DRI */
+
+ memset(&atis->kaa, 0, sizeof(KaaScreenInfoRec));
+ atis->kaa.waitMarker = ATIWaitMarker;
+ atis->kaa.PrepareSolid = ATIPrepareSolid;
+ atis->kaa.Solid = ATISolid;
+ atis->kaa.DoneSolid = ATIDoneSolid;
+ atis->kaa.PrepareCopy = ATIPrepareCopy;
+ atis->kaa.Copy = ATICopy;
+ atis->kaa.DoneCopy = ATIDoneCopy;
+ /* Other acceleration will be hooked in in DrawEnable depending on
+ * what type of DMA gets initialized.
+ */
+
+ atis->kaa.flags = KAA_OFFSCREEN_PIXMAPS;
+ if (atic->is_radeon) {
+ atis->kaa.offsetAlign = 1024;
+ atis->kaa.pitchAlign = 64;
+ } else {
+ /* Rage 128 compositing wants power-of-two pitches. */
+ atis->kaa.flags |= KAA_OFFSCREEN_ALIGN_POT;
+ atis->kaa.offsetAlign = 32;
+ /* Pitch alignment is in sets of 8 pixels, and we need to cover
+ * 32bpp, so 32 bytes.
+ */
+ atis->kaa.pitchAlign = 32;
+ }
+
+ kaaInitTrapOffsets(8, sample_offsets_x, sample_offsets_y, 0.0, 0.0);
+ sample_count = (1 << 8) - 1;
+
+ if (!kaaDrawInit(pScreen, &atis->kaa))
+ return FALSE;
+
+ return TRUE;
+}
+
+static void
+ATIScratchSave(ScreenPtr pScreen, KdOffscreenArea *area)
+{
+ KdScreenPriv(pScreen);
+ ATIScreenInfo(pScreenPriv);
+
+ atis->scratch_area = NULL;
+}
+
+void
+ATIDrawEnable(ScreenPtr pScreen)
+{
+ KdScreenPriv(pScreen);
+ ATIScreenInfo(pScreenPriv);
+ ATICardInfo(pScreenPriv);
+
+ ATIDMASetup(pScreen);
+ ATIDrawSetup(pScreen);
+
+ atis->scratch_area = NULL;
+ atis->kaa.PrepareBlend = NULL;
+ atis->kaa.Blend = NULL;
+ atis->kaa.DoneBlend = NULL;
+ atis->kaa.CheckComposite = NULL;
+ atis->kaa.PrepareComposite = NULL;
+ atis->kaa.Composite = NULL;
+ atis->kaa.DoneComposite = NULL;
+ atis->kaa.UploadToScreen = NULL;
+ atis->kaa.UploadToScratch = NULL;
+
+ /* We can't dispatch 3d commands in PIO mode. */
+ if (!atis->using_pio) {
+ if (!atic->is_radeon) {
+ atis->kaa.CheckComposite = R128CheckComposite;
+ atis->kaa.PrepareComposite = R128PrepareComposite;
+ atis->kaa.Composite = R128Composite;
+ atis->kaa.DoneComposite = R128DoneComposite;
+ } else if (atic->is_r100) {
+ atis->kaa.CheckComposite = R100CheckComposite;
+ atis->kaa.PrepareComposite = R100PrepareComposite;
+ atis->kaa.Composite = RadeonComposite;
+ atis->kaa.DoneComposite = RadeonDoneComposite;
+ } else if (atic->is_r200) {
+ atis->kaa.CheckComposite = R200CheckComposite;
+ atis->kaa.PrepareComposite = R200PrepareComposite;
+ atis->kaa.Composite = RadeonComposite;
+ atis->kaa.DoneComposite = RadeonDoneComposite;
+ }
+ }
+#ifdef USE_DRI
+ if (atis->using_dri) {
+ if (!atic->is_radeon) {
+ /*atis->kaa.PrepareTrapezoids = R128PrepareTrapezoids;
+ atis->kaa.Trapezoids = R128Trapezoids;
+ atis->kaa.DoneTrapezoids = R128DoneTrapezoids;*/
+ } else if (atic->is_r100 || atic->is_r200) {
+ atis->kaa.PrepareTrapezoids = RadeonPrepareTrapezoids;
+ atis->kaa.Trapezoids = RadeonTrapezoids;
+ atis->kaa.DoneTrapezoids = RadeonDoneTrapezoids;
+ }
+ }
+#endif /* USE_DRI */
+
+ atis->kaa.UploadToScreen = ATIUploadToScreen;
+
+ /* Reserve a scratch area. It'll be used for storing glyph data during
+ * Composite operations, because glyphs aren't in real pixmaps and thus
+ * can't be migrated.
+ */
+ atis->scratch_area = KdOffscreenAlloc(pScreen, 131072,
+ atis->kaa.offsetAlign, TRUE, ATIScratchSave, atis);
+ if (atis->scratch_area != NULL) {
+ atis->scratch_next = atis->scratch_area->offset;
+ atis->kaa.UploadToScratch = ATIUploadToScratch;
+ }
+
+ kaaMarkSync(pScreen);
+}
+
+void
+ATIDrawDisable(ScreenPtr pScreen)
+{
+ kaaWaitSync(pScreen);
+ ATIDMATeardown(pScreen);
+}
+
+void
+ATIDrawFini(ScreenPtr pScreen)
+{
+#ifdef USE_DRI
+ KdScreenPriv(pScreen);
+ ATIScreenInfo(pScreenPriv);
+ if (atis->using_dri) {
+ ATIDRICloseScreen(pScreen);
+ atis->using_dri = FALSE;
+ }
+#endif /* USE_DRI */
+
+ RemoveBlockAndWakeupHandlers(ATIBlockHandler, ATIWakeupHandler,
+ pScreen);
+
+ kaaDrawFini(pScreen);
+}
+
diff --git a/xorg-server/hw/kdrive/ati/ati_draw.h b/xorg-server/hw/kdrive/ati/ati_draw.h
new file mode 100644
index 000000000..98a130a7b
--- /dev/null
+++ b/xorg-server/hw/kdrive/ati/ati_draw.h
@@ -0,0 +1,93 @@
+/*
+ * Copyright © 2004 Eric Anholt
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that
+ * copyright notice and this permission notice appear in supporting
+ * documentation, and that the name of Eric Anholt not be used in
+ * advertising or publicity pertaining to distribution of the software without
+ * specific, written prior permission. Eric Anholt makes no
+ * representations about the suitability of this software for any purpose. It
+ * is provided "as is" without express or implied warranty.
+ *
+ * ERIC ANHOLT DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL ERIC ANHOLT BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef _ATI_DRAW_H_
+#define _ATI_DRAW_H_
+
+Bool ATIGetOffsetPitch(ATIScreenInfo *atis, int bpp, CARD32 *pitch_offset,
+ int offset, int pitch);
+Bool ATIGetPixmapOffsetPitch(PixmapPtr pPix, CARD32 *pitch_offset);
+
+Bool R128CheckComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
+ PicturePtr pDstPicture);
+Bool R128PrepareComposite(int op, PicturePtr pSrcPicture,
+ PicturePtr pMaskPicture, PicturePtr pDstPicture, PixmapPtr pSrc,
+ PixmapPtr pMask, PixmapPtr pDst);
+void R128Composite(int srcX, int srcY, int maskX, int maskY, int dstX, int dstY,
+ int w, int h);
+void R128DoneComposite(void);
+
+Bool R128PrepareTrapezoids(PicturePtr pDstPicture, PixmapPtr pDst);
+void R128Trapezoids(KaaTrapezoid *traps, int ntraps);
+void R128DoneTrapezoids(void);
+
+Bool R100CheckComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
+ PicturePtr pDstPicture);
+Bool R100PrepareComposite(int op, PicturePtr pSrcPicture,
+ PicturePtr pMaskPicture, PicturePtr pDstPicture, PixmapPtr pSrc,
+ PixmapPtr pMask, PixmapPtr pDst);
+Bool R200CheckComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
+ PicturePtr pDstPicture);
+Bool R200PrepareComposite(int op, PicturePtr pSrcPicture,
+ PicturePtr pMaskPicture, PicturePtr pDstPicture, PixmapPtr pSrc,
+ PixmapPtr pMask, PixmapPtr pDst);
+void RadeonComposite(int srcX, int srcY, int maskX, int maskY, int dstX,
+ int dstY, int w, int h);
+void RadeonDoneComposite(void);
+
+Bool RadeonPrepareTrapezoids(PicturePtr pDstPicture, PixmapPtr pDst);
+void RadeonTrapezoids(KaaTrapezoid *traps, int ntraps);
+void RadeonDoneTrapezoids(void);
+
+void RadeonSwitchTo2D(ATIScreenInfo *atis);
+void RadeonSwitchTo3D(ATIScreenInfo *atis);
+void ATIWaitIdle(ATIScreenInfo *atis);
+
+#define ATI_TRACE_FALL 0
+#define ATI_TRACE_DRAW 0
+
+#if ATI_TRACE_FALL
+#define ATI_FALLBACK(x) \
+do { \
+ ErrorF("%s: ", __FUNCTION__); \
+ ErrorF x; \
+ return FALSE; \
+} while (0)
+#else
+#define ATI_FALLBACK(x) return FALSE
+#endif
+
+#if ATI_TRACE_DRAW
+#define ENTER_DRAW(pix) ATIEnterDraw(pix, __FUNCTION__)
+#define LEAVE_DRAW(pix) ATILeaveDraw(pix, __FUNCTION__)
+
+void
+ATIEnterDraw (PixmapPtr pPixmap, char *function);
+
+void
+ATILeaveDraw (PixmapPtr pPixmap, char *function);
+#else /* ATI_TRACE */
+#define ENTER_DRAW(pix)
+#define LEAVE_DRAW(pix)
+#endif /* !ATI_TRACE */
+
+#endif /* _ATI_DRAW_H_ */
diff --git a/xorg-server/hw/kdrive/ati/ati_microcode.c b/xorg-server/hw/kdrive/ati/ati_microcode.c
new file mode 100644
index 000000000..f8829e823
--- /dev/null
+++ b/xorg-server/hw/kdrive/ati/ati_microcode.c
@@ -0,0 +1,857 @@
+/* r128_cce.c -- ATI Rage 128 driver -*- linux-c -*-
+ * radeon_cp.c -- CP support for Radeon -*- linux-c -*-
+ *
+ * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 2000 VA Linux Systems, Inc., Fremont, California.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ * Kevin E. Martin <martin@valinux.com>
+ * Gareth Hughes <gareth@valinux.com>
+ */
+
+/* CCE microcode (from ATI) */
+
+#include "ati.h"
+
+CARD32 r128_cce_microcode[] = {
+ 0, 276838400, 0, 268449792, 2, 142, 2, 145, 0, 1076765731, 0,
+ 1617039951, 0, 774592877, 0, 1987540286, 0, 2307490946U, 0,
+ 599558925, 0, 589505315, 0, 596487092, 0, 589505315, 1,
+ 11544576, 1, 206848, 1, 311296, 1, 198656, 2, 912273422, 11,
+ 262144, 0, 0, 1, 33559837, 1, 7438, 1, 14809, 1, 6615, 12, 28,
+ 1, 6614, 12, 28, 2, 23, 11, 18874368, 0, 16790922, 1, 409600, 9,
+ 30, 1, 147854772, 16, 420483072, 3, 8192, 0, 10240, 1, 198656,
+ 1, 15630, 1, 51200, 10, 34858, 9, 42, 1, 33559823, 2, 10276, 1,
+ 15717, 1, 15718, 2, 43, 1, 15936948, 1, 570480831, 1, 14715071,
+ 12, 322123831, 1, 33953125, 12, 55, 1, 33559908, 1, 15718, 2,
+ 46, 4, 2099258, 1, 526336, 1, 442623, 4, 4194365, 1, 509952, 1,
+ 459007, 3, 0, 12, 92, 2, 46, 12, 176, 1, 15734, 1, 206848, 1,
+ 18432, 1, 133120, 1, 100670734, 1, 149504, 1, 165888, 1,
+ 15975928, 1, 1048576, 6, 3145806, 1, 15715, 16, 2150645232U, 2,
+ 268449859, 2, 10307, 12, 176, 1, 15734, 1, 15735, 1, 15630, 1,
+ 15631, 1, 5253120, 6, 3145810, 16, 2150645232U, 1, 15864, 2, 82,
+ 1, 343310, 1, 1064207, 2, 3145813, 1, 15728, 1, 7817, 1, 15729,
+ 3, 15730, 12, 92, 2, 98, 1, 16168, 1, 16167, 1, 16002, 1, 16008,
+ 1, 15974, 1, 15975, 1, 15990, 1, 15976, 1, 15977, 1, 15980, 0,
+ 15981, 1, 10240, 1, 5253120, 1, 15720, 1, 198656, 6, 110, 1,
+ 180224, 1, 103824738, 2, 112, 2, 3145839, 0, 536885440, 1,
+ 114880, 14, 125, 12, 206975, 1, 33559995, 12, 198784, 0,
+ 33570236, 1, 15803, 0, 15804, 3, 294912, 1, 294912, 3, 442370,
+ 1, 11544576, 0, 811612160, 1, 12593152, 1, 11536384, 1,
+ 14024704, 7, 310382726, 0, 10240, 1, 14796, 1, 14797, 1, 14793,
+ 1, 14794, 0, 14795, 1, 268679168, 1, 9437184, 1, 268449792, 1,
+ 198656, 1, 9452827, 1, 1075854602, 1, 1075854603, 1, 557056, 1,
+ 114880, 14, 159, 12, 198784, 1, 1109409213, 12, 198783, 1,
+ 1107312059, 12, 198784, 1, 1109409212, 2, 162, 1, 1075854781, 1,
+ 1073757627, 1, 1075854780, 1, 540672, 1, 10485760, 6, 3145894,
+ 16, 274741248, 9, 168, 3, 4194304, 3, 4209949, 0, 0, 0, 256, 14,
+ 174, 1, 114857, 1, 33560007, 12, 176, 0, 10240, 1, 114858, 1,
+ 33560018, 1, 114857, 3, 33560007, 1, 16008, 1, 114874, 1,
+ 33560360, 1, 114875, 1, 33560154, 0, 15963, 0, 256, 0, 4096, 1,
+ 409611, 9, 188, 0, 10240, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+CARD32 radeon_cp_microcode[][2] = {
+ { 0x21007000, 0000000000 },
+ { 0x20007000, 0000000000 },
+ { 0x000000b4, 0x00000004 },
+ { 0x000000b8, 0x00000004 },
+ { 0x6f5b4d4c, 0000000000 },
+ { 0x4c4c427f, 0000000000 },
+ { 0x5b568a92, 0000000000 },
+ { 0x4ca09c6d, 0000000000 },
+ { 0xad4c4c4c, 0000000000 },
+ { 0x4ce1af3d, 0000000000 },
+ { 0xd8afafaf, 0000000000 },
+ { 0xd64c4cdc, 0000000000 },
+ { 0x4cd10d10, 0000000000 },
+ { 0x000f0000, 0x00000016 },
+ { 0x362f242d, 0000000000 },
+ { 0x00000012, 0x00000004 },
+ { 0x000f0000, 0x00000016 },
+ { 0x362f282d, 0000000000 },
+ { 0x000380e7, 0x00000002 },
+ { 0x04002c97, 0x00000002 },
+ { 0x000f0001, 0x00000016 },
+ { 0x333a3730, 0000000000 },
+ { 0x000077ef, 0x00000002 },
+ { 0x00061000, 0x00000002 },
+ { 0x00000021, 0x0000001a },
+ { 0x00004000, 0x0000001e },
+ { 0x00061000, 0x00000002 },
+ { 0x00000021, 0x0000001a },
+ { 0x00004000, 0x0000001e },
+ { 0x00061000, 0x00000002 },
+ { 0x00000021, 0x0000001a },
+ { 0x00004000, 0x0000001e },
+ { 0x00000017, 0x00000004 },
+ { 0x0003802b, 0x00000002 },
+ { 0x040067e0, 0x00000002 },
+ { 0x00000017, 0x00000004 },
+ { 0x000077e0, 0x00000002 },
+ { 0x00065000, 0x00000002 },
+ { 0x000037e1, 0x00000002 },
+ { 0x040067e1, 0x00000006 },
+ { 0x000077e0, 0x00000002 },
+ { 0x000077e1, 0x00000002 },
+ { 0x000077e1, 0x00000006 },
+ { 0xffffffff, 0000000000 },
+ { 0x10000000, 0000000000 },
+ { 0x0003802b, 0x00000002 },
+ { 0x040067e0, 0x00000006 },
+ { 0x00007675, 0x00000002 },
+ { 0x00007676, 0x00000002 },
+ { 0x00007677, 0x00000002 },
+ { 0x00007678, 0x00000006 },
+ { 0x0003802c, 0x00000002 },
+ { 0x04002676, 0x00000002 },
+ { 0x00007677, 0x00000002 },
+ { 0x00007678, 0x00000006 },
+ { 0x0000002f, 0x00000018 },
+ { 0x0000002f, 0x00000018 },
+ { 0000000000, 0x00000006 },
+ { 0x00000030, 0x00000018 },
+ { 0x00000030, 0x00000018 },
+ { 0000000000, 0x00000006 },
+ { 0x01605000, 0x00000002 },
+ { 0x00065000, 0x00000002 },
+ { 0x00098000, 0x00000002 },
+ { 0x00061000, 0x00000002 },
+ { 0x64c0603e, 0x00000004 },
+ { 0x000380e6, 0x00000002 },
+ { 0x040025c5, 0x00000002 },
+ { 0x00080000, 0x00000016 },
+ { 0000000000, 0000000000 },
+ { 0x0400251d, 0x00000002 },
+ { 0x00007580, 0x00000002 },
+ { 0x00067581, 0x00000002 },
+ { 0x04002580, 0x00000002 },
+ { 0x00067581, 0x00000002 },
+ { 0x00000049, 0x00000004 },
+ { 0x00005000, 0000000000 },
+ { 0x000380e6, 0x00000002 },
+ { 0x040025c5, 0x00000002 },
+ { 0x00061000, 0x00000002 },
+ { 0x0000750e, 0x00000002 },
+ { 0x00019000, 0x00000002 },
+ { 0x00011055, 0x00000014 },
+ { 0x00000055, 0x00000012 },
+ { 0x0400250f, 0x00000002 },
+ { 0x0000504f, 0x00000004 },
+ { 0x000380e6, 0x00000002 },
+ { 0x040025c5, 0x00000002 },
+ { 0x00007565, 0x00000002 },
+ { 0x00007566, 0x00000002 },
+ { 0x00000058, 0x00000004 },
+ { 0x000380e6, 0x00000002 },
+ { 0x040025c5, 0x00000002 },
+ { 0x01e655b4, 0x00000002 },
+ { 0x4401b0e4, 0x00000002 },
+ { 0x01c110e4, 0x00000002 },
+ { 0x26667066, 0x00000018 },
+ { 0x040c2565, 0x00000002 },
+ { 0x00000066, 0x00000018 },
+ { 0x04002564, 0x00000002 },
+ { 0x00007566, 0x00000002 },
+ { 0x0000005d, 0x00000004 },
+ { 0x00401069, 0x00000008 },
+ { 0x00101000, 0x00000002 },
+ { 0x000d80ff, 0x00000002 },
+ { 0x0080006c, 0x00000008 },
+ { 0x000f9000, 0x00000002 },
+ { 0x000e00ff, 0x00000002 },
+ { 0000000000, 0x00000006 },
+ { 0x0000008f, 0x00000018 },
+ { 0x0000005b, 0x00000004 },
+ { 0x000380e6, 0x00000002 },
+ { 0x040025c5, 0x00000002 },
+ { 0x00007576, 0x00000002 },
+ { 0x00065000, 0x00000002 },
+ { 0x00009000, 0x00000002 },
+ { 0x00041000, 0x00000002 },
+ { 0x0c00350e, 0x00000002 },
+ { 0x00049000, 0x00000002 },
+ { 0x00051000, 0x00000002 },
+ { 0x01e785f8, 0x00000002 },
+ { 0x00200000, 0x00000002 },
+ { 0x0060007e, 0x0000000c },
+ { 0x00007563, 0x00000002 },
+ { 0x006075f0, 0x00000021 },
+ { 0x20007073, 0x00000004 },
+ { 0x00005073, 0x00000004 },
+ { 0x000380e6, 0x00000002 },
+ { 0x040025c5, 0x00000002 },
+ { 0x00007576, 0x00000002 },
+ { 0x00007577, 0x00000002 },
+ { 0x0000750e, 0x00000002 },
+ { 0x0000750f, 0x00000002 },
+ { 0x00a05000, 0x00000002 },
+ { 0x00600083, 0x0000000c },
+ { 0x006075f0, 0x00000021 },
+ { 0x000075f8, 0x00000002 },
+ { 0x00000083, 0x00000004 },
+ { 0x000a750e, 0x00000002 },
+ { 0x000380e6, 0x00000002 },
+ { 0x040025c5, 0x00000002 },
+ { 0x0020750f, 0x00000002 },
+ { 0x00600086, 0x00000004 },
+ { 0x00007570, 0x00000002 },
+ { 0x00007571, 0x00000002 },
+ { 0x00007572, 0x00000006 },
+ { 0x000380e6, 0x00000002 },
+ { 0x040025c5, 0x00000002 },
+ { 0x00005000, 0x00000002 },
+ { 0x00a05000, 0x00000002 },
+ { 0x00007568, 0x00000002 },
+ { 0x00061000, 0x00000002 },
+ { 0x00000095, 0x0000000c },
+ { 0x00058000, 0x00000002 },
+ { 0x0c607562, 0x00000002 },
+ { 0x00000097, 0x00000004 },
+ { 0x000380e6, 0x00000002 },
+ { 0x040025c5, 0x00000002 },
+ { 0x00600096, 0x00000004 },
+ { 0x400070e5, 0000000000 },
+ { 0x000380e6, 0x00000002 },
+ { 0x040025c5, 0x00000002 },
+ { 0x000380e5, 0x00000002 },
+ { 0x000000a8, 0x0000001c },
+ { 0x000650aa, 0x00000018 },
+ { 0x040025bb, 0x00000002 },
+ { 0x000610ab, 0x00000018 },
+ { 0x040075bc, 0000000000 },
+ { 0x000075bb, 0x00000002 },
+ { 0x000075bc, 0000000000 },
+ { 0x00090000, 0x00000006 },
+ { 0x00090000, 0x00000002 },
+ { 0x000d8002, 0x00000006 },
+ { 0x00007832, 0x00000002 },
+ { 0x00005000, 0x00000002 },
+ { 0x000380e7, 0x00000002 },
+ { 0x04002c97, 0x00000002 },
+ { 0x00007820, 0x00000002 },
+ { 0x00007821, 0x00000002 },
+ { 0x00007800, 0000000000 },
+ { 0x01200000, 0x00000002 },
+ { 0x20077000, 0x00000002 },
+ { 0x01200000, 0x00000002 },
+ { 0x20007000, 0x00000002 },
+ { 0x00061000, 0x00000002 },
+ { 0x0120751b, 0x00000002 },
+ { 0x8040750a, 0x00000002 },
+ { 0x8040750b, 0x00000002 },
+ { 0x00110000, 0x00000002 },
+ { 0x000380e5, 0x00000002 },
+ { 0x000000c6, 0x0000001c },
+ { 0x000610ab, 0x00000018 },
+ { 0x844075bd, 0x00000002 },
+ { 0x000610aa, 0x00000018 },
+ { 0x840075bb, 0x00000002 },
+ { 0x000610ab, 0x00000018 },
+ { 0x844075bc, 0x00000002 },
+ { 0x000000c9, 0x00000004 },
+ { 0x804075bd, 0x00000002 },
+ { 0x800075bb, 0x00000002 },
+ { 0x804075bc, 0x00000002 },
+ { 0x00108000, 0x00000002 },
+ { 0x01400000, 0x00000002 },
+ { 0x006000cd, 0x0000000c },
+ { 0x20c07000, 0x00000020 },
+ { 0x000000cf, 0x00000012 },
+ { 0x00800000, 0x00000006 },
+ { 0x0080751d, 0x00000006 },
+ { 0000000000, 0000000000 },
+ { 0x0000775c, 0x00000002 },
+ { 0x00a05000, 0x00000002 },
+ { 0x00661000, 0x00000002 },
+ { 0x0460275d, 0x00000020 },
+ { 0x00004000, 0000000000 },
+ { 0x01e00830, 0x00000002 },
+ { 0x21007000, 0000000000 },
+ { 0x6464614d, 0000000000 },
+ { 0x69687420, 0000000000 },
+ { 0x00000073, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0x00005000, 0x00000002 },
+ { 0x000380d0, 0x00000002 },
+ { 0x040025e0, 0x00000002 },
+ { 0x000075e1, 0000000000 },
+ { 0x00000001, 0000000000 },
+ { 0x000380e0, 0x00000002 },
+ { 0x04002394, 0x00000002 },
+ { 0x00005000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0x00000008, 0000000000 },
+ { 0x00000004, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+};
+
+CARD32 r200_cp_microcode[][2] = {
+ { 0x21007000, 0000000000 },
+ { 0x20007000, 0000000000 },
+ { 0x000000ab, 0x00000004 },
+ { 0x000000af, 0x00000004 },
+ { 0x66544a49, 0000000000 },
+ { 0x49494174, 0000000000 },
+ { 0x54517d83, 0000000000 },
+ { 0x498d8b64, 0000000000 },
+ { 0x49494949, 0000000000 },
+ { 0x49da493c, 0000000000 },
+ { 0x49989898, 0000000000 },
+ { 0xd34949d5, 0000000000 },
+ { 0x9dc90e11, 0000000000 },
+ { 0xce9b9b9b, 0000000000 },
+ { 0x000f0000, 0x00000016 },
+ { 0x352e232c, 0000000000 },
+ { 0x00000013, 0x00000004 },
+ { 0x000f0000, 0x00000016 },
+ { 0x352e272c, 0000000000 },
+ { 0x000f0001, 0x00000016 },
+ { 0x3239362f, 0000000000 },
+ { 0x000077ef, 0x00000002 },
+ { 0x00061000, 0x00000002 },
+ { 0x00000020, 0x0000001a },
+ { 0x00004000, 0x0000001e },
+ { 0x00061000, 0x00000002 },
+ { 0x00000020, 0x0000001a },
+ { 0x00004000, 0x0000001e },
+ { 0x00061000, 0x00000002 },
+ { 0x00000020, 0x0000001a },
+ { 0x00004000, 0x0000001e },
+ { 0x00000016, 0x00000004 },
+ { 0x0003802a, 0x00000002 },
+ { 0x040067e0, 0x00000002 },
+ { 0x00000016, 0x00000004 },
+ { 0x000077e0, 0x00000002 },
+ { 0x00065000, 0x00000002 },
+ { 0x000037e1, 0x00000002 },
+ { 0x040067e1, 0x00000006 },
+ { 0x000077e0, 0x00000002 },
+ { 0x000077e1, 0x00000002 },
+ { 0x000077e1, 0x00000006 },
+ { 0xffffffff, 0000000000 },
+ { 0x10000000, 0000000000 },
+ { 0x0003802a, 0x00000002 },
+ { 0x040067e0, 0x00000006 },
+ { 0x00007675, 0x00000002 },
+ { 0x00007676, 0x00000002 },
+ { 0x00007677, 0x00000002 },
+ { 0x00007678, 0x00000006 },
+ { 0x0003802b, 0x00000002 },
+ { 0x04002676, 0x00000002 },
+ { 0x00007677, 0x00000002 },
+ { 0x00007678, 0x00000006 },
+ { 0x0000002e, 0x00000018 },
+ { 0x0000002e, 0x00000018 },
+ { 0000000000, 0x00000006 },
+ { 0x0000002f, 0x00000018 },
+ { 0x0000002f, 0x00000018 },
+ { 0000000000, 0x00000006 },
+ { 0x01605000, 0x00000002 },
+ { 0x00065000, 0x00000002 },
+ { 0x00098000, 0x00000002 },
+ { 0x00061000, 0x00000002 },
+ { 0x64c0603d, 0x00000004 },
+ { 0x00080000, 0x00000016 },
+ { 0000000000, 0000000000 },
+ { 0x0400251d, 0x00000002 },
+ { 0x00007580, 0x00000002 },
+ { 0x00067581, 0x00000002 },
+ { 0x04002580, 0x00000002 },
+ { 0x00067581, 0x00000002 },
+ { 0x00000046, 0x00000004 },
+ { 0x00005000, 0000000000 },
+ { 0x00061000, 0x00000002 },
+ { 0x0000750e, 0x00000002 },
+ { 0x00019000, 0x00000002 },
+ { 0x00011055, 0x00000014 },
+ { 0x00000055, 0x00000012 },
+ { 0x0400250f, 0x00000002 },
+ { 0x0000504a, 0x00000004 },
+ { 0x00007565, 0x00000002 },
+ { 0x00007566, 0x00000002 },
+ { 0x00000051, 0x00000004 },
+ { 0x01e655b4, 0x00000002 },
+ { 0x4401b0dc, 0x00000002 },
+ { 0x01c110dc, 0x00000002 },
+ { 0x2666705d, 0x00000018 },
+ { 0x040c2565, 0x00000002 },
+ { 0x0000005d, 0x00000018 },
+ { 0x04002564, 0x00000002 },
+ { 0x00007566, 0x00000002 },
+ { 0x00000054, 0x00000004 },
+ { 0x00401060, 0x00000008 },
+ { 0x00101000, 0x00000002 },
+ { 0x000d80ff, 0x00000002 },
+ { 0x00800063, 0x00000008 },
+ { 0x000f9000, 0x00000002 },
+ { 0x000e00ff, 0x00000002 },
+ { 0000000000, 0x00000006 },
+ { 0x00000080, 0x00000018 },
+ { 0x00000054, 0x00000004 },
+ { 0x00007576, 0x00000002 },
+ { 0x00065000, 0x00000002 },
+ { 0x00009000, 0x00000002 },
+ { 0x00041000, 0x00000002 },
+ { 0x0c00350e, 0x00000002 },
+ { 0x00049000, 0x00000002 },
+ { 0x00051000, 0x00000002 },
+ { 0x01e785f8, 0x00000002 },
+ { 0x00200000, 0x00000002 },
+ { 0x00600073, 0x0000000c },
+ { 0x00007563, 0x00000002 },
+ { 0x006075f0, 0x00000021 },
+ { 0x20007068, 0x00000004 },
+ { 0x00005068, 0x00000004 },
+ { 0x00007576, 0x00000002 },
+ { 0x00007577, 0x00000002 },
+ { 0x0000750e, 0x00000002 },
+ { 0x0000750f, 0x00000002 },
+ { 0x00a05000, 0x00000002 },
+ { 0x00600076, 0x0000000c },
+ { 0x006075f0, 0x00000021 },
+ { 0x000075f8, 0x00000002 },
+ { 0x00000076, 0x00000004 },
+ { 0x000a750e, 0x00000002 },
+ { 0x0020750f, 0x00000002 },
+ { 0x00600079, 0x00000004 },
+ { 0x00007570, 0x00000002 },
+ { 0x00007571, 0x00000002 },
+ { 0x00007572, 0x00000006 },
+ { 0x00005000, 0x00000002 },
+ { 0x00a05000, 0x00000002 },
+ { 0x00007568, 0x00000002 },
+ { 0x00061000, 0x00000002 },
+ { 0x00000084, 0x0000000c },
+ { 0x00058000, 0x00000002 },
+ { 0x0c607562, 0x00000002 },
+ { 0x00000086, 0x00000004 },
+ { 0x00600085, 0x00000004 },
+ { 0x400070dd, 0000000000 },
+ { 0x000380dd, 0x00000002 },
+ { 0x00000093, 0x0000001c },
+ { 0x00065095, 0x00000018 },
+ { 0x040025bb, 0x00000002 },
+ { 0x00061096, 0x00000018 },
+ { 0x040075bc, 0000000000 },
+ { 0x000075bb, 0x00000002 },
+ { 0x000075bc, 0000000000 },
+ { 0x00090000, 0x00000006 },
+ { 0x00090000, 0x00000002 },
+ { 0x000d8002, 0x00000006 },
+ { 0x00005000, 0x00000002 },
+ { 0x00007821, 0x00000002 },
+ { 0x00007800, 0000000000 },
+ { 0x00007821, 0x00000002 },
+ { 0x00007800, 0000000000 },
+ { 0x01665000, 0x00000002 },
+ { 0x000a0000, 0x00000002 },
+ { 0x000671cc, 0x00000002 },
+ { 0x0286f1cd, 0x00000002 },
+ { 0x000000a3, 0x00000010 },
+ { 0x21007000, 0000000000 },
+ { 0x000000aa, 0x0000001c },
+ { 0x00065000, 0x00000002 },
+ { 0x000a0000, 0x00000002 },
+ { 0x00061000, 0x00000002 },
+ { 0x000b0000, 0x00000002 },
+ { 0x38067000, 0x00000002 },
+ { 0x000a00a6, 0x00000004 },
+ { 0x20007000, 0000000000 },
+ { 0x01200000, 0x00000002 },
+ { 0x20077000, 0x00000002 },
+ { 0x01200000, 0x00000002 },
+ { 0x20007000, 0000000000 },
+ { 0x00061000, 0x00000002 },
+ { 0x0120751b, 0x00000002 },
+ { 0x8040750a, 0x00000002 },
+ { 0x8040750b, 0x00000002 },
+ { 0x00110000, 0x00000002 },
+ { 0x000380dd, 0x00000002 },
+ { 0x000000bd, 0x0000001c },
+ { 0x00061096, 0x00000018 },
+ { 0x844075bd, 0x00000002 },
+ { 0x00061095, 0x00000018 },
+ { 0x840075bb, 0x00000002 },
+ { 0x00061096, 0x00000018 },
+ { 0x844075bc, 0x00000002 },
+ { 0x000000c0, 0x00000004 },
+ { 0x804075bd, 0x00000002 },
+ { 0x800075bb, 0x00000002 },
+ { 0x804075bc, 0x00000002 },
+ { 0x00108000, 0x00000002 },
+ { 0x01400000, 0x00000002 },
+ { 0x006000c4, 0x0000000c },
+ { 0x20c07000, 0x00000020 },
+ { 0x000000c6, 0x00000012 },
+ { 0x00800000, 0x00000006 },
+ { 0x0080751d, 0x00000006 },
+ { 0x000025bb, 0x00000002 },
+ { 0x000040c0, 0x00000004 },
+ { 0x0000775c, 0x00000002 },
+ { 0x00a05000, 0x00000002 },
+ { 0x00661000, 0x00000002 },
+ { 0x0460275d, 0x00000020 },
+ { 0x00004000, 0000000000 },
+ { 0x00007999, 0x00000002 },
+ { 0x00a05000, 0x00000002 },
+ { 0x00661000, 0x00000002 },
+ { 0x0460299b, 0x00000020 },
+ { 0x00004000, 0000000000 },
+ { 0x01e00830, 0x00000002 },
+ { 0x21007000, 0000000000 },
+ { 0x00005000, 0x00000002 },
+ { 0x00038042, 0x00000002 },
+ { 0x040025e0, 0x00000002 },
+ { 0x000075e1, 0000000000 },
+ { 0x00000001, 0000000000 },
+ { 0x000380d9, 0x00000002 },
+ { 0x04007394, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+};
+
+/* Microcode from http://volodya-project.sourceforge.net/ */
+
+CARD32 r300_cp_microcode[][2] = {
+ { 0x4200e000, 0000000000 },
+ { 0x4000e000, 0000000000 },
+ { 0x000000af, 0x00000008 },
+ { 0x000000b3, 0x00000008 },
+ { 0x6c5a504f, 0000000000 },
+ { 0x4f4f497a, 0000000000 },
+ { 0x5a578288, 0000000000 },
+ { 0x4f91906a, 0000000000 },
+ { 0x4f4f4f4f, 0000000000 },
+ { 0x4fe24f44, 0000000000 },
+ { 0x4f9c9c9c, 0000000000 },
+ { 0xdc4f4fde, 0000000000 },
+ { 0xa1cd4f4f, 0000000000 },
+ { 0xd29d9d9d, 0000000000 },
+ { 0x4f0f9fd7, 0000000000 },
+ { 0x000ca000, 0x00000004 },
+ { 0x000d0012, 0x00000038 },
+ { 0x0000e8b4, 0x00000004 },
+ { 0x000d0014, 0x00000038 },
+ { 0x0000e8b6, 0x00000004 },
+ { 0x000d0016, 0x00000038 },
+ { 0x0000e854, 0x00000004 },
+ { 0x000d0018, 0x00000038 },
+ { 0x0000e855, 0x00000004 },
+ { 0x000d001a, 0x00000038 },
+ { 0x0000e856, 0x00000004 },
+ { 0x000d001c, 0x00000038 },
+ { 0x0000e857, 0x00000004 },
+ { 0x000d001e, 0x00000038 },
+ { 0x0000e824, 0x00000004 },
+ { 0x000d0020, 0x00000038 },
+ { 0x0000e825, 0x00000004 },
+ { 0x000d0022, 0x00000038 },
+ { 0x0000e830, 0x00000004 },
+ { 0x000d0024, 0x00000038 },
+ { 0x0000f0c0, 0x00000004 },
+ { 0x000d0026, 0x00000038 },
+ { 0x0000f0c1, 0x00000004 },
+ { 0x000d0028, 0x00000038 },
+ { 0x0000f041, 0x00000004 },
+ { 0x000d002a, 0x00000038 },
+ { 0x0000f184, 0x00000004 },
+ { 0x000d002c, 0x00000038 },
+ { 0x0000f185, 0x00000004 },
+ { 0x000d002e, 0x00000038 },
+ { 0x0000f186, 0x00000004 },
+ { 0x000d0030, 0x00000038 },
+ { 0x0000f187, 0x00000004 },
+ { 0x000d0032, 0x00000038 },
+ { 0x0000f180, 0x00000004 },
+ { 0x000d0034, 0x00000038 },
+ { 0x0000f393, 0x00000004 },
+ { 0x000d0036, 0x00000038 },
+ { 0x0000f38a, 0x00000004 },
+ { 0x000d0038, 0x00000038 },
+ { 0x0000f38e, 0x00000004 },
+ { 0x0000e821, 0x00000004 },
+ { 0x0140a000, 0x00000004 },
+ { 0x00000043, 0x00000018 },
+ { 0x00cce800, 0x00000004 },
+ { 0x001b0001, 0x00000004 },
+ { 0x08004800, 0x00000004 },
+ { 0x001b0001, 0x00000004 },
+ { 0x08004800, 0x00000004 },
+ { 0x001b0001, 0x00000004 },
+ { 0x08004800, 0x00000004 },
+ { 0x0000003a, 0x00000008 },
+ { 0x0000a000, 0000000000 },
+ { 0x02c0a000, 0x00000004 },
+ { 0x000ca000, 0x00000004 },
+ { 0x00130000, 0x00000004 },
+ { 0x000c2000, 0x00000004 },
+ { 0xc980c045, 0x00000008 },
+ { 0x2000451d, 0x00000004 },
+ { 0x0000e580, 0x00000004 },
+ { 0x000ce581, 0x00000004 },
+ { 0x08004580, 0x00000004 },
+ { 0x000ce581, 0x00000004 },
+ { 0x0000004c, 0x00000008 },
+ { 0x0000a000, 0000000000 },
+ { 0x000c2000, 0x00000004 },
+ { 0x0000e50e, 0x00000004 },
+ { 0x00032000, 0x00000004 },
+ { 0x00022056, 0x00000028 },
+ { 0x00000056, 0x00000024 },
+ { 0x0800450f, 0x00000004 },
+ { 0x0000a050, 0x00000008 },
+ { 0x0000e565, 0x00000004 },
+ { 0x0000e566, 0x00000004 },
+ { 0x00000057, 0x00000008 },
+ { 0x03cca5b4, 0x00000004 },
+ { 0x05432000, 0x00000004 },
+ { 0x00022000, 0x00000004 },
+ { 0x4ccce063, 0x00000030 },
+ { 0x08274565, 0x00000004 },
+ { 0x00000063, 0x00000030 },
+ { 0x08004564, 0x00000004 },
+ { 0x0000e566, 0x00000004 },
+ { 0x0000005a, 0x00000008 },
+ { 0x00802066, 0x00000010 },
+ { 0x00202000, 0x00000004 },
+ { 0x001b00ff, 0x00000004 },
+ { 0x01000069, 0x00000010 },
+ { 0x001f2000, 0x00000004 },
+ { 0x001c00ff, 0x00000004 },
+ { 0000000000, 0x0000000c },
+ { 0x00000085, 0x00000030 },
+ { 0x0000005a, 0x00000008 },
+ { 0x0000e576, 0x00000004 },
+ { 0x000ca000, 0x00000004 },
+ { 0x00012000, 0x00000004 },
+ { 0x00082000, 0x00000004 },
+ { 0x1800650e, 0x00000004 },
+ { 0x00092000, 0x00000004 },
+ { 0x000a2000, 0x00000004 },
+ { 0x000f0000, 0x00000004 },
+ { 0x00400000, 0x00000004 },
+ { 0x00000079, 0x00000018 },
+ { 0x0000e563, 0x00000004 },
+ { 0x00c0e5f9, 0x000000c2 },
+ { 0x0000006e, 0x00000008 },
+ { 0x0000a06e, 0x00000008 },
+ { 0x0000e576, 0x00000004 },
+ { 0x0000e577, 0x00000004 },
+ { 0x0000e50e, 0x00000004 },
+ { 0x0000e50f, 0x00000004 },
+ { 0x0140a000, 0x00000004 },
+ { 0x0000007c, 0x00000018 },
+ { 0x00c0e5f9, 0x000000c2 },
+ { 0x0000007c, 0x00000008 },
+ { 0x0014e50e, 0x00000004 },
+ { 0x0040e50f, 0x00000004 },
+ { 0x00c0007f, 0x00000008 },
+ { 0x0000e570, 0x00000004 },
+ { 0x0000e571, 0x00000004 },
+ { 0x0000e572, 0x0000000c },
+ { 0x0000a000, 0x00000004 },
+ { 0x0140a000, 0x00000004 },
+ { 0x0000e568, 0x00000004 },
+ { 0x000c2000, 0x00000004 },
+ { 0x00000089, 0x00000018 },
+ { 0x000b0000, 0x00000004 },
+ { 0x18c0e562, 0x00000004 },
+ { 0x0000008b, 0x00000008 },
+ { 0x00c0008a, 0x00000008 },
+ { 0x000700e4, 0x00000004 },
+ { 0x00000097, 0x00000038 },
+ { 0x000ca099, 0x00000030 },
+ { 0x080045bb, 0x00000004 },
+ { 0x000c209a, 0x00000030 },
+ { 0x0800e5bc, 0000000000 },
+ { 0x0000e5bb, 0x00000004 },
+ { 0x0000e5bc, 0000000000 },
+ { 0x00120000, 0x0000000c },
+ { 0x00120000, 0x00000004 },
+ { 0x001b0002, 0x0000000c },
+ { 0x0000a000, 0x00000004 },
+ { 0x0000e821, 0x00000004 },
+ { 0x0000e800, 0000000000 },
+ { 0x0000e821, 0x00000004 },
+ { 0x0000e82e, 0000000000 },
+ { 0x02cca000, 0x00000004 },
+ { 0x00140000, 0x00000004 },
+ { 0x000ce1cc, 0x00000004 },
+ { 0x050de1cd, 0x00000004 },
+ { 0x000000a7, 0x00000020 },
+ { 0x4200e000, 0000000000 },
+ { 0x000000ae, 0x00000038 },
+ { 0x000ca000, 0x00000004 },
+ { 0x00140000, 0x00000004 },
+ { 0x000c2000, 0x00000004 },
+ { 0x00160000, 0x00000004 },
+ { 0x700ce000, 0x00000004 },
+ { 0x001400aa, 0x00000008 },
+ { 0x4000e000, 0000000000 },
+ { 0x02400000, 0x00000004 },
+ { 0x400ee000, 0x00000004 },
+ { 0x02400000, 0x00000004 },
+ { 0x4000e000, 0000000000 },
+ { 0x000c2000, 0x00000004 },
+ { 0x0240e51b, 0x00000004 },
+ { 0x0080e50a, 0x00000005 },
+ { 0x0080e50b, 0x00000005 },
+ { 0x00220000, 0x00000004 },
+ { 0x000700e4, 0x00000004 },
+ { 0x000000c1, 0x00000038 },
+ { 0x000c209a, 0x00000030 },
+ { 0x0880e5bd, 0x00000005 },
+ { 0x000c2099, 0x00000030 },
+ { 0x0800e5bb, 0x00000005 },
+ { 0x000c209a, 0x00000030 },
+ { 0x0880e5bc, 0x00000005 },
+ { 0x000000c4, 0x00000008 },
+ { 0x0080e5bd, 0x00000005 },
+ { 0x0000e5bb, 0x00000005 },
+ { 0x0080e5bc, 0x00000005 },
+ { 0x00210000, 0x00000004 },
+ { 0x02800000, 0x00000004 },
+ { 0x00c000c8, 0x00000018 },
+ { 0x4180e000, 0x00000040 },
+ { 0x000000ca, 0x00000024 },
+ { 0x01000000, 0x0000000c },
+ { 0x0100e51d, 0x0000000c },
+ { 0x000045bb, 0x00000004 },
+ { 0x000080c4, 0x00000008 },
+ { 0x0000f3ce, 0x00000004 },
+ { 0x0140a000, 0x00000004 },
+ { 0x00cc2000, 0x00000004 },
+ { 0x08c053cf, 0x00000040 },
+ { 0x00008000, 0000000000 },
+ { 0x0000f3d2, 0x00000004 },
+ { 0x0140a000, 0x00000004 },
+ { 0x00cc2000, 0x00000004 },
+ { 0x08c053d3, 0x00000040 },
+ { 0x00008000, 0000000000 },
+ { 0x0000f39d, 0x00000004 },
+ { 0x0140a000, 0x00000004 },
+ { 0x00cc2000, 0x00000004 },
+ { 0x08c0539e, 0x00000040 },
+ { 0x00008000, 0000000000 },
+ { 0x03c00830, 0x00000004 },
+ { 0x4200e000, 0000000000 },
+ { 0x0000a000, 0x00000004 },
+ { 0x200045e0, 0x00000004 },
+ { 0x0000e5e1, 0000000000 },
+ { 0x00000001, 0000000000 },
+ { 0x000700e1, 0x00000004 },
+ { 0x0800e394, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+ { 0000000000, 0000000000 },
+};
diff --git a/xorg-server/hw/kdrive/ati/ati_reg.h b/xorg-server/hw/kdrive/ati/ati_reg.h
new file mode 100644
index 000000000..3089cba04
--- /dev/null
+++ b/xorg-server/hw/kdrive/ati/ati_reg.h
@@ -0,0 +1,1927 @@
+/*
+ * Copyright © 2003 Eric Anholt
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that
+ * copyright notice and this permission notice appear in supporting
+ * documentation, and that the name of Eric Anholt not be used in
+ * advertising or publicity pertaining to distribution of the software without
+ * specific, written prior permission. Eric Anholt makes no
+ * representations about the suitability of this software for any purpose. It
+ * is provided "as is" without express or implied warranty.
+ *
+ * ERIC ANHOLT DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL ERIC ANHOLT BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/* Many of the Radeon and Rage 128 registers are the same.
+ * ATI_ should denote registers and values that are common for R128 and Radeon.
+ *
+ * The information in this file comes from many sources, including the Rage 128
+ * DDK, Rage 128 register reference, the XFree86 and kernel Rage 128 and Radeon
+ * register definition headers, and bits from the Radeon DDK and RV200 register
+ * specs supplied by others.
+ */
+
+#define ATI_REG_CLOCK_CNTL_INDEX 0x0008
+# define ATI_PLL_WR_EN (1 << 7)
+# define ATI_PLL_DIV_SEL (3 << 8)
+
+#define ATI_REG_CLOCK_CNTL_DATA 0x000c
+
+#define ATI_REG_BUS_CNTL 0x0030
+# define ATI_BUS_MASTER_DIS (1 << 6)
+
+#define ATI_REG_GEN_INT_CNTL 0x0040
+
+#define ATI_REG_GEN_CNTL 0x0050
+# define ATI_CRTC_DBL_SCAN_EN (1 << 0) /* 0x00000001 */
+# define ATI_CRTC_INTERLACE_EN (1 << 1) /* 0x00000002 */
+# define ATI_CRTC_CSYNC_EN (1 << 4) /* 0x00000010 */
+# define ATI_CRTC_PIX_WIDTH_MASK (7 << 8) /* 0x00000700 */
+# define ATI_CRTC_CUR_EN (1 << 16) /* 0x00010000 */
+# define ATI_CRTC_CUR_MODE_MASK (7 << 17) /* 0x000e0000 */
+# define ATI_CRTC_ICON_EN (1 << 20) /* 0x00100000 */
+# define ATI_CRTC_ARGB_EN (2 << 20) /* 0x00200000 */
+# define ATI_CRTC_EXT_DISP_EN (1 << 24) /* 0x01000000 */
+# define ATI_CRTC_EN (1 << 25) /* 0x02000000 */
+# define ATI_CRTC_DISP_REQ_EN_B (1 << 26) /* 0x04000000 */
+
+#define ATI_REG_CRTC_EXT_CNTL 0x0054
+# define ATI_CRTC_EN (1 << 25)
+# define ATI_CRTC_VGA_XOVERSCAN (1 << 0)
+# define ATI_VGA_ATI_LINEAR (1 << 3)
+# define ATI_XCRT_CNT_EN (1 << 6)
+# define ATI_CRTC_HSYNC_DIS (1 << 8)
+# define ATI_CRTC_VSYNC_DIS (1 << 9)
+# define ATI_CRTC_DISPLAY_DIS (1 << 10)
+# define RADEON_CRTC_SYNC_TRISTAT (1 << 11)
+# define ATI_CRTC_CRT_ON (1 << 15)
+# define R128_FP_OUT_EN (1 << 22)
+# define R128_FP_ACTIVE (1 << 23)
+
+#define ATI_REG_DAC_CNTL 0x0058
+# define ATI_DAC_RANGE_CNTL (3 << 0)
+# define ATI_DAC_BLANKING (1 << 2)
+# define R128_DAC_CRT_SEL_CRTC2 (1 << 4)
+# define ATI_DAC_CMP_EN (1 << 3)
+# define R128_DAC_PALETTE_ACC_CTL (1 << 5)
+# define ATI_DAC_CMP_OUTPUT (1 << 7)
+# define ATI_DAC_8BIT_EN (1 << 8)
+# define ATI_DAC_VGA_ADR_EN (1 << 13)
+# define ATI_DAC_PDWN (1 << 15)
+# define ATI_DAC_MASK_ALL (0xff << 24)
+
+#define ATI_REG_I2C_CNTL_1 0x0094
+
+#define R128_REG_GEN_RESET_CNTL 0x00f0
+# define R128_SOFT_RESET_GUI (1 << 0)
+# define R128_SOFT_RESET_VCLK (1 << 8)
+# define R128_SOFT_RESET_PCLK (1 << 9)
+# define R128_SOFT_RESET_DISPENG_XCLK (1 << 11)
+# define R128_SOFT_RESET_MEMCTLR_XCLK (1 << 12)
+
+#define RADEON_REG_RBBM_SOFT_RESET 0x00f0
+# define RADEON_SOFT_RESET_CP (1 << 0)
+# define RADEON_SOFT_RESET_HI (1 << 1)
+# define RADEON_SOFT_RESET_SE (1 << 2)
+# define RADEON_SOFT_RESET_RE (1 << 3)
+# define RADEON_SOFT_RESET_PP (1 << 4)
+# define RADEON_SOFT_RESET_E2 (1 << 5)
+# define RADEON_SOFT_RESET_RB (1 << 6)
+# define RADEON_SOFT_RESET_HDP (1 << 7)
+
+#define RADEON_REG_HOST_PATH_CNTL 0x0130
+# define RADEON_HDP_SOFT_RESET (1 << 26)
+
+#define ATI_REG_AGP_BASE 0x0170
+
+#define ATI_REG_AGP_CNTL 0x0174
+# define R128_AGP_APER_SIZE_256MB (0x00 << 0)
+# define R128_AGP_APER_SIZE_128MB (0x20 << 0)
+# define R128_AGP_APER_SIZE_64MB (0x30 << 0)
+# define R128_AGP_APER_SIZE_32MB (0x38 << 0)
+# define R128_AGP_APER_SIZE_16MB (0x3c << 0)
+# define R128_AGP_APER_SIZE_8MB (0x3e << 0)
+# define R128_AGP_APER_SIZE_4MB (0x3f << 0)
+# define R128_AGP_APER_SIZE_MASK (0x3f << 0)
+# define RADEON_PENDING_SLOTS_VAL 0x00060000
+# define RADEON_PENDING_SLOTS_SEL 0x00080000
+
+#define R128_REG_PCI_GART_PAGE 0x017c
+
+#define R128_REG_PC_NGUI_CTLSTAT 0x0184
+# define R128_PC_FLUSH_GUI (3 << 0)
+# define R128_PC_RI_GUI (1 << 2)
+# define R128_PC_FLUSH_ALL 0x00ff
+# define R128_PC_BUSY (1 << 31)
+
+#define R128_REG_VIPH_CONTROL 0x01d0
+
+#define ATI_REG_CRTC_H_TOTAL_DISP 0x0200
+#define ATI_REG_CRTC2_H_TOTAL_DISP 0x0300
+# define ATI_CRTC_H_TOTAL (0x01ff << 0)
+# define ATI_CRTC_H_TOTAL_SHIFT 0
+# define ATI_CRTC_H_DISP (0x00ff << 16)
+# define ATI_CRTC_H_DISP_SHIFT 16
+
+#define ATI_REG_CRTC_H_SYNC_STRT_WID 0x0204
+#define ATI_REG_CRTC2_H_SYNC_STRT_WID 0x0304
+# define RADEON_CRTC_H_SYNC_STRT_PIX (0x07 << 0)
+# define RADEON_CRTC_H_SYNC_STRT_CHAR (0x3ff << 3)
+# define RADEON_CRTC_H_SYNC_STRT_CHAR_SHIFT 3
+# define RADEON_CRTC_H_SYNC_WID (0x3f << 16)
+# define RADEON_CRTC_H_SYNC_WID_SHIFT 16
+# define RADEON_CRTC_H_SYNC_POL (1 << 23)
+
+#define ATI_REG_CRTC_OFFSET 0x0224
+#define ATI_REG_CRTC2_OFFSET 0x0324
+#define ATI_REG_CRTC_OFFSET_CNTL 0x0228
+#define ATI_REG_CRTC2_OFFSET_CNTL 0x0328
+#define ATI_REG_CRTC_PITCH 0x022c
+#define ATI_REG_CRTC2_PITCH 0x032c
+
+#define ATI_REG_OVR_CLR 0x0230
+#define ATI_REG_OVR_WID_LEFT_RIGHT 0x0234
+#define ATI_REG_OVR_WID_TOP_BOTTOM 0x0238
+
+#define ATI_REG_CUR_OFFSET 0x0260
+#define ATI_REG_CUR_HORZ_VERT_POSN 0x0264
+#define ATI_REG_CUR_HORZ_VERT_OFF 0x0268
+# define ATI_CUR_LOCK (1 << 31)
+# define ATI_CURSOR_WIDTH 64
+# define ATI_CURSOR_HEIGHT 64
+# define ATI_CURSOR_PITCH 16
+
+#define ATI_REG_CUR_CLR0 0x026c
+#define ATI_REG_CUR_CLR1 0x0270
+#define ATI_REG_OV0_SCALE_CNTL 0x0420
+#define ATI_REG_SUBPIC_CNTL 0x0540
+#define ATI_REG_CAP0_TRIG_CNTL 0x0950
+#define RADEON_REG_VIPH_CONTROL 0x0c50
+
+#define RADEON_REG_RBBM_STATUS 0x0e40
+# define RADEON_RBBM_FIFOCNT_MASK 0x007f
+# define RADEON_RBBM_ACTIVE (1 << 31)
+
+#define ATI_REG_CCE_RB_BASE 0x0700
+
+#define R128_REG_PM4_BUFFER_CNTL 0x0704
+# define R128_PM4_IN_FRAME_BUFFER (1 << 26)
+# define R128_PM4_BUFFER_CNTL_NOUPDATE (1 << 27)
+# define R128_PM4_NONPM4 (0 << 28)
+# define R128_PM4_192PIO (1 << 28)
+# define R128_PM4_192BM (2 << 28)
+# define R128_PM4_128PIO_64INDBM (3 << 28)
+# define R128_PM4_128BM_64INDBM (4 << 28)
+# define R128_PM4_64PIO_128INDBM (5 << 28)
+# define R128_PM4_64BM_128INDBM (6 << 28)
+# define R128_PM4_64PIO_64VCBM_64INDBM (7 << 28)
+# define R128_PM4_64BM_64VCBM_64INDBM (8 << 28)
+# define R128_PM4_64PIO_64VCPIO_64INDPIO (15 << 28)
+
+#define RADEON_REG_CP_RB_CNTL 0x0704
+
+#define R128_REG_PM4_BUFFER_WM_CNTL 0x0708
+# define R128_WMA_SHIFT 0
+# define R128_WMB_SHIFT 8
+# define R128_WMC_SHIFT 16
+# define R128_WB_WM_SHIFT 24
+
+#define ATI_REG_CCE_RPTR_ADDR 0x070c
+#define ATI_REG_CCE_RPTR 0x0710
+#define ATI_REG_CCE_WPTR 0x0714
+# define R128_PM4_BUFFER_DL_DONE (1 << 31)
+
+#define R128_REG_PM4_VC_FPU_SETUP 0x071c
+# define R128_FRONT_DIR_CW (0 << 0)
+# define R128_FRONT_DIR_CCW (1 << 0)
+# define R128_FRONT_DIR_MASK (1 << 0)
+# define R128_BACKFACE_CULL (0 << 1)
+# define R128_BACKFACE_POINTS (1 << 1)
+# define R128_BACKFACE_LINES (2 << 1)
+# define R128_BACKFACE_SOLID (3 << 1)
+# define R128_BACKFACE_MASK (3 << 1)
+# define R128_FRONTFACE_CULL (0 << 3)
+# define R128_FRONTFACE_POINTS (1 << 3)
+# define R128_FRONTFACE_LINES (2 << 3)
+# define R128_FRONTFACE_SOLID (3 << 3)
+# define R128_FRONTFACE_MASK (3 << 3)
+# define R128_FPU_COLOR_SOLID (0 << 5)
+# define R128_FPU_COLOR_FLAT (1 << 5)
+# define R128_FPU_COLOR_GOURAUD (2 << 5)
+# define R128_FPU_COLOR_GOURAUD2 (3 << 5)
+# define R128_FPU_COLOR_MASK (3 << 5)
+# define R128_FPU_SUB_PIX_2BITS (0 << 7)
+# define R128_FPU_SUB_PIX_4BITS (1 << 7)
+# define R128_FPU_MODE_2D (0 << 8)
+# define R128_FPU_MODE_3D (1 << 8)
+# define R128_TRAP_BITS_DISABLE (1 << 9)
+# define R128_EDGE_ANTIALIAS (1 << 10)
+# define R128_SUPERSAMPLE (1 << 11)
+# define R128_XFACTOR_2 (0 << 12)
+# define R128_XFACTOR_4 (1 << 12)
+# define R128_YFACTOR_2 (0 << 13)
+# define R128_YFACTOR_4 (1 << 13)
+# define R128_FLAT_SHADE_VERTEX_D3D (0 << 14)
+# define R128_FLAT_SHADE_VERTEX_OGL (1 << 14)
+# define R128_FPU_ROUND_TRUNCATE (0 << 15)
+# define R128_FPU_ROUND_NEAREST (1 << 15)
+# define R128_WM_SEL_8DW (0 << 16)
+# define R128_WM_SEL_16DW (1 << 16)
+# define R128_WM_SEL_32DW (2 << 16)
+
+#define R128_REG_PM4_IW_INDOFF 0x0738
+#define R128_REG_PM4_IW_INDSIZE 0x073c
+
+#define RADEON_REG_CP_CSQ_CNTL 0x0740
+# define RADEON_CSQ_CNT_PRIMARY_MASK 0x000000ff
+# define RADEON_CSQ_CNT_INDIRECT_MASK 0x0000ff00
+# define R200_CSQ_CNT_PRIMARY_MASK 0x000001ff
+# define R200_CSQ_CNT_INDIRECT_MASK 0x0003fe00
+# define RADEON_CSQ_PRIDIS_INDDIS (0 << 28)
+# define RADEON_CSQ_PRIPIO_INDDIS (1 << 28)
+# define RADEON_CSQ_PRIBM_INDDIS (2 << 28)
+# define RADEON_CSQ_PRIPIO_INDBM (3 << 28)
+# define RADEON_CSQ_PRIBM_INDBM (4 << 28)
+# define RADEON_CSQ_PRIPIO_INDPIO (15 << 28)
+
+#define R128_REG_PM4_STAT 0x07b8
+# define R128_PM4_FIFOCNT_MASK 0x00000fff
+# define R128_PM4_BUSY (1 << 16)
+# define R128_PM4_GUI_ACTIVE (1 << 31)
+
+#define RADEON_REG_CP_STAT 0x07c0
+# define RADEON_CSQ_PRIMARY_BUSY (1 << 10)
+# define RADEON_CSQ_INDIRECT_BUSY (1 << 11)
+
+#define RADEON_REG_ME_CNTL 0x07d0
+# define RADEON_ME_MODE_FREE_RUN (1 << 30)
+
+#define ATI_REG_MICROCODE_RAM_ADDR 0x07d4
+#define ATI_REG_MICROCODE_RAM_RADDR 0x07d8
+#define ATI_REG_MICROCODE_RAM_DATAH 0x07dc
+#define ATI_REG_MICROCODE_RAM_DATAL 0x07e0
+#define R128_REG_PM4_BUFFER_ADDR 0x07f0
+
+#define RADEON_REG_CP_CSQ_STAT 0x07f8
+# define RADEON_CSQ_RPTR_PRIMARY_MASK (0xff << 0)
+# define RADEON_CSQ_WPTR_PRIMARY_MASK (0xff << 8)
+# define RADEON_CSQ_RPTR_INDIRECT_MASK (0xff << 16)
+# define RADEON_CSQ_WPTR_INDIRECT_MASK (0xff << 24)
+# define R200_CSQ_RPTR_PRIMARY_MASK (0x1ff << 0)
+# define R200_CSQ_WPTR_PRIMARY_MASK (0x1ff << 9)
+
+#define R128_REG_PM4_MICRO_CNTL 0x07fc
+# define R128_PM4_MICRO_FREERUN (1 << 30)
+
+#define RADEON_TV_MASTER_CNTL 0x0800
+# define RADEON_TV_MACROVISION (1 << 5)
+# define RADEON_TVCLK_ALWAYS_ON (1 << 30)
+
+#define R128_REG_BM_CHUNK_0_VAL 0x0a18
+# define R128_BM_PTR_FORCE_TO_PCI (1 << 21)
+# define R128_BM_PM4_RD_FORCE_TO_PCI (1 << 22)
+# define R128_BM_GLOBAL_FORCE_TO_PCI (1 << 23)
+
+/* Offset of the PCI config space mirror */
+#define ATI_PCI_CFG_OFFSET 0x0f00
+
+#define ATI_REG_PCI_CFG_STATUS 0x0f06
+# define ATI_CAP_LIST 0x0010
+
+#define ATI_REG_PCI_CFG_CAPABILITIES_PTR 0x0f34
+# define ATI_CAP_PTR_MASK 0x00fc
+# define ATI_CAP_ID_NULL 0x0000 /* End of capability list */
+# define ATI_CAP_ID_AGP 0x0002 /* AGP capability ID */
+
+#define R128_REG_AGP_STATUS 0x0f54 /* PCI */
+# define R128_AGP_1X_MODE 0x01
+# define R128_AGP_2X_MODE 0x02
+# define R128_AGP_4X_MODE 0x04
+# define R128_AGP_MODE_MASK 0x07
+
+#define R128_REG_AGP_COMMAND 0x0f58
+# define R128_AGP_ENABLE (1 << 8)
+
+#define RADEON_REG_AGP_STATUS 0x0f5c /* PCI */
+# define RADEON_AGP_1X_MODE 0x01
+# define RADEON_AGP_2X_MODE 0x02
+# define RADEON_AGP_4X_MODE 0x04
+# define RADEON_AGP_FW_MODE 0x10
+# define RADEON_AGP_MODE_MASK 0x17
+
+#define RADEON_REG_AGP_COMMAND 0x0f60
+# define RADEON_AGP_ENABLE (1 << 8)
+
+#define R128_REG_PM4_FIFO_DATA_EVEN 0x1000
+#define R128_REG_PM4_FIFO_DATA_ODD 0x1004
+
+#define RADEON_REG_CSQ_APER_PRIMARY 0x1000
+#define RADEON_REG_CSQ_APER_PRIMARY_END 0x11fc
+#define RADEON_REG_CSQ_APER_INDIRECT 0x1300
+#define RADEON_REG_CSQ_APER_INDIRECT_END 0x13fc
+#define ATI_REG_SRC_PITCH_OFFSET 0x1428
+#define ATI_REG_DST_PITCH_OFFSET 0x142c
+#define ATI_REG_SRC_Y_X 0x1434
+#define ATI_REG_DST_Y_X 0x1438
+#define ATI_REG_DST_HEIGHT_WIDTH 0x143c
+
+#define ATI_REG_DP_GUI_MASTER_CNTL 0x146c
+# define ATI_GMC_SRC_PITCH_OFFSET_CNTL (1 << 0)
+# define ATI_GMC_DST_PITCH_OFFSET_CNTL (1 << 1)
+# define ATI_GMC_SRC_CLIPPING (1 << 2)
+# define ATI_GMC_DST_CLIPPING (1 << 3)
+# define ATI_GMC_BRUSH_SOLID_COLOR (13 << 4)
+# define ATI_GMC_BRUSH_NONE (15 << 4)
+# define ATI_GMC_BRUSH_MASK (15 << 4)
+# define ATI_GMC_DST_DATATYPE_MASK (0xf << 8)
+# define ATI_GMC_SRC_DATATYPE_COLOR (3 << 12)
+# define R128_GMC_CONVERSION_TEMP (1 << 15)
+# define R128_GMC_CONVERSION_TEMP_6500 (0 << 15)
+# define R128_GMC_CONVERSION_TEMP_9300 (1 << 15)
+# define ATI_GMC_ROP3_MASK (0xff << 16)
+# define ATI_DP_SRC_SOURCE_MEMORY (2 << 24)
+# define ATI_DP_SRC_SOURCE_HOST_DATA (3 << 24)
+# define R128_GMC_3D_FCN_EN (1 << 27)
+# define ATI_GMC_CLR_CMP_CNTL_DIS (1 << 28)
+# define R128_GMC_AUX_CLIP_DIS (1 << 29)
+# define ATI_GMC_WR_MSK_DIS (1 << 30)
+# define R128_GMC_LD_BRUSH_Y_X (1 << 31)
+
+#define ATI_REG_DP_BRUSH_FRGD_CLR 0x147c
+#define ATI_REG_DST_WIDTH_HEIGHT 0x1598
+#define ATI_REG_CLR_CMP_CNTL 0x15c0
+
+#define R128_REG_AUX_SC_CNTL 0x1660
+# define R128_AUX1_SC_ENB (1 << 0)
+# define R128_AUX1_SC_MODE_SUB (1 << 1)
+# define R128_AUX2_SC_ENB (1 << 0)
+# define R128_AUX2_SC_MODE_SUB (1 << 1)
+# define R128_AUX3_SC_ENB (1 << 0)
+# define R128_AUX3_SC_MODE_SUB (1 << 1)
+
+#define R128_REG_AUX1_SC_LEFT 0x1664
+#define R128_REG_AUX1_SC_RIGHT 0x1668
+#define R128_REG_AUX1_SC_TOP 0x166c
+#define R128_REG_AUX1_SC_BOTTOM 0x1670
+#define R128_REG_AUX2_SC_LEFT 0x1674
+#define R128_REG_AUX2_SC_RIGHT 0x1678
+#define R128_REG_AUX2_SC_TOP 0x167c
+#define R128_REG_AUX2_SC_BOTTOM 0x1680
+#define R128_REG_AUX3_SC_LEFT 0x1684
+#define R128_REG_AUX3_SC_RIGHT 0x1688
+#define R128_REG_AUX3_SC_TOP 0x168c
+#define R128_REG_AUX3_SC_BOTTOM 0x1690
+
+#define ATI_REG_DP_CNTL 0x16c0
+# define ATI_DST_X_LEFT_TO_RIGHT (1 << 0)
+# define ATI_DST_Y_TOP_TO_BOTTOM (1 << 1)
+
+#define ATI_REG_DP_MIX 0x16c8
+#define ATI_REG_DP_WRITE_MASK 0x16cc
+#define ATI_REG_DEFAULT_OFFSET 0x16e0
+#define ATI_REG_DEFAULT_PITCH 0x16e4
+
+#define ATI_REG_DEFAULT_SC_BOTTOM_RIGHT 0x16e8
+# define ATI_DEFAULT_SC_RIGHT_MAX 0x00001fff
+# define ATI_DEFAULT_SC_BOTTOM_MAX 0x1fff0000
+
+#define ATI_REG_SC_TOP_LEFT 0x16ec
+#define ATI_REG_SC_BOTTOM_RIGHT 0x16f0
+
+#define ATI_REG_WAIT_UNTIL 0x1720
+# define ATI_WAIT_CRTC_PFLIP (1 << 0)
+# define ATI_WAIT_RE_CRTC_VLINE (1 << 1)
+# define ATI_WAIT_FE_CRTC_VLINE (1 << 2)
+# define ATI_WAIT_CRTC_VLINE (1 << 3)
+# define ATI_WAIT_DMA_VIPH0_IDLE (1 << 4)
+# define ATI_WAIT_DMA_VIPH1_IDLE (1 << 5)
+# define ATI_WAIT_DMA_VIPH2_IDLE (1 << 6)
+# define ATI_WAIT_DMA_VIPH3_IDLE (1 << 7)
+# define ATI_WAIT_DMA_VID_IDLE (1 << 8)
+# define ATI_WAIT_DMA_GUI_IDLE (1 << 9)
+# define ATI_WAIT_CMDFIFO (1 << 10)
+# define ATI_WAIT_OV0_FLIP (1 << 11)
+# define RADEON_WAIT_OV0_SLICEDONE (1 << 12)
+# define RADEON_WAIT_2D_IDLE (1 << 14)
+# define RADEON_WAIT_3D_IDLE (1 << 15)
+# define RADEON_WAIT_2D_IDLECLEAN (1 << 16)
+# define RADEON_WAIT_3D_IDLECLEAN (1 << 17)
+# define RADEON_WAIT_HOST_IDLECLEAN (1 << 18)
+# define ATI_WAIT_CMDFIFO_ENTRIES (0x07f00000)
+# define RADEON_WAIT_BOTH_CRTC_PFLIP (1 << 30)
+# define RADEON_ENG_DISPLAY_SELECT (1 << 31)
+
+#define RADEON_REG_ISYNC_CNTL 0x1724
+#define ISYNC_ANY2D_IDLE3D 0x1
+#define ISYNC_ANY3D_IDLE2D 0x2
+
+#define R128_REG_GUI_STAT 0x1740
+# define R128_GUI_ACTIVE (1 << 31)
+
+#define R128_REG_PC_GUI_MODE 0x1744
+#define R128_PC_GUI_PRIORITY (1 << 0)
+#define R128_PC_RISE_DF_EN (1 << 1)
+#define R128_PC_FALL_DF_EN (1 << 2)
+#define R128_PC_BYPASS_EN (1 << 3)
+#define R128_PC_CACHE_SIZE (1 << 4)
+#define R128_PC_IGNORE_UNIFY (1 << 5)
+#define R128_PC_IGNORE_WRHINT (1 << 6)
+#define R128_PC_IGNORE_RDHINT (1 << 7)
+#define R128_PC_RISE_DP_EN (1 << 8)
+
+#define R128_REG_PC_GUI_CTLSTAT 0x1748
+/* bits match R128_REG_PC_NGUI_CTLSTAT */
+
+#define R128_REG_TEX_CNTL 0x1800
+#define R128_REG_SECONDARY_SCALE_OFFSET 0x1980
+#define R128_REG_SECONDARY_SCALE_PITCH 0x1980
+#define R128_REG_SECONDARY_SCALE_X_INC 0x1984
+#define R128_REG_SECONDARY_SCALE_Y_INC 0x1988
+#define R128_REG_SECONDARY_SCALE_HACC 0x198c
+#define R128_REG_SECONDARY_SCALE_VACC 0x1990
+#define R128_REG_SCALE_SRC_HEIGHT_WIDTH 0x1994
+#define R128_REG_SCALE_OFFSET_0 0x1998
+#define R128_REG_SCALE_PITCH 0x199c
+#define R128_REG_SCALE_X_INC 0x19a0
+#define R128_REG_SCALE_Y_INC 0x19a4
+#define R128_REG_SCALE_HACC 0x19a8
+#define R128_REG_SCALE_VACC 0x19ac
+#define R128_REG_SCALE_DST_X_Y 0x19b0
+#define R128_REG_SCALE_DST_HEIGHT_WIDTH 0x19b4
+
+#define R128_REG_SCALE_3D_CNTL 0x1a00
+# define R128_SCALE_DITHER_ERR_DIFF (0 << 1)
+# define R128_SCALE_DITHER_TABLE (1 << 1)
+# define R128_TEX_CACHE_SIZE_FULL (0 << 2)
+# define R128_TEX_CACHE_SIZE_HALF (1 << 2)
+# define R128_DITHER_INIT_CURR (0 << 3)
+# define R128_DITHER_INIT_RESET (1 << 3)
+# define R128_ROUND_24BIT (1 << 4)
+# define R128_TEX_CACHE_DISABLE (1 << 5)
+# define R128_SCALE_3D_NOOP (0 << 6)
+# define R128_SCALE_3D_SCALE (1 << 6)
+# define R128_SCALE_3D_TEXMAP_SHADE (2 << 6)
+# define R128_SCALE_PIX_BLEND (0 << 8)
+# define R128_SCALE_PIX_REPLICATE (1 << 8)
+# define R128_TEX_CACHE_SPLIT (1 << 9)
+# define R128_APPLE_YUV_MODE (1 << 10)
+# define R128_TEX_CACHE_PALLETE_MODE (1 << 11)
+# define R128_ALPHA_COMB_ADD_CLAMP (0 << 12)
+# define R128_ALPHA_COMB_ADD_NCLAMP (1 << 12)
+# define R128_ALPHA_COMB_SUB_DST_SRC_CLAMP (2 << 12)
+# define R128_ALPHA_COMB_SUB_DST_SRC_NCLAMP (3 << 12)
+# define R128_FOG_TABLE (1 << 14)
+# define R128_SIGNED_DST_CLAMP (1 << 15)
+/* Alpha bits from R128_REG_MISC_3D_CNTL */
+# define R128_COMPOSITE_SHADOW_CMP_EQUAL (0 << 28)
+# define R128_COMPOSITE_SHADOW_CMP_NEQUAL (1 << 28)
+# define R128_COMPOSITE_SHADOW (1 << 29)
+# define R128_TEX_MAP_ALPHA_IN_TEXTURE (1 << 30)
+# define R128_TEX_CACHE_LINE_SIZE_8QW (0 << 31)
+# define R128_TEX_CACHE_LINE_SIZE_4QW (1 << 31)
+
+#define R128_REG_SCALE_3D_DATATYPE 0x1a20
+
+#define R128_REG_SETUP_CNTL 0x1bc4
+# define R128_DONT_START_TRIANGLE (1 << 0)
+# define R128_Z_BIAS (0 << 1)
+# define R128_DONT_START_ANY_ON (1 << 2)
+# define R128_COLOR_SOLID_COLOR (0 << 3)
+# define R128_COLOR_FLAT_VERT_1 (1 << 3)
+# define R128_COLOR_FLAT_VERT_2 (2 << 3)
+# define R128_COLOR_FLAT_VERT_3 (3 << 3)
+# define R128_COLOR_GOURAUD (4 << 3)
+# define R128_PRIM_TYPE_TRI (0 << 7)
+# define R128_PRIM_TYPE_LINE (1 << 7)
+# define R128_PRIM_TYPE_POINT (2 << 7)
+# define R128_PRIM_TYPE_POLY_EDGE (3 << 7)
+# define R128_TEXTURE_ST_MULT_W (0 << 9)
+# define R128_TEXTURE_ST_DIRECT (1 << 9)
+# define R128_STARTING_VERTEX_1 (1 << 14)
+# define R128_STARTING_VERTEX_2 (2 << 14)
+# define R128_STARTING_VERTEX_3 (3 << 14)
+# define R128_ENDING_VERTEX_1 (1 << 16)
+# define R128_ENDING_VERTEX_2 (2 << 16)
+# define R128_ENDING_VERTEX_3 (3 << 16)
+# define R128_SU_POLY_LINE_LAST (0 << 18)
+# define R128_SU_POLY_LINE_NOT_LAST (1 << 18)
+# define R128_SUB_PIX_2BITS (0 << 19)
+# define R128_SUB_PIX_4BITS (1 << 19)
+# define R128_SET_UP_CONTINUE (1 << 31)
+
+#define R128_REG_WINDOW_XY_OFFSET 0x1bcc
+
+#define RADEON_REG_RB3D_BLENDCNTL 0x1c20
+# define RADEON_COMB_FCN_MASK (3 << 12)
+# define RADEON_COMB_FCN_ADD_CLAMP (0 << 12)
+# define RADEON_COMB_FCN_ADD_NOCLAMP (1 << 12)
+# define RADEON_COMB_FCN_SUB_CLAMP (2 << 12)
+# define RADEON_COMB_FCN_SUB_NOCLAMP (3 << 12)
+# define R200_COMB_FCN_MIN (4 << 12)
+# define R200_COMB_FCN_MAX (5 << 12)
+# define R200_COMB_FCN_RSUB_CLAMP (6 << 12)
+# define R200_COMB_FCN_RSUB_NOCLAMP (7 << 12)
+# define RADEON_SBLEND_GL_ZERO (32 << 16)
+# define RADEON_SBLEND_GL_ONE (33 << 16)
+# define RADEON_SBLEND_GL_SRC_COLOR (34 << 16)
+# define RADEON_SBLEND_GL_INV_SRC_COLOR (35 << 16)
+# define RADEON_SBLEND_GL_DST_COLOR (36 << 16)
+# define RADEON_SBLEND_GL_INV_DST_COLOR (37 << 16)
+# define RADEON_SBLEND_GL_SRC_ALPHA (38 << 16)
+# define RADEON_SBLEND_GL_INV_SRC_ALPHA (39 << 16)
+# define RADEON_SBLEND_GL_DST_ALPHA (40 << 16)
+# define RADEON_SBLEND_GL_INV_DST_ALPHA (41 << 16)
+# define RADEON_SBLEND_GL_SRC_ALPHA_SATURATE (42 << 16)
+# define R200_SBLEND_GL_CONST_COLOR (43 << 16)
+# define R200_SBLEND_GL_ONE_MINUS_CONST_COLOR (44 << 16)
+# define R200_SBLEND_GL_CONST_ALPHA (45 << 16)
+# define R200_SBLEND_GL_ONE_MINUS_CONST_ALPHA (46 << 16)
+# define RADEON_SBLEND_MASK (63 << 16)
+# define RADEON_DBLEND_GL_ZERO (32 << 24)
+# define RADEON_DBLEND_GL_ONE (33 << 24)
+# define RADEON_DBLEND_GL_SRC_COLOR (34 << 24)
+# define RADEON_DBLEND_GL_INV_SRC_COLOR (35 << 24)
+# define RADEON_DBLEND_GL_DST_COLOR (36 << 24)
+# define RADEON_DBLEND_GL_INV_DST_COLOR (37 << 24)
+# define RADEON_DBLEND_GL_SRC_ALPHA (38 << 24)
+# define RADEON_DBLEND_GL_INV_SRC_ALPHA (39 << 24)
+# define RADEON_DBLEND_GL_DST_ALPHA (40 << 24)
+# define RADEON_DBLEND_GL_INV_DST_ALPHA (41 << 24)
+# define R200_DBLEND_GL_CONST_COLOR (43 << 24)
+# define R200_DBLEND_GL_ONE_MINUS_CONST_COLOR (44 << 24)
+# define R200_DBLEND_GL_CONST_ALPHA (45 << 24)
+# define R200_DBLEND_GL_ONE_MINUS_CONST_ALPHA (46 << 24)
+# define RADEON_DBLEND_MASK (63 << 24)
+
+#define RADEON_REG_PP_CNTL 0x1c38
+# define RADEON_STIPPLE_ENABLE (1 << 0)
+# define RADEON_SCISSOR_ENABLE (1 << 1)
+# define RADEON_PATTERN_ENABLE (1 << 2)
+# define RADEON_SHADOW_ENABLE (1 << 3)
+# define RADEON_TEX_ENABLE_MASK (0xf << 4)
+# define RADEON_TEX_0_ENABLE (1 << 4)
+# define RADEON_TEX_1_ENABLE (1 << 5)
+# define RADEON_TEX_2_ENABLE (1 << 6)
+# define RADEON_TEX_3_ENABLE (1 << 7)
+# define R200_TEX_4_ENABLE (1 << 8)
+# define R200_TEX_5_ENABLE (1 << 9)
+# define RADEON_TEX_BLEND_ENABLE_MASK (0xf << 12)
+# define RADEON_TEX_BLEND_0_ENABLE (1 << 12)
+# define RADEON_TEX_BLEND_1_ENABLE (1 << 13)
+# define RADEON_TEX_BLEND_2_ENABLE (1 << 14)
+# define RADEON_TEX_BLEND_3_ENABLE (1 << 15)
+# define R200_TEX_BLEND_4_ENABLE (1 << 16)
+# define R200_TEX_BLEND_5_ENABLE (1 << 17)
+# define R200_TEX_BLEND_6_ENABLE (1 << 18)
+# define RADEON_PLANAR_YUV_ENABLE (1 << 20)
+# define RADEON_SPECULAR_ENABLE (1 << 21)
+# define RADEON_FOG_ENABLE (1 << 22)
+# define RADEON_ALPHA_TEST_ENABLE (1 << 23)
+# define RADEON_ANTI_ALIAS_NONE (0 << 24)
+# define RADEON_ANTI_ALIAS_LINE (1 << 24)
+# define RADEON_ANTI_ALIAS_POLY (2 << 24)
+# define RADEON_ANTI_ALIAS_LINE_POLY (3 << 24)
+# define RADEON_BUMP_MAP_ENABLE (1 << 26)
+# define RADEON_BUMPED_MAP_T0 (0 << 27)
+# define RADEON_BUMPED_MAP_T1 (1 << 27)
+# define RADEON_BUMPED_MAP_T2 (2 << 27)
+# define RADEON_TEX_3D_ENABLE_0 (1 << 29)
+# define RADEON_TEX_3D_ENABLE_1 (1 << 30)
+# define RADEON_MC_ENABLE (1 << 31)
+
+#define RADEON_REG_RB3D_CNTL 0x1c3c
+# define RADEON_ALPHA_BLEND_ENABLE (1 << 0)
+# define RADEON_PLANE_MASK_ENABLE (1 << 1)
+# define RADEON_DITHER_ENABLE (1 << 2)
+# define RADEON_ROUND_ENABLE (1 << 3)
+# define RADEON_SCALE_DITHER_ENABLE (1 << 4)
+# define RADEON_DITHER_INIT (1 << 5)
+# define RADEON_ROP_ENABLE (1 << 6)
+# define RADEON_STENCIL_ENABLE (1 << 7)
+# define RADEON_Z_ENABLE (1 << 8)
+# define RADEON_DEPTH_XZ_OFFEST_ENABLE (1 << 9)
+# define RADEON_COLOR_FORMAT_ARGB1555 (3 << 10)
+# define RADEON_COLOR_FORMAT_RGB565 (4 << 10)
+# define RADEON_COLOR_FORMAT_ARGB8888 (6 << 10)
+# define RADEON_COLOR_FORMAT_RGB332 (7 << 10)
+# define RADEON_COLOR_FORMAT_Y8 (8 << 10)
+# define RADEON_COLOR_FORMAT_RGB8 (9 << 10)
+# define RADEON_COLOR_FORMAT_YUV422_VYUY (11 << 10)
+# define RADEON_COLOR_FORMAT_YUV422_YVYU (12 << 10)
+# define RADEON_COLOR_FORMAT_aYUV444 (14 << 10)
+# define RADEON_COLOR_FORMAT_ARGB4444 (15 << 10)
+# define RADEON_CLRCMP_FLIP_ENABLE (1 << 14)
+
+#define RADEON_REG_RB3D_COLOROFFSET 0x1c40
+# define RADEON_COLOROFFSET_MASK 0xfffffff0
+
+#define RADEON_REG_RE_WIDTH_HEIGHT 0x1c44
+
+#define RADEON_REG_RB3D_COLORPITCH 0x1c48
+# define RADEON_COLORPITCH_MASK 0x000001ff8
+# define RADEON_COLOR_TILE_ENABLE (1 << 16)
+# define RADEON_COLOR_MICROTILE_ENABLE (1 << 17)
+# define RADEON_COLOR_ENDIAN_NO_SWAP (0 << 18)
+# define RADEON_COLOR_ENDIAN_WORD_SWAP (1 << 18)
+# define RADEON_COLOR_ENDIAN_DWORD_SWAP (2 << 18)
+
+#define RADEON_REG_SE_CNTL 0x1c4c
+# define RADEON_FFACE_CULL_CW (0 << 0)
+# define RADEON_FFACE_CULL_CCW (1 << 0)
+# define RADEON_FFACE_CULL_DIR_MASK (1 << 0)
+# define RADEON_BFACE_CULL (0 << 1)
+# define RADEON_BFACE_SOLID (3 << 1)
+# define RADEON_FFACE_CULL (0 << 3)
+# define RADEON_FFACE_SOLID (3 << 3)
+# define RADEON_FFACE_CULL_MASK (3 << 3)
+# define RADEON_BADVTX_CULL_DISABLE (1 << 5)
+# define RADEON_FLAT_SHADE_VTX_0 (0 << 6)
+# define RADEON_FLAT_SHADE_VTX_1 (1 << 6)
+# define RADEON_FLAT_SHADE_VTX_2 (2 << 6)
+# define RADEON_FLAT_SHADE_VTX_LAST (3 << 6)
+# define RADEON_DIFFUSE_SHADE_SOLID (0 << 8)
+# define RADEON_DIFFUSE_SHADE_FLAT (1 << 8)
+# define RADEON_DIFFUSE_SHADE_GOURAUD (2 << 8)
+# define RADEON_DIFFUSE_SHADE_MASK (3 << 8)
+# define RADEON_ALPHA_SHADE_SOLID (0 << 10)
+# define RADEON_ALPHA_SHADE_FLAT (1 << 10)
+# define RADEON_ALPHA_SHADE_GOURAUD (2 << 10)
+# define RADEON_ALPHA_SHADE_MASK (3 << 10)
+# define RADEON_SPECULAR_SHADE_SOLID (0 << 12)
+# define RADEON_SPECULAR_SHADE_FLAT (1 << 12)
+# define RADEON_SPECULAR_SHADE_GOURAUD (2 << 12)
+# define RADEON_SPECULAR_SHADE_MASK (3 << 12)
+# define RADEON_FOG_SHADE_SOLID (0 << 14)
+# define RADEON_FOG_SHADE_FLAT (1 << 14)
+# define RADEON_FOG_SHADE_GOURAUD (2 << 14)
+# define RADEON_FOG_SHADE_MASK (3 << 14)
+# define RADEON_ZBIAS_ENABLE_POINT (1 << 16)
+# define RADEON_ZBIAS_ENABLE_LINE (1 << 17)
+# define RADEON_ZBIAS_ENABLE_TRI (1 << 18)
+# define RADEON_WIDELINE_ENABLE (1 << 20)
+# define RADEON_VPORT_XY_XFORM_ENABLE (1 << 24)
+# define RADEON_VPORT_Z_XFORM_ENABLE (1 << 25)
+# define RADEON_VTX_PIX_CENTER_D3D (0 << 27)
+# define RADEON_VTX_PIX_CENTER_OGL (1 << 27)
+# define RADEON_ROUND_MODE_TRUNC (0 << 28)
+# define RADEON_ROUND_MODE_ROUND (1 << 28)
+# define RADEON_ROUND_MODE_ROUND_EVEN (2 << 28)
+# define RADEON_ROUND_MODE_ROUND_ODD (3 << 28)
+# define RADEON_ROUND_PREC_16TH_PIX (0 << 30)
+# define RADEON_ROUND_PREC_8TH_PIX (1 << 30)
+# define RADEON_ROUND_PREC_4TH_PIX (2 << 30)
+# define RADEON_ROUND_PREC_HALF_PIX (3 << 30)
+
+#define R200_REG_RE_CNTL 0x1c50
+
+#define RADEON_REG_SE_COORD_FMT 0x1c50
+# define RADEON_VTX_XY_PRE_MULT_1_OVER_W0 (1 << 0)
+# define RADEON_VTX_Z_PRE_MULT_1_OVER_W0 (1 << 1)
+# define RADEON_VTX_ST0_NONPARAMETRIC (1 << 8)
+# define RADEON_VTX_ST1_NONPARAMETRIC (1 << 9)
+# define RADEON_VTX_ST2_NONPARAMETRIC (1 << 10)
+# define RADEON_VTX_ST3_NONPARAMETRIC (1 << 11)
+# define RADEON_VTX_W0_NORMALIZE (1 << 12)
+# define RADEON_VTX_W0_IS_NOT_1_OVER_W0 (1 << 16)
+# define RADEON_VTX_ST0_PRE_MULT_1_OVER_W0 (1 << 17)
+# define RADEON_VTX_ST1_PRE_MULT_1_OVER_W0 (1 << 19)
+# define RADEON_VTX_ST2_PRE_MULT_1_OVER_W0 (1 << 21)
+# define RADEON_VTX_ST3_PRE_MULT_1_OVER_W0 (1 << 23)
+# define RADEON_TEX1_W_ROUTING_USE_W0 (0 << 26)
+# define RADEON_TEX1_W_ROUTING_USE_Q1 (1 << 26)
+
+#define RADEON_REG_PP_TXFILTER_0 0x1c54
+#define RADEON_REG_PP_TXFILTER_1 0x1c6c
+#define RADEON_REG_PP_TXFILTER_2 0x1c84
+# define RADEON_MAG_FILTER_NEAREST (0 << 0)
+# define RADEON_MAG_FILTER_LINEAR (1 << 0)
+# define RADEON_MAG_FILTER_MASK (1 << 0)
+# define RADEON_MIN_FILTER_NEAREST (0 << 1)
+# define RADEON_MIN_FILTER_LINEAR (1 << 1)
+# define RADEON_MIN_FILTER_NEAREST_MIP_NEAREST (2 << 1)
+# define RADEON_MIN_FILTER_NEAREST_MIP_LINEAR (3 << 1)
+# define RADEON_MIN_FILTER_LINEAR_MIP_NEAREST (6 << 1)
+# define RADEON_MIN_FILTER_LINEAR_MIP_LINEAR (7 << 1)
+# define RADEON_MIN_FILTER_ANISO_NEAREST (8 << 1)
+# define RADEON_MIN_FILTER_ANISO_LINEAR (9 << 1)
+# define RADEON_MIN_FILTER_ANISO_NEAREST_MIP_NEAREST (10 << 1)
+# define RADEON_MIN_FILTER_ANISO_NEAREST_MIP_LINEAR (11 << 1)
+# define RADEON_MIN_FILTER_MASK (15 << 1)
+# define RADEON_MAX_ANISO_1_TO_1 (0 << 5)
+# define RADEON_MAX_ANISO_2_TO_1 (1 << 5)
+# define RADEON_MAX_ANISO_4_TO_1 (2 << 5)
+# define RADEON_MAX_ANISO_8_TO_1 (3 << 5)
+# define RADEON_MAX_ANISO_16_TO_1 (4 << 5)
+# define RADEON_MAX_ANISO_MASK (7 << 5)
+# define RADEON_LOD_BIAS_MASK (0xff << 8)
+# define RADEON_LOD_BIAS_SHIFT 8
+# define RADEON_MAX_MIP_LEVEL_MASK (0x0f << 16)
+# define RADEON_MAX_MIP_LEVEL_SHIFT 16
+# define RADEON_YUV_TO_RGB (1 << 20)
+# define RADEON_YUV_TEMPERATURE_COOL (0 << 21)
+# define RADEON_YUV_TEMPERATURE_HOT (1 << 21)
+# define RADEON_YUV_TEMPERATURE_MASK (1 << 21)
+# define RADEON_WRAPEN_S (1 << 22)
+# define RADEON_CLAMP_S_WRAP (0 << 23)
+# define RADEON_CLAMP_S_MIRROR (1 << 23)
+# define RADEON_CLAMP_S_CLAMP_LAST (2 << 23)
+# define RADEON_CLAMP_S_MIRROR_CLAMP_LAST (3 << 23)
+# define RADEON_CLAMP_S_CLAMP_BORDER (4 << 23)
+# define RADEON_CLAMP_S_MIRROR_CLAMP_BORDER (5 << 23)
+# define RADEON_CLAMP_S_CLAMP_GL (6 << 23)
+# define RADEON_CLAMP_S_MIRROR_CLAMP_GL (7 << 23)
+# define RADEON_CLAMP_S_MASK (7 << 23)
+# define RADEON_WRAPEN_T (1 << 26)
+# define RADEON_CLAMP_T_WRAP (0 << 27)
+# define RADEON_CLAMP_T_MIRROR (1 << 27)
+# define RADEON_CLAMP_T_CLAMP_LAST (2 << 27)
+# define RADEON_CLAMP_T_MIRROR_CLAMP_LAST (3 << 27)
+# define RADEON_CLAMP_T_CLAMP_BORDER (4 << 27)
+# define RADEON_CLAMP_T_MIRROR_CLAMP_BORDER (5 << 27)
+# define RADEON_CLAMP_T_CLAMP_GL (6 << 27)
+# define RADEON_CLAMP_T_MIRROR_CLAMP_GL (7 << 27)
+# define RADEON_CLAMP_T_MASK (7 << 27)
+# define RADEON_BORDER_MODE_OGL (0 << 31)
+# define RADEON_BORDER_MODE_D3D (1 << 31)
+
+#define RADEON_REG_PP_TXFORMAT_0 0x1c58
+#define RADEON_REG_PP_TXFORMAT_1 0x1c70
+#define RADEON_REG_PP_TXFORMAT_2 0x1c88
+# define RADEON_TXFORMAT_I8 (0 << 0)
+# define RADEON_TXFORMAT_AI88 (1 << 0)
+# define RADEON_TXFORMAT_RGB332 (2 << 0)
+# define RADEON_TXFORMAT_ARGB1555 (3 << 0)
+# define RADEON_TXFORMAT_RGB565 (4 << 0)
+# define RADEON_TXFORMAT_ARGB4444 (5 << 0)
+# define RADEON_TXFORMAT_ARGB8888 (6 << 0)
+# define RADEON_TXFORMAT_RGBA8888 (7 << 0)
+# define RADEON_TXFORMAT_Y8 (8 << 0)
+# define RADEON_TXFORMAT_AYUV444 (9 << 0)
+# define RADEON_TXFORMAT_VYUY422 (10 << 0)
+# define RADEON_TXFORMAT_YVYU422 (11 << 0)
+# define RADEON_TXFORMAT_DXT1 (12 << 0)
+# define RADEON_TXFORMAT_DXT23 (14 << 0)
+# define RADEON_TXFORMAT_DXT45 (15 << 0)
+# define RADEON_TXFORMAT_FORMAT_MASK (31 << 0)
+# define RADEON_TXFORMAT_FORMAT_SHIFT 0
+# define RADEON_TXFORMAT_APPLE_YUV_MODE (1 << 5)
+# define RADEON_TXFORMAT_ALPHA_IN_MAP (1 << 6)
+# define RADEON_TXFORMAT_NON_POWER2 (1 << 7)
+# define RADEON_TXFORMAT_WIDTH_MASK (15 << 8)
+# define RADEON_TXFORMAT_WIDTH_SHIFT 8
+# define RADEON_TXFORMAT_HEIGHT_MASK (15 << 12)
+# define RADEON_TXFORMAT_HEIGHT_SHIFT 12
+# define RADEON_TXFORMAT_F5_WIDTH_MASK (15 << 16)
+# define RADEON_TXFORMAT_F5_WIDTH_SHIFT 16
+# define RADEON_TXFORMAT_F5_HEIGHT_MASK (15 << 20)
+# define RADEON_TXFORMAT_F5_HEIGHT_SHIFT 20
+# define RADEON_TXFORMAT_ST_ROUTE_STQ0 (0 << 24)
+# define RADEON_TXFORMAT_ST_ROUTE_STQ1 (1 << 24)
+# define RADEON_TXFORMAT_ST_ROUTE_STQ2 (2 << 24)
+# define RADEON_TXFORMAT_ST_ROUTE_MASK (3 << 24)
+# define RADEON_TXFORMAT_ENDIAN_NO_SWAP (0 << 26)
+# define RADEON_TXFORMAT_ENDIAN_16BPP_SWAP (1 << 26)
+# define RADEON_TXFORMAT_ENDIAN_32BPP_SWAP (2 << 26)
+# define RADEON_TXFORMAT_ENDIAN_HALFDW_SWAP (3 << 26)
+# define RADEON_TXFORMAT_ALPHA_MASK_ENABLE (1 << 28)
+# define RADEON_TXFORMAT_CHROMA_KEY_ENABLE (1 << 29)
+# define RADEON_TXFORMAT_CUBIC_MAP_ENABLE (1 << 30)
+# define RADEON_TXFORMAT_PERSPECTIVE_ENABLE (1 << 31)
+
+#define RADEON_REG_PP_TXOFFSET_0 0x1c5c
+#define RADEON_REG_PP_TXOFFSET_1 0x1c74
+#define RADEON_REG_PP_TXOFFSET_2 0x1c8c
+# define RADEON_TXO_ENDIAN_NO_SWAP (0 << 0)
+# define RADEON_TXO_ENDIAN_BYTE_SWAP (1 << 0)
+# define RADEON_TXO_ENDIAN_WORD_SWAP (2 << 0)
+# define RADEON_TXO_ENDIAN_HALFDW_SWAP (3 << 0)
+# define RADEON_TXO_MACRO_LINEAR (0 << 2)
+# define RADEON_TXO_MACRO_TILE (1 << 2)
+# define RADEON_TXO_MICRO_LINEAR (0 << 3)
+# define RADEON_TXO_MICRO_TILE_X2 (1 << 3)
+# define RADEON_TXO_MICRO_TILE_OPT (2 << 3)
+# define RADEON_TXO_OFFSET_MASK 0xffffffe0
+# define RADEON_TXO_OFFSET_SHIFT 5
+
+#define RADEON_REG_PP_TXCBLEND_0 0x1c60
+#define RADEON_REG_PP_TXCBLEND_1 0x1c78
+#define RADEON_REG_PP_TXCBLEND_2 0x1c90
+# define RADEON_COLOR_ARG_A_SHIFT 0
+# define RADEON_COLOR_ARG_A_MASK (0x1f << 0)
+# define RADEON_COLOR_ARG_A_ZERO (0 << 0)
+# define RADEON_COLOR_ARG_A_CURRENT_COLOR (2 << 0)
+# define RADEON_COLOR_ARG_A_CURRENT_ALPHA (3 << 0)
+# define RADEON_COLOR_ARG_A_DIFFUSE_COLOR (4 << 0)
+# define RADEON_COLOR_ARG_A_DIFFUSE_ALPHA (5 << 0)
+# define RADEON_COLOR_ARG_A_SPECULAR_COLOR (6 << 0)
+# define RADEON_COLOR_ARG_A_SPECULAR_ALPHA (7 << 0)
+# define RADEON_COLOR_ARG_A_TFACTOR_COLOR (8 << 0)
+# define RADEON_COLOR_ARG_A_TFACTOR_ALPHA (9 << 0)
+# define RADEON_COLOR_ARG_A_T0_COLOR (10 << 0)
+# define RADEON_COLOR_ARG_A_T0_ALPHA (11 << 0)
+# define RADEON_COLOR_ARG_A_T1_COLOR (12 << 0)
+# define RADEON_COLOR_ARG_A_T1_ALPHA (13 << 0)
+# define RADEON_COLOR_ARG_A_T2_COLOR (14 << 0)
+# define RADEON_COLOR_ARG_A_T2_ALPHA (15 << 0)
+# define RADEON_COLOR_ARG_A_T3_COLOR (16 << 0)
+# define RADEON_COLOR_ARG_A_T3_ALPHA (17 << 0)
+# define RADEON_COLOR_ARG_B_SHIFT 5
+# define RADEON_COLOR_ARG_B_MASK (0x1f << 5)
+# define RADEON_COLOR_ARG_B_ZERO (0 << 5)
+# define RADEON_COLOR_ARG_B_CURRENT_COLOR (2 << 5)
+# define RADEON_COLOR_ARG_B_CURRENT_ALPHA (3 << 5)
+# define RADEON_COLOR_ARG_B_DIFFUSE_COLOR (4 << 5)
+# define RADEON_COLOR_ARG_B_DIFFUSE_ALPHA (5 << 5)
+# define RADEON_COLOR_ARG_B_SPECULAR_COLOR (6 << 5)
+# define RADEON_COLOR_ARG_B_SPECULAR_ALPHA (7 << 5)
+# define RADEON_COLOR_ARG_B_TFACTOR_COLOR (8 << 5)
+# define RADEON_COLOR_ARG_B_TFACTOR_ALPHA (9 << 5)
+# define RADEON_COLOR_ARG_B_T0_COLOR (10 << 5)
+# define RADEON_COLOR_ARG_B_T0_ALPHA (11 << 5)
+# define RADEON_COLOR_ARG_B_T1_COLOR (12 << 5)
+# define RADEON_COLOR_ARG_B_T1_ALPHA (13 << 5)
+# define RADEON_COLOR_ARG_B_T2_COLOR (14 << 5)
+# define RADEON_COLOR_ARG_B_T2_ALPHA (15 << 5)
+# define RADEON_COLOR_ARG_B_T3_COLOR (16 << 5)
+# define RADEON_COLOR_ARG_B_T3_ALPHA (17 << 5)
+# define RADEON_COLOR_ARG_C_SHIFT 10
+# define RADEON_COLOR_ARG_C_MASK (0x1f << 10)
+# define RADEON_COLOR_ARG_C_ZERO (0 << 10)
+# define RADEON_COLOR_ARG_C_CURRENT_COLOR (2 << 10)
+# define RADEON_COLOR_ARG_C_CURRENT_ALPHA (3 << 10)
+# define RADEON_COLOR_ARG_C_DIFFUSE_COLOR (4 << 10)
+# define RADEON_COLOR_ARG_C_DIFFUSE_ALPHA (5 << 10)
+# define RADEON_COLOR_ARG_C_SPECULAR_COLOR (6 << 10)
+# define RADEON_COLOR_ARG_C_SPECULAR_ALPHA (7 << 10)
+# define RADEON_COLOR_ARG_C_TFACTOR_COLOR (8 << 10)
+# define RADEON_COLOR_ARG_C_TFACTOR_ALPHA (9 << 10)
+# define RADEON_COLOR_ARG_C_T0_COLOR (10 << 10)
+# define RADEON_COLOR_ARG_C_T0_ALPHA (11 << 10)
+# define RADEON_COLOR_ARG_C_T1_COLOR (12 << 10)
+# define RADEON_COLOR_ARG_C_T1_ALPHA (13 << 10)
+# define RADEON_COLOR_ARG_C_T2_COLOR (14 << 10)
+# define RADEON_COLOR_ARG_C_T2_ALPHA (15 << 10)
+# define RADEON_COLOR_ARG_C_T3_COLOR (16 << 10)
+# define RADEON_COLOR_ARG_C_T3_ALPHA (17 << 10)
+# define RADEON_COMP_ARG_A (1 << 15)
+# define RADEON_COMP_ARG_A_SHIFT 15
+# define RADEON_COMP_ARG_B (1 << 16)
+# define RADEON_COMP_ARG_B_SHIFT 16
+# define RADEON_COMP_ARG_C (1 << 17)
+# define RADEON_COMP_ARG_C_SHIFT 17
+# define RADEON_BLEND_CTL_MASK (7 << 18)
+# define RADEON_BLEND_CTL_ADD (0 << 18)
+# define RADEON_BLEND_CTL_SUBTRACT (1 << 18)
+# define RADEON_BLEND_CTL_ADDSIGNED (2 << 18)
+# define RADEON_BLEND_CTL_BLEND (3 << 18)
+# define RADEON_BLEND_CTL_DOT3 (4 << 18)
+# define RADEON_SCALE_SHIFT 21
+# define RADEON_SCALE_MASK (3 << 21)
+# define RADEON_SCALE_1X (0 << 21)
+# define RADEON_SCALE_2X (1 << 21)
+# define RADEON_SCALE_4X (2 << 21)
+# define RADEON_CLAMP_TX (1 << 23)
+# define RADEON_T0_EQ_TCUR (1 << 24)
+# define RADEON_T1_EQ_TCUR (1 << 25)
+# define RADEON_T2_EQ_TCUR (1 << 26)
+# define RADEON_T3_EQ_TCUR (1 << 27)
+# define RADEON_COLOR_ARG_MASK 0x1f
+# define RADEON_COMP_ARG_SHIFT 15
+
+#define RADEON_REG_PP_TXABLEND_0 0x1c64
+#define RADEON_REG_PP_TXABLEND_1 0x1c7c
+#define RADEON_REG_PP_TXABLEND_2 0x1c94
+# define RADEON_ALPHA_ARG_A_SHIFT 0
+# define RADEON_ALPHA_ARG_A_MASK (0xf << 0)
+# define RADEON_ALPHA_ARG_A_ZERO (0 << 0)
+# define RADEON_ALPHA_ARG_A_CURRENT_ALPHA (1 << 0)
+# define RADEON_ALPHA_ARG_A_DIFFUSE_ALPHA (2 << 0)
+# define RADEON_ALPHA_ARG_A_SPECULAR_ALPHA (3 << 0)
+# define RADEON_ALPHA_ARG_A_TFACTOR_ALPHA (4 << 0)
+# define RADEON_ALPHA_ARG_A_T0_ALPHA (5 << 0)
+# define RADEON_ALPHA_ARG_A_T1_ALPHA (6 << 0)
+# define RADEON_ALPHA_ARG_A_T2_ALPHA (7 << 0)
+# define RADEON_ALPHA_ARG_A_T3_ALPHA (8 << 0)
+# define RADEON_ALPHA_ARG_B_SHIFT 4
+# define RADEON_ALPHA_ARG_B_MASK (0xf << 4)
+# define RADEON_ALPHA_ARG_B_ZERO (0 << 4)
+# define RADEON_ALPHA_ARG_B_CURRENT_ALPHA (1 << 4)
+# define RADEON_ALPHA_ARG_B_DIFFUSE_ALPHA (2 << 4)
+# define RADEON_ALPHA_ARG_B_SPECULAR_ALPHA (3 << 4)
+# define RADEON_ALPHA_ARG_B_TFACTOR_ALPHA (4 << 4)
+# define RADEON_ALPHA_ARG_B_T0_ALPHA (5 << 4)
+# define RADEON_ALPHA_ARG_B_T1_ALPHA (6 << 4)
+# define RADEON_ALPHA_ARG_B_T2_ALPHA (7 << 4)
+# define RADEON_ALPHA_ARG_B_T3_ALPHA (8 << 4)
+# define RADEON_ALPHA_ARG_C_SHIFT 8
+# define RADEON_ALPHA_ARG_C_MASK (0xf << 8)
+# define RADEON_ALPHA_ARG_C_ZERO (0 << 8)
+# define RADEON_ALPHA_ARG_C_CURRENT_ALPHA (1 << 8)
+# define RADEON_ALPHA_ARG_C_DIFFUSE_ALPHA (2 << 8)
+# define RADEON_ALPHA_ARG_C_SPECULAR_ALPHA (3 << 8)
+# define RADEON_ALPHA_ARG_C_TFACTOR_ALPHA (4 << 8)
+# define RADEON_ALPHA_ARG_C_T0_ALPHA (5 << 8)
+# define RADEON_ALPHA_ARG_C_T1_ALPHA (6 << 8)
+# define RADEON_ALPHA_ARG_C_T2_ALPHA (7 << 8)
+# define RADEON_ALPHA_ARG_C_T3_ALPHA (8 << 8)
+# define RADEON_DOT_ALPHA_DONT_REPLICATE (1 << 9)
+/* COMP_ARG, BLEND_CNTL, CLAMP_TX same as for CBLEND, T*_EQ_TCUR */
+# define RADEON_ALPHA_ARG_MASK 0xf
+
+#define RADEON_REG_PP_TFACTOR_0 0x1c68
+#define RADEON_REG_PP_TFACTOR_1 0x1c80
+#define RADEON_REG_PP_TFACTOR_2 0x1c98
+
+#define R128_REG_TEX_CNTL_C 0x1c9c
+# define R128_Z_ENABLE (1 << 0)
+# define R128_Z_WRITE_ENABLE (1 << 1)
+# define R128_STENCIL_ENABLE (1 << 3)
+# define R128_SHADE_ENABLE (0 << 4)
+# define R128_TEXMAP_ENABLE (1 << 4)
+# define R128_SEC_TEXMAP_ENABLE (1 << 5)
+# define R128_FOG_ENABLE (1 << 7)
+# define R128_DITHER_ENABLE (1 << 8)
+# define R128_ALPHA_ENABLE (1 << 9)
+# define R128_ALPHA_TEST_ENABLE (1 << 10)
+# define R128_SPEC_LIGHT_ENABLE (1 << 11)
+# define R128_TEX_CHROMA_KEY_ENABLE (1 << 12)
+# define R128_ALPHA_IN_TEX_COMPLETE_A (0 << 13)
+# define R128_ALPHA_IN_TEX_LSB_A (1 << 13)
+# define R128_LIGHT_DIS (0 << 14)
+# define R128_LIGHT_COPY (1 << 14)
+# define R128_LIGHT_MODULATE (2 << 14)
+# define R128_LIGHT_ADD (3 << 14)
+# define R128_LIGHT_BLEND_CONSTANT (4 << 14)
+# define R128_LIGHT_BLEND_TEXTURE (5 << 14)
+# define R128_LIGHT_BLEND_VERTEX (6 << 14)
+# define R128_LIGHT_BLEND_CONST_COLOR (7 << 14)
+# define R128_ALPHA_LIGHT_DIS (0 << 18)
+# define R128_ALPHA_LIGHT_COPY (1 << 18)
+# define R128_ALPHA_LIGHT_MODULATE (2 << 18)
+# define R128_ALPHA_LIGHT_ADD (3 << 18)
+# define R128_ANTI_ALIAS (1 << 21)
+# define R128_TEX_CACHE_FLUSH (1 << 23)
+# define R128_LOD_BIAS_SHIFT 24
+# define R128_LOD_BIAS_MASK (0xff << 24)
+
+#define R128_REG_MISC_3D_STATE_CNTL 0x1ca0
+# define R128_REF_ALPHA_MASK 0xff
+# define R128_MISC_SCALE_3D_NOOP (0 << 8)
+# define R128_MISC_SCALE_3D_SCALE (1 << 8)
+# define R128_MISC_SCALE_3D_TEXMAP_SHADE (2 << 8)
+# define R128_MISC_SCALE_PIX_BLEND (0 << 10)
+# define R128_MISC_SCALE_PIX_REPLICATE (1 << 10)
+# define R128_ALPHA_COMB_ADD_CLAMP (0 << 12)
+# define R128_ALPHA_COMB_ADD_NO_CLAMP (1 << 12)
+# define R128_ALPHA_COMB_SUB_SRC_DST_CLAMP (2 << 12)
+# define R128_ALPHA_COMB_SUB_SRC_DST_NO_CLAMP (3 << 12)
+# define R128_FOG_VERTEX (0 << 14)
+# define R128_FOG_TABLE (1 << 14)
+# define R128_SBLEND_ZERO (0 << 16)
+# define R128_SBLEND_ONE (1 << 16)
+# define R128_SBLEND_SRCCOLOR (2 << 16)
+# define R128_SBLEND_INVSRCCOLOR (3 << 16)
+# define R128_SBLEND_SRC_ALPHA (4 << 16)
+# define R128_SBLEND_INV_SRC_ALPHA (5 << 16)
+# define R128_SBLEND_DST_ALPHA (6 << 16)
+# define R128_SBLEND_INV_DST_ALPHA (7 << 16)
+# define R128_SBLEND_DSTCOLOR (8 << 16)
+# define R128_SBLEND_INVDSTCOLOR (9 << 16)
+# define R128_SBLEND_SRC_ALPHASAT (10 << 16)
+# define R128_SBLEND_BOTHSRC_ALPHA (11 << 16)
+# define R128_SBLEND_BOTHINV_SRC_ALPHA (12 << 16)
+# define R128_SBLEND_MASK (15 << 16)
+# define R128_DBLEND_ZERO (0 << 20)
+# define R128_DBLEND_ONE (1 << 20)
+# define R128_DBLEND_SRCCOLOR (2 << 20)
+# define R128_DBLEND_INVSRCCOLOR (3 << 20)
+# define R128_DBLEND_SRC_ALPHA (4 << 20)
+# define R128_DBLEND_INV_SRC_ALPHA (5 << 20)
+# define R128_DBLEND_DST_ALPHA (6 << 20)
+# define R128_DBLEND_INV_DST_ALPHA (7 << 20)
+# define R128_DBLEND_DSTCOLOR (8 << 20)
+# define R128_DBLEND_INVDSTCOLOR (9 << 20)
+# define R128_DBLEND_SRC_ALPHASAT (10 << 20)
+# define R128_DBLEND_MASK (15 << 20)
+# define R128_ALPHA_TEST_NEVER (0 << 24)
+# define R128_ALPHA_TEST_LESS (1 << 24)
+# define R128_ALPHA_TEST_LESSEQUAL (2 << 24)
+# define R128_ALPHA_TEST_EQUAL (3 << 24)
+# define R128_ALPHA_TEST_GREATEREQUAL (4 << 24)
+# define R128_ALPHA_TEST_GREATER (5 << 24)
+# define R128_ALPHA_TEST_NEQUAL (6 << 24)
+# define R128_ALPHA_TEST_ALWAYS (7 << 24)
+# define R128_ALPHA_TEST_MASK (7 << 24)
+
+#define R128_REG_PRIM_TEX_CNTL_C 0x1cb0
+#define R128_REG_SEC_TEX_CNTL_C 0x1d00
+# define R128_SEC_SELECT_PRIM_ST (0 << 0)
+# define R128_SEC_SELECT_SEC_ST (1 << 0)
+# define R128_MIN_BLEND_NEAREST (0 << 1)
+# define R128_MIN_BLEND_LINEAR (1 << 1)
+# define R128_MIN_BLEND_MIPNEAREST (2 << 1)
+# define R128_MIN_BLEND_MIPLINEAR (3 << 1)
+# define R128_MIN_BLEND_LINEARMIPNEAREST (4 << 1)
+# define R128_MIN_BLEND_LINEARMIPLINEAR (5 << 1)
+# define R128_MIN_BLEND_MASK (7 << 1)
+# define R128_MAG_BLEND_NEAREST (0 << 4)
+# define R128_MAG_BLEND_LINEAR (1 << 4)
+# define R128_MAG_BLEND_MASK (7 << 4)
+# define R128_MIP_MAP_DISABLE (1 << 7)
+# define R128_TEX_CLAMP_S_WRAP (0 << 8)
+# define R128_TEX_CLAMP_S_MIRROR (1 << 8)
+# define R128_TEX_CLAMP_S_CLAMP (2 << 8)
+# define R128_TEX_CLAMP_S_BORDER_COLOR (3 << 8)
+# define R128_TEX_CLAMP_S_MASK (3 << 8)
+# define R128_TEX_WRAP_S (1 << 10)
+# define R128_TEX_CLAMP_T_WRAP (0 << 11)
+# define R128_TEX_CLAMP_T_MIRROR (1 << 11)
+# define R128_TEX_CLAMP_T_CLAMP (2 << 11)
+# define R128_TEX_CLAMP_T_BORDER_COLOR (3 << 11)
+# define R128_TEX_CLAMP_T_MASK (3 << 11)
+# define R128_TEX_WRAP_T (1 << 13)
+# define R128_TEX_PERSPECTIVE_DISABLE (1 << 14)
+# define R128_TEX_DATATYPE_SHIFT 16
+# define R128_PALLETE_EITHER (0 << 20)
+# define R128_PALLETE_1 (1 << 20)
+# define R128_PALLETE_2 (2 << 20)
+# define R128_PSEUDOCOLOR_DT_RGB565 (0 << 24)
+# define R128_PSEUDOCOLOR_DT_ARGB1555 (1 << 24)
+# define R128_PSEUDOCOLOR_DT_ARGB4444 (2 << 24)
+
+#define R128_REG_PRIM_TEXTURE_COMBINE_CNTL_C 0x1cb4
+#define R128_REG_SEC_TEXTURE_COMBINE_CNTL_C 0x1d04
+# define R128_COMB_DIS (0 << 0)
+# define R128_COMB_COPY (1 << 0)
+# define R128_COMB_COPY_INP (2 << 0)
+# define R128_COMB_MODULATE (3 << 0)
+# define R128_COMB_MODULATE2X (4 << 0)
+# define R128_COMB_MODULATE4X (5 << 0)
+# define R128_COMB_ADD (6 << 0)
+# define R128_COMB_ADD_SIGNED (7 << 0)
+# define R128_COMB_BLEND_VERTEX (8 << 0)
+# define R128_COMB_BLEND_TEXTURE (9 << 0)
+# define R128_COMB_BLEND_CONST (10 << 0)
+# define R128_COMB_BLEND_PREMULT (11 << 0)
+# define R128_COMB_BLEND_PREV (12 << 0)
+# define R128_COMB_BLEND_PREMULT_INV (13 << 0)
+# define R128_COMB_ADD_SIGNED2X (14 << 0)
+# define R128_COMB_BLEND_CONST_COLOR (15 << 0)
+# define R128_COMB_MASK (15 << 0)
+# define R128_COLOR_FACTOR_CONST_COLOR (0 << 4)
+# define R128_COLOR_FACTOR_NCONST_COLOR (1 << 4)
+# define R128_COLOR_FACTOR_TEX (4 << 4)
+# define R128_COLOR_FACTOR_NTEX (5 << 4)
+# define R128_COLOR_FACTOR_ALPHA (6 << 4)
+# define R128_COLOR_FACTOR_NALPHA (7 << 4)
+# define R128_COLOR_FACTOR_PREV_COLOR (8 << 4)
+# define R128_COLOR_FACTOR_MASK (15 << 4)
+# define R128_COMB_FCN_MSB (1 << 8)
+# define R128_INPUT_FACTOR_CONST_COLOR (2 << 10)
+# define R128_INPUT_FACTOR_CONST_ALPHA (3 << 10)
+# define R128_INPUT_FACTOR_INT_COLOR (4 << 10)
+# define R128_INPUT_FACTOR_INT_ALPHA (5 << 10)
+# define R128_INPUT_FACTOR_PREV_COLOR (8 << 10) /* SEC only */
+# define R128_INPUT_FACTOR_PREV_ALPHA (9 << 10) /* SEC only */
+# define R128_INPUT_FACTOR_MASK (15 << 10)
+# define R128_COMB_ALPHA_DIS (0 << 14)
+# define R128_COMB_ALPHA_COPY (1 << 14)
+# define R128_COMB_ALPHA_COPY_INP (2 << 14)
+# define R128_COMB_ALPHA_MODULATE (3 << 14)
+# define R128_COMB_ALPHA_MODULATE2X (4 << 14)
+# define R128_COMB_ALPHA_MODULATE4X (5 << 14)
+# define R128_COMB_ALPHA_ADD (6 << 14)
+# define R128_COMB_ALPHA_ADD_SIGNED (7 << 14)
+# define R128_COMB_ALPHA_ADD_SIGNED2X (14 << 14)
+# define R128_COMB_ALPHA_MASK (15 << 14)
+# define R128_ALPHA_FACTOR_TEX_ALPHA (6 << 18)
+# define R128_ALPHA_FACTOR_NTEX_ALPHA (7 << 18)
+# define R128_ALPHA_FACTOR_MASK (15 << 18)
+# define R128_INP_FACTOR_A_CONST_ALPHA (1 << 25)
+# define R128_INP_FACTOR_A_INT_ALPHA (2 << 25)
+# define R128_INP_FACTOR_A_PREV_ALPHA (4 << 25) /* SEC only */
+# define R128_INP_FACTOR_A_MASK (7 << 25)
+
+#define R128_REG_TEX_SIZE_PITCH_C 0x1cb8
+# define R128_TEX_PITCH_SHIFT 0
+# define R128_TEX_SIZE_SHIFT 4
+# define R128_TEX_HEIGHT_SHIFT 8
+# define R128_TEX_MIN_SIZE_SHIFT 12
+# define R128_SEC_TEX_PITCH_SHIFT 16
+# define R128_SEC_TEX_SIZE_SHIFT 20
+# define R128_SEC_TEX_HEIGHT_SHIFT 24
+# define R128_SEC_TEX_MIN_SIZE_SHIFT 28
+# define R128_TEX_PITCH_MASK (0x0f << 0)
+# define R128_TEX_SIZE_MASK (0x0f << 4)
+# define R128_TEX_HEIGHT_MASK (0x0f << 8)
+# define R128_TEX_MIN_SIZE_MASK (0x0f << 12)
+# define R128_SEC_TEX_PITCH_MASK (0x0f << 16)
+# define R128_SEC_TEX_SIZE_MASK (0x0f << 20)
+# define R128_SEC_TEX_HEIGHT_MASK (0x0f << 24)
+# define R128_SEC_TEX_MIN_SIZE_MASK (0x0f << 28)
+# define R128_TEX_SIZE_PITCH_SHIFT 0
+# define R128_SEC_TEX_SIZE_PITCH_SHIFT 16
+# define R128_TEX_SIZE_PITCH_MASK (0xffff << 0)
+# define R128_SEC_TEX_SIZE_PITCH_MASK (0xffff << 16)
+
+#define R128_REG_PRIM_TEX_0_OFFSET_C 0x1cbc
+#define R128_REG_PRIM_TEX_1_OFFSET_C 0x1cc0
+#define R128_REG_PRIM_TEX_2_OFFSET_C 0x1cc4
+#define R128_REG_PRIM_TEX_3_OFFSET_C 0x1cc8
+#define R128_REG_PRIM_TEX_4_OFFSET_C 0x1ccc
+#define R128_REG_PRIM_TEX_5_OFFSET_C 0x1cd0
+#define R128_REG_PRIM_TEX_6_OFFSET_C 0x1cd4
+#define R128_REG_PRIM_TEX_7_OFFSET_C 0x1cd8
+#define R128_REG_PRIM_TEX_8_OFFSET_C 0x1cdc
+#define R128_REG_PRIM_TEX_9_OFFSET_C 0x1ce0
+#define R128_REG_PRIM_TEX_10_OFFSET_C 0x1ce4
+#define R128_REG_SEC_TEX_0_OFFSET_C 0x1d08
+#define R128_REG_SEC_TEX_1_OFFSET_C 0x1d0c
+#define R128_REG_SEC_TEX_2_OFFSET_C 0x1d10
+#define R128_REG_SEC_TEX_3_OFFSET_C 0x1d14
+#define R128_REG_SEC_TEX_4_OFFSET_C 0x1d18
+#define R128_REG_SEC_TEX_5_OFFSET_C 0x1d1c
+#define R128_REG_SEC_TEX_6_OFFSET_C 0x1d20
+#define R128_REG_SEC_TEX_7_OFFSET_C 0x1d24
+#define R128_REG_SEC_TEX_8_OFFSET_C 0x1d28
+#define R128_REG_SEC_TEX_9_OFFSET_C 0x1d2c
+#define R128_REG_SEC_TEX_10_OFFSET_C 0x1d30
+# define R128_TEX_NO_TILE (0 << 30)
+# define R128_TEX_TILED_BY_HOST (1 << 30)
+# define R128_TEX_TILED_BY_STORAGE (2 << 30)
+# define R128_TEX_TILED_BY_STORAGE2 (3 << 30)
+#define R128_REG_CONSTANT_COLOR_C 0x1d34
+# define R128_CONSTANT_BLUE_SHIFT 0
+# define R128_CONSTANT_GREEN_SHIFT 8
+# define R128_CONSTANT_RED_SHIFT 16
+# define R128_CONSTANT_ALPHA_SHIFT 24
+
+#define RADEON_REG_PP_TEX_SIZE_0 0x1d04 /* NPOT */
+#define RADEON_REG_PP_TEX_SIZE_1 0x1d0c /* NPOT */
+#define RADEON_REG_PP_TEX_SIZE_2 0x1d14 /* NPOT */
+# define RADEON_TEX_USIZE_MASK (0x7ff << 0)
+# define RADEON_TEX_USIZE_SHIFT 0
+# define RADEON_TEX_VSIZE_MASK (0x7ff << 16)
+# define RADEON_TEX_VSIZE_SHIFT 16
+# define RADEON_SIGNED_RGB_MASK (1 << 30)
+# define RADEON_SIGNED_RGB_SHIFT 30
+# define RADEON_SIGNED_ALPHA_MASK (1 << 31)
+# define RADEON_SIGNED_ALPHA_SHIFT 31
+
+#define RADEON_REG_PP_TEX_PITCH_0 0x1d08 /* NPOT */
+#define RADEON_REG_PP_TEX_PITCH_1 0x1d10 /* NPOT */
+#define RADEON_REG_PP_TEX_PITCH_2 0x1d18 /* NPOT */
+/* note: bits 13-5: 32 byte aligned stride of texture map */
+
+#define R128_REG_PLANE_3D_MASK_C 0x1d44
+
+#define RADEON_REG_RB3D_PLANEMASK 0x1d84
+
+#define R200_REG_SE_VAP_CNTL 0x2080
+# define R200_VAP_TCL_ENABLE 0x00000001
+# define R200_VAP_SINGLE_BUF_STATE_ENABLE 0x00000010
+# define R200_VAP_FORCE_W_TO_ONE 0x00010000
+# define R200_VAP_D3D_TEX_DEFAULT 0x00020000
+# define R200_VAP_VF_MAX_VTX_NUM__SHIFT 18
+# define R200_VAP_VF_MAX_VTX_NUM (9 << 18)
+# define R200_VAP_DX_CLIP_SPACE_DEF 0x00400000
+
+#define R200_REG_SE_VTX_FMT_0 0x2088
+# define R200_VTX_XY 0 /* always have xy */
+# define R200_VTX_Z0 (1 << 0)
+# define R200_VTX_W0 (1 << 1)
+# define R200_VTX_WEIGHT_COUNT_SHIFT (2)
+# define R200_VTX_PV_MATRIX_SEL (1 << 5)
+# define R200_VTX_N0 (1 << 6)
+# define R200_VTX_POINT_SIZE (1 << 7)
+# define R200_VTX_DISCRETE_FOG (1 << 8)
+# define R200_VTX_SHININESS_0 (1 << 9)
+# define R200_VTX_SHININESS_1 (1 << 10)
+# define R200_VTX_COLOR_NOT_PRESENT 0
+# define R200_VTX_PK_RGBA 1
+# define R200_VTX_FP_RGB 2
+# define R200_VTX_FP_RGBA 3
+# define R200_VTX_COLOR_MASK 3
+# define R200_VTX_COLOR_0_SHIFT 11
+# define R200_VTX_COLOR_1_SHIFT 13
+# define R200_VTX_COLOR_2_SHIFT 15
+# define R200_VTX_COLOR_3_SHIFT 17
+# define R200_VTX_COLOR_4_SHIFT 19
+# define R200_VTX_COLOR_5_SHIFT 21
+# define R200_VTX_COLOR_6_SHIFT 23
+# define R200_VTX_COLOR_7_SHIFT 25
+# define R200_VTX_XY1 (1 << 28)
+# define R200_VTX_Z1 (1 << 29)
+# define R200_VTX_W1 (1 << 30)
+# define R200_VTX_N1 (1 << 31)
+
+#define R200_REG_SE_VTX_FMT_1 0x208c
+# define R200_VTX_TEX0_COMP_CNT_SHIFT 0
+# define R200_VTX_TEX1_COMP_CNT_SHIFT 3
+# define R200_VTX_TEX2_COMP_CNT_SHIFT 6
+# define R200_VTX_TEX3_COMP_CNT_SHIFT 9
+# define R200_VTX_TEX4_COMP_CNT_SHIFT 12
+# define R200_VTX_TEX5_COMP_CNT_SHIFT 15
+
+#define R200_REG_SE_VTE_CNTL 0x20b0
+# define R200_VPORT_X_SCALE_ENA 0x00000001
+# define R200_VPORT_X_OFFSET_ENA 0x00000002
+# define R200_VPORT_Y_SCALE_ENA 0x00000004
+# define R200_VPORT_Y_OFFSET_ENA 0x00000008
+# define R200_VPORT_Z_SCALE_ENA 0x00000010
+# define R200_VPORT_Z_OFFSET_ENA 0x00000020
+# define R200_VTX_XY_FMT 0x00000100
+# define R200_VTX_Z_FMT 0x00000200
+# define R200_VTX_W0_FMT 0x00000400
+# define R200_VTX_W0_NORMALIZE 0x00000800
+# define R200_VTX_ST_DENORMALIZED 0x00001000
+
+#define R200_REG_SE_VAP_CNTL_STATUS 0x2140
+#define RADEON_REG_SE_CNTL_STATUS 0x2140
+# define RADEON_VC_NO_SWAP (0 << 0)
+# define RADEON_VC_16BIT_SWAP (1 << 0)
+# define RADEON_VC_32BIT_SWAP (2 << 0)
+# define RADEON_VC_HALF_DWORD_SWAP (3 << 0)
+# define RADEON_TCL_BYPASS (1 << 8)
+
+#define R200_REG_SE_VTX_STATE_CNTL 0x2180
+
+#define RADEON_REG_RE_TOP_LEFT 0x26c0
+
+#define R200_REG_RE_AUX_SCISSOR_CNTL 0x26f0
+
+#define R200_REG_PP_TXFILTER_0 0x2c00
+#define R200_REG_PP_TXFILTER_1 0x2c20
+#define R200_REG_PP_TXFILTER_2 0x2c40
+#define R200_REG_PP_TXFILTER_3 0x2c60
+#define R200_REG_PP_TXFILTER_4 0x2c80
+#define R200_REG_PP_TXFILTER_5 0x2ca0
+# define R200_MAG_FILTER_NEAREST (0 << 0)
+# define R200_MAG_FILTER_LINEAR (1 << 0)
+# define R200_MAG_FILTER_MASK (1 << 0)
+# define R200_MIN_FILTER_NEAREST (0 << 1)
+# define R200_MIN_FILTER_LINEAR (1 << 1)
+# define R200_MIN_FILTER_NEAREST_MIP_NEAREST (2 << 1)
+# define R200_MIN_FILTER_NEAREST_MIP_LINEAR (3 << 1)
+# define R200_MIN_FILTER_LINEAR_MIP_NEAREST (6 << 1)
+# define R200_MIN_FILTER_LINEAR_MIP_LINEAR (7 << 1)
+# define R200_MIN_FILTER_ANISO_NEAREST (8 << 1)
+# define R200_MIN_FILTER_ANISO_LINEAR (9 << 1)
+# define R200_MIN_FILTER_ANISO_NEAREST_MIP_NEAREST (10 << 1)
+# define R200_MIN_FILTER_ANISO_NEAREST_MIP_LINEAR (11 << 1)
+# define R200_MIN_FILTER_MASK (15 << 1)
+# define R200_MAX_ANISO_1_TO_1 (0 << 5)
+# define R200_MAX_ANISO_2_TO_1 (1 << 5)
+# define R200_MAX_ANISO_4_TO_1 (2 << 5)
+# define R200_MAX_ANISO_8_TO_1 (3 << 5)
+# define R200_MAX_ANISO_16_TO_1 (4 << 5)
+# define R200_MAX_ANISO_MASK (7 << 5)
+# define R200_MAX_MIP_LEVEL_MASK (0x0f << 16)
+# define R200_MAX_MIP_LEVEL_SHIFT 16
+# define R200_YUV_TO_RGB (1 << 20)
+# define R200_YUV_TEMPERATURE_COOL (0 << 21)
+# define R200_YUV_TEMPERATURE_HOT (1 << 21)
+# define R200_YUV_TEMPERATURE_MASK (1 << 21)
+# define R200_WRAPEN_S (1 << 22)
+# define R200_CLAMP_S_WRAP (0 << 23)
+# define R200_CLAMP_S_MIRROR (1 << 23)
+# define R200_CLAMP_S_CLAMP_LAST (2 << 23)
+# define R200_CLAMP_S_MIRROR_CLAMP_LAST (3 << 23)
+# define R200_CLAMP_S_CLAMP_BORDER (4 << 23)
+# define R200_CLAMP_S_MIRROR_CLAMP_BORDER (5 << 23)
+# define R200_CLAMP_S_CLAMP_GL (6 << 23)
+# define R200_CLAMP_S_MIRROR_CLAMP_GL (7 << 23)
+# define R200_CLAMP_S_MASK (7 << 23)
+# define R200_WRAPEN_T (1 << 26)
+# define R200_CLAMP_T_WRAP (0 << 27)
+# define R200_CLAMP_T_MIRROR (1 << 27)
+# define R200_CLAMP_T_CLAMP_LAST (2 << 27)
+# define R200_CLAMP_T_MIRROR_CLAMP_LAST (3 << 27)
+# define R200_CLAMP_T_CLAMP_BORDER (4 << 27)
+# define R200_CLAMP_T_MIRROR_CLAMP_BORDER (5 << 27)
+# define R200_CLAMP_T_CLAMP_GL (6 << 27)
+# define R200_CLAMP_T_MIRROR_CLAMP_GL (7 << 27)
+# define R200_CLAMP_T_MASK (7 << 27)
+# define R200_KILL_LT_ZERO (1 << 30)
+# define R200_BORDER_MODE_OGL (0 << 31)
+# define R200_BORDER_MODE_D3D (1 << 31)
+
+#define R200_REG_PP_TXFORMAT_0 0x2c04
+#define R200_REG_PP_TXFORMAT_1 0x2c24
+#define R200_REG_PP_TXFORMAT_2 0x2c44
+#define R200_REG_PP_TXFORMAT_3 0x2c64
+#define R200_REG_PP_TXFORMAT_4 0x2c84
+#define R200_REG_PP_TXFORMAT_5 0x2ca4
+# define R200_TXFORMAT_I8 (0 << 0)
+# define R200_TXFORMAT_AI88 (1 << 0)
+# define R200_TXFORMAT_RGB332 (2 << 0)
+# define R200_TXFORMAT_ARGB1555 (3 << 0)
+# define R200_TXFORMAT_RGB565 (4 << 0)
+# define R200_TXFORMAT_ARGB4444 (5 << 0)
+# define R200_TXFORMAT_ARGB8888 (6 << 0)
+# define R200_TXFORMAT_RGBA8888 (7 << 0)
+# define R200_TXFORMAT_Y8 (8 << 0)
+# define R200_TXFORMAT_AVYU4444 (9 << 0)
+# define R200_TXFORMAT_VYUY422 (10 << 0)
+# define R200_TXFORMAT_YVYU422 (11 << 0)
+# define R200_TXFORMAT_DXT1 (12 << 0)
+# define R200_TXFORMAT_DXT23 (14 << 0)
+# define R200_TXFORMAT_DXT45 (15 << 0)
+# define R200_TXFORMAT_FORMAT_MASK (31 << 0)
+# define R200_TXFORMAT_FORMAT_SHIFT 0
+# define R200_TXFORMAT_ALPHA_IN_MAP (1 << 6)
+# define R200_TXFORMAT_NON_POWER2 (1 << 7)
+# define R200_TXFORMAT_WIDTH_MASK (15 << 8)
+# define R200_TXFORMAT_WIDTH_SHIFT 8
+# define R200_TXFORMAT_HEIGHT_MASK (15 << 12)
+# define R200_TXFORMAT_HEIGHT_SHIFT 12
+# define R200_TXFORMAT_F5_WIDTH_MASK (15 << 16) /* cube face 5 */
+# define R200_TXFORMAT_F5_WIDTH_SHIFT 16
+# define R200_TXFORMAT_F5_HEIGHT_MASK (15 << 20)
+# define R200_TXFORMAT_F5_HEIGHT_SHIFT 20
+# define R200_TXFORMAT_ST_ROUTE_STQ0 (0 << 24)
+# define R200_TXFORMAT_ST_ROUTE_STQ1 (1 << 24)
+# define R200_TXFORMAT_ST_ROUTE_STQ2 (2 << 24)
+# define R200_TXFORMAT_ST_ROUTE_STQ3 (3 << 24)
+# define R200_TXFORMAT_ST_ROUTE_STQ4 (4 << 24)
+# define R200_TXFORMAT_ST_ROUTE_STQ5 (5 << 24)
+# define R200_TXFORMAT_ST_ROUTE_MASK (7 << 24)
+# define R200_TXFORMAT_ST_ROUTE_SHIFT 24
+# define R200_TXFORMAT_ALPHA_MASK_ENABLE (1 << 28)
+# define R200_TXFORMAT_CHROMA_KEY_ENABLE (1 << 29)
+# define R200_TXFORMAT_CUBIC_MAP_ENABLE (1 << 30)
+
+#define R200_REG_PP_TXFORMAT_X_0 0x2c08
+#define R200_REG_PP_TXFORMAT_X_1 0x2c28
+#define R200_REG_PP_TXFORMAT_X_2 0x2c48
+#define R200_REG_PP_TXFORMAT_X_3 0x2c68
+#define R200_REG_PP_TXFORMAT_X_4 0x2c88
+#define R200_REG_PP_TXFORMAT_X_5 0x2ca8
+# define R200_DEPTH_LOG2_MASK (0xf << 0)
+# define R200_DEPTH_LOG2_SHIFT 0
+# define R200_VOLUME_FILTER_SHIFT 4
+# define R200_VOLUME_FILTER_MASK (1 << 4)
+# define R200_VOLUME_FILTER_NEAREST (0 << 4)
+# define R200_VOLUME_FILTER_LINEAR (1 << 4)
+# define R200_WRAPEN_Q (1 << 8)
+# define R200_CLAMP_Q_WRAP (0 << 9)
+# define R200_CLAMP_Q_MIRROR (1 << 9)
+# define R200_CLAMP_Q_CLAMP_LAST (2 << 9)
+# define R200_CLAMP_Q_MIRROR_CLAMP_LAST (3 << 9)
+# define R200_CLAMP_Q_CLAMP_BORDER (4 << 9)
+# define R200_CLAMP_Q_MIRROR_CLAMP_BORDER (5 << 9)
+# define R200_CLAMP_Q_CLAMP_GL (6 << 9)
+# define R200_CLAMP_Q_MIRROR_CLAMP_GL (7 << 9)
+# define R200_CLAMP_Q_MASK (7 << 9)
+# define R200_MIN_MIP_LEVEL_MASK (0xff << 12)
+# define R200_MIN_MIP_LEVEL_SHIFT 12
+# define R200_TEXCOORD_NONPROJ (0 << 16)
+# define R200_TEXCOORD_CUBIC_ENV (1 << 16)
+# define R200_TEXCOORD_VOLUME (2 << 16)
+# define R200_TEXCOORD_PROJ (3 << 16)
+# define R200_TEXCOORD_DEPTH (4 << 16)
+# define R200_TEXCOORD_1D_PROJ (5 << 16)
+# define R200_TEXCOORD_1D (6 << 16)
+# define R200_TEXCOORD_ZERO (7 << 16)
+# define R200_TEXCOORD_MASK (7 << 16)
+# define R200_LOD_BIAS_MASK (0xfff80000)
+# define R200_LOD_BIAS_SHIFT 19
+
+#define R200_REG_PP_TXSIZE_0 0x2c0c /* NPOT only */
+#define R200_REG_PP_TXSIZE_1 0x2c2c /* NPOT only */
+#define R200_REG_PP_TXSIZE_2 0x2c4c /* NPOT only */
+#define R200_REG_PP_TXSIZE_3 0x2c6c /* NPOT only */
+#define R200_REG_PP_TXSIZE_4 0x2c8c /* NPOT only */
+#define R200_REG_PP_TXSIZE_5 0x2cac /* NPOT only */
+
+#define R200_REG_PP_TXPITCH_0 0x2c10 /* NPOT only */
+#define R200_REG_PP_TXPITCH_1 0x2c30 /* NPOT only */
+#define R200_REG_PP_TXPITCH_2 0x2c50 /* NPOT only */
+#define R200_REG_PP_TXPITCH_3 0x2c70 /* NPOT only */
+#define R200_REG_PP_TXPITCH_4 0x2c90 /* NPOT only */
+#define R200_REG_PP_TXPITCH_5 0x2cb0 /* NPOT only */
+
+#define R200_REG_PP_BORDER_COLOR_0 0x2c14
+#define R200_REG_PP_TXMULTI_CTL_0 0x2c1c
+
+#define R200_REG_PP_CNTL_X 0x2cc4
+
+#define R200_PP_TXOFFSET_0 0x2d00
+#define R200_PP_TXOFFSET_1 0x2d18
+#define R200_PP_TXOFFSET_2 0x2d30
+#define R200_PP_TXOFFSET_3 0x2d48
+#define R200_PP_TXOFFSET_4 0x2d60
+#define R200_PP_TXOFFSET_5 0x2d78
+# define R200_TXO_ENDIAN_NO_SWAP (0 << 0)
+# define R200_TXO_ENDIAN_BYTE_SWAP (1 << 0)
+# define R200_TXO_ENDIAN_WORD_SWAP (2 << 0)
+# define R200_TXO_ENDIAN_HALFDW_SWAP (3 << 0)
+# define R200_TXO_OFFSET_MASK 0xffffffe0
+# define R200_TXO_OFFSET_SHIFT 5
+
+#define R200_PP_CUBIC_OFFSET_F1_0 0x2d04
+#define R200_PP_CUBIC_OFFSET_F2_0 0x2d08
+#define R200_PP_CUBIC_OFFSET_F3_0 0x2d0c
+#define R200_PP_CUBIC_OFFSET_F4_0 0x2d10
+#define R200_PP_CUBIC_OFFSET_F5_0 0x2d14
+#define R200_PP_CUBIC_OFFSET_F1_1 0x2d1c
+#define R200_PP_CUBIC_OFFSET_F2_1 0x2d20
+#define R200_PP_CUBIC_OFFSET_F3_1 0x2d24
+#define R200_PP_CUBIC_OFFSET_F4_1 0x2d28
+#define R200_PP_CUBIC_OFFSET_F5_1 0x2d2c
+#define R200_PP_CUBIC_OFFSET_F1_2 0x2d34
+#define R200_PP_CUBIC_OFFSET_F2_2 0x2d38
+#define R200_PP_CUBIC_OFFSET_F3_2 0x2d3c
+#define R200_PP_CUBIC_OFFSET_F4_2 0x2d40
+#define R200_PP_CUBIC_OFFSET_F5_2 0x2d44
+#define R200_PP_CUBIC_OFFSET_F1_3 0x2d4c
+#define R200_PP_CUBIC_OFFSET_F2_3 0x2d50
+#define R200_PP_CUBIC_OFFSET_F3_3 0x2d54
+#define R200_PP_CUBIC_OFFSET_F4_3 0x2d58
+#define R200_PP_CUBIC_OFFSET_F5_3 0x2d5c
+#define R200_PP_CUBIC_OFFSET_F1_4 0x2d64
+#define R200_PP_CUBIC_OFFSET_F2_4 0x2d68
+#define R200_PP_CUBIC_OFFSET_F3_4 0x2d6c
+#define R200_PP_CUBIC_OFFSET_F4_4 0x2d70
+#define R200_PP_CUBIC_OFFSET_F5_4 0x2d74
+#define R200_PP_CUBIC_OFFSET_F1_5 0x2d7c
+#define R200_PP_CUBIC_OFFSET_F2_5 0x2d80
+#define R200_PP_CUBIC_OFFSET_F3_5 0x2d84
+#define R200_PP_CUBIC_OFFSET_F4_5 0x2d88
+#define R200_PP_CUBIC_OFFSET_F5_5 0x2d8c
+
+/* AKA PIXSHADER_I0_C0 */
+#define R200_REG_PP_TXCBLEND_0 0x2f00
+# define R200_TXC_ARG_A_ZERO (0)
+# define R200_TXC_ARG_A_CURRENT_COLOR (2)
+# define R200_TXC_ARG_A_CURRENT_ALPHA (3)
+# define R200_TXC_ARG_A_DIFFUSE_COLOR (4)
+# define R200_TXC_ARG_A_DIFFUSE_ALPHA (5)
+# define R200_TXC_ARG_A_SPECULAR_COLOR (6)
+# define R200_TXC_ARG_A_SPECULAR_ALPHA (7)
+# define R200_TXC_ARG_A_TFACTOR_COLOR (8)
+# define R200_TXC_ARG_A_TFACTOR_ALPHA (9)
+# define R200_TXC_ARG_A_R0_COLOR (10)
+# define R200_TXC_ARG_A_R0_ALPHA (11)
+# define R200_TXC_ARG_A_R1_COLOR (12)
+# define R200_TXC_ARG_A_R1_ALPHA (13)
+# define R200_TXC_ARG_A_R2_COLOR (14)
+# define R200_TXC_ARG_A_R2_ALPHA (15)
+# define R200_TXC_ARG_A_R3_COLOR (16)
+# define R200_TXC_ARG_A_R3_ALPHA (17)
+# define R200_TXC_ARG_A_R4_COLOR (18)
+# define R200_TXC_ARG_A_R4_ALPHA (19)
+# define R200_TXC_ARG_A_R5_COLOR (20)
+# define R200_TXC_ARG_A_R5_ALPHA (21)
+# define R200_TXC_ARG_A_TFACTOR1_COLOR (26)
+# define R200_TXC_ARG_A_TFACTOR1_ALPHA (27)
+# define R200_TXC_ARG_A_MASK (31 << 0)
+# define R200_TXC_ARG_A_SHIFT 0
+# define R200_TXC_ARG_B_ZERO (0 << 5)
+# define R200_TXC_ARG_B_CURRENT_COLOR (2 << 5)
+# define R200_TXC_ARG_B_CURRENT_ALPHA (3 << 5)
+# define R200_TXC_ARG_B_DIFFUSE_COLOR (4 << 5)
+# define R200_TXC_ARG_B_DIFFUSE_ALPHA (5 << 5)
+# define R200_TXC_ARG_B_SPECULAR_COLOR (6 << 5)
+# define R200_TXC_ARG_B_SPECULAR_ALPHA (7 << 5)
+# define R200_TXC_ARG_B_TFACTOR_COLOR (8 << 5)
+# define R200_TXC_ARG_B_TFACTOR_ALPHA (9 << 5)
+# define R200_TXC_ARG_B_R0_COLOR (10 << 5)
+# define R200_TXC_ARG_B_R0_ALPHA (11 << 5)
+# define R200_TXC_ARG_B_R1_COLOR (12 << 5)
+# define R200_TXC_ARG_B_R1_ALPHA (13 << 5)
+# define R200_TXC_ARG_B_R2_COLOR (14 << 5)
+# define R200_TXC_ARG_B_R2_ALPHA (15 << 5)
+# define R200_TXC_ARG_B_R3_COLOR (16 << 5)
+# define R200_TXC_ARG_B_R3_ALPHA (17 << 5)
+# define R200_TXC_ARG_B_R4_COLOR (18 << 5)
+# define R200_TXC_ARG_B_R4_ALPHA (19 << 5)
+# define R200_TXC_ARG_B_R5_COLOR (20 << 5)
+# define R200_TXC_ARG_B_R5_ALPHA (21 << 5)
+# define R200_TXC_ARG_B_TFACTOR1_COLOR (26 << 5)
+# define R200_TXC_ARG_B_TFACTOR1_ALPHA (27 << 5)
+# define R200_TXC_ARG_B_MASK (31 << 5)
+# define R200_TXC_ARG_B_SHIFT 5
+# define R200_TXC_ARG_C_ZERO (0 << 10)
+# define R200_TXC_ARG_C_CURRENT_COLOR (2 << 10)
+# define R200_TXC_ARG_C_CURRENT_ALPHA (3 << 10)
+# define R200_TXC_ARG_C_DIFFUSE_COLOR (4 << 10)
+# define R200_TXC_ARG_C_DIFFUSE_ALPHA (5 << 10)
+# define R200_TXC_ARG_C_SPECULAR_COLOR (6 << 10)
+# define R200_TXC_ARG_C_SPECULAR_ALPHA (7 << 10)
+# define R200_TXC_ARG_C_TFACTOR_COLOR (8 << 10)
+# define R200_TXC_ARG_C_TFACTOR_ALPHA (9 << 10)
+# define R200_TXC_ARG_C_R0_COLOR (10 << 10)
+# define R200_TXC_ARG_C_R0_ALPHA (11 << 10)
+# define R200_TXC_ARG_C_R1_COLOR (12 << 10)
+# define R200_TXC_ARG_C_R1_ALPHA (13 << 10)
+# define R200_TXC_ARG_C_R2_COLOR (14 << 10)
+# define R200_TXC_ARG_C_R2_ALPHA (15 << 10)
+# define R200_TXC_ARG_C_R3_COLOR (16 << 10)
+# define R200_TXC_ARG_C_R3_ALPHA (17 << 10)
+# define R200_TXC_ARG_C_R4_COLOR (18 << 10)
+# define R200_TXC_ARG_C_R4_ALPHA (19 << 10)
+# define R200_TXC_ARG_C_R5_COLOR (20 << 10)
+# define R200_TXC_ARG_C_R5_ALPHA (21 << 10)
+# define R200_TXC_ARG_C_TFACTOR1_COLOR (26 << 10)
+# define R200_TXC_ARG_C_TFACTOR1_ALPHA (27 << 10)
+# define R200_TXC_ARG_C_MASK (31 << 10)
+# define R200_TXC_ARG_C_SHIFT 10
+# define R200_TXC_COMP_ARG_A (1 << 16)
+# define R200_TXC_COMP_ARG_A_SHIFT (16)
+# define R200_TXC_BIAS_ARG_A (1 << 17)
+# define R200_TXC_SCALE_ARG_A (1 << 18)
+# define R200_TXC_NEG_ARG_A (1 << 19)
+# define R200_TXC_COMP_ARG_B (1 << 20)
+# define R200_TXC_COMP_ARG_B_SHIFT (20)
+# define R200_TXC_BIAS_ARG_B (1 << 21)
+# define R200_TXC_SCALE_ARG_B (1 << 22)
+# define R200_TXC_NEG_ARG_B (1 << 23)
+# define R200_TXC_COMP_ARG_C (1 << 24)
+# define R200_TXC_COMP_ARG_C_SHIFT (24)
+# define R200_TXC_BIAS_ARG_C (1 << 25)
+# define R200_TXC_SCALE_ARG_C (1 << 26)
+# define R200_TXC_NEG_ARG_C (1 << 27)
+# define R200_TXC_OP_MADD (0 << 28)
+# define R200_TXC_OP_CND0 (2 << 28)
+# define R200_TXC_OP_LERP (3 << 28)
+# define R200_TXC_OP_DOT3 (4 << 28)
+# define R200_TXC_OP_DOT4 (5 << 28)
+# define R200_TXC_OP_CONDITIONAL (6 << 28)
+# define R200_TXC_OP_DOT2_ADD (7 << 28)
+# define R200_TXC_OP_MASK (7 << 28)
+
+/* AKA PIXSHADER_I0_C1 */
+#define R200_REG_PP_TXCBLEND2_0 0x2f04
+# define R200_TXC_TFACTOR_SEL_SHIFT 0
+# define R200_TXC_TFACTOR_SEL_MASK 0x7
+# define R200_TXC_TFACTOR1_SEL_SHIFT 4
+# define R200_TXC_TFACTOR1_SEL_MASK (0x7 << 4)
+# define R200_TXC_SCALE_SHIFT 8
+# define R200_TXC_SCALE_MASK (7 << 8)
+# define R200_TXC_SCALE_1X (0 << 8)
+# define R200_TXC_SCALE_2X (1 << 8)
+# define R200_TXC_SCALE_4X (2 << 8)
+# define R200_TXC_SCALE_8X (3 << 8)
+# define R200_TXC_SCALE_INV2 (5 << 8)
+# define R200_TXC_SCALE_INV4 (6 << 8)
+# define R200_TXC_SCALE_INV8 (7 << 8)
+# define R200_TXC_CLAMP_SHIFT 12
+# define R200_TXC_CLAMP_MASK (3 << 12)
+# define R200_TXC_CLAMP_WRAP (0 << 12)
+# define R200_TXC_CLAMP_0_1 (1 << 12)
+# define R200_TXC_CLAMP_8_8 (2 << 12)
+# define R200_TXC_OUTPUT_REG_MASK (7 << 16)
+# define R200_TXC_OUTPUT_REG_NONE (0 << 16)
+# define R200_TXC_OUTPUT_REG_R0 (1 << 16)
+# define R200_TXC_OUTPUT_REG_R1 (2 << 16)
+# define R200_TXC_OUTPUT_REG_R2 (3 << 16)
+# define R200_TXC_OUTPUT_REG_R3 (4 << 16)
+# define R200_TXC_OUTPUT_REG_R4 (5 << 16)
+# define R200_TXC_OUTPUT_REG_R5 (6 << 16)
+# define R200_TXC_OUTPUT_MASK_MASK (7 << 20)
+# define R200_TXC_OUTPUT_MASK_RGB (0 << 20)
+# define R200_TXC_OUTPUT_MASK_RG (1 << 20)
+# define R200_TXC_OUTPUT_MASK_RB (2 << 20)
+# define R200_TXC_OUTPUT_MASK_R (3 << 20)
+# define R200_TXC_OUTPUT_MASK_GB (4 << 20)
+# define R200_TXC_OUTPUT_MASK_G (5 << 20)
+# define R200_TXC_OUTPUT_MASK_B (6 << 20)
+# define R200_TXC_OUTPUT_MASK_NONE (7 << 20)
+# define R200_TXC_REPL_NORMAL 0
+# define R200_TXC_REPL_RED 1
+# define R200_TXC_REPL_GREEN 2
+# define R200_TXC_REPL_BLUE 3
+# define R200_TXC_REPL_ARG_A_SHIFT 26
+# define R200_TXC_REPL_ARG_A_MASK (3 << 26)
+# define R200_TXC_REPL_ARG_B_SHIFT 28
+# define R200_TXC_REPL_ARG_B_MASK (3 << 28)
+# define R200_TXC_REPL_ARG_C_SHIFT 30
+# define R200_TXC_REPL_ARG_C_MASK (3 << 30)
+
+/* AKA PIXSHADER_I0_A0 */
+#define R200_REG_PP_TXABLEND_0 0x2f08
+# define R200_TXA_ARG_A_ZERO (0)
+# define R200_TXA_ARG_A_CURRENT_ALPHA (2) /* guess */
+# define R200_TXA_ARG_A_CURRENT_BLUE (3) /* guess */
+# define R200_TXA_ARG_A_DIFFUSE_ALPHA (4)
+# define R200_TXA_ARG_A_DIFFUSE_BLUE (5)
+# define R200_TXA_ARG_A_SPECULAR_ALPHA (6)
+# define R200_TXA_ARG_A_SPECULAR_BLUE (7)
+# define R200_TXA_ARG_A_TFACTOR_ALPHA (8)
+# define R200_TXA_ARG_A_TFACTOR_BLUE (9)
+# define R200_TXA_ARG_A_R0_ALPHA (10)
+# define R200_TXA_ARG_A_R0_BLUE (11)
+# define R200_TXA_ARG_A_R1_ALPHA (12)
+# define R200_TXA_ARG_A_R1_BLUE (13)
+# define R200_TXA_ARG_A_R2_ALPHA (14)
+# define R200_TXA_ARG_A_R2_BLUE (15)
+# define R200_TXA_ARG_A_R3_ALPHA (16)
+# define R200_TXA_ARG_A_R3_BLUE (17)
+# define R200_TXA_ARG_A_R4_ALPHA (18)
+# define R200_TXA_ARG_A_R4_BLUE (19)
+# define R200_TXA_ARG_A_R5_ALPHA (20)
+# define R200_TXA_ARG_A_R5_BLUE (21)
+# define R200_TXA_ARG_A_TFACTOR1_ALPHA (26)
+# define R200_TXA_ARG_A_TFACTOR1_BLUE (27)
+# define R200_TXA_ARG_A_MASK (31 << 0)
+# define R200_TXA_ARG_A_SHIFT 0
+# define R200_TXA_ARG_B_ZERO (0 << 5)
+# define R200_TXA_ARG_B_CURRENT_ALPHA (2 << 5) /* guess */
+# define R200_TXA_ARG_B_CURRENT_BLUE (3 << 5) /* guess */
+# define R200_TXA_ARG_B_DIFFUSE_ALPHA (4 << 5)
+# define R200_TXA_ARG_B_DIFFUSE_BLUE (5 << 5)
+# define R200_TXA_ARG_B_SPECULAR_ALPHA (6 << 5)
+# define R200_TXA_ARG_B_SPECULAR_BLUE (7 << 5)
+# define R200_TXA_ARG_B_TFACTOR_ALPHA (8 << 5)
+# define R200_TXA_ARG_B_TFACTOR_BLUE (9 << 5)
+# define R200_TXA_ARG_B_R0_ALPHA (10 << 5)
+# define R200_TXA_ARG_B_R0_BLUE (11 << 5)
+# define R200_TXA_ARG_B_R1_ALPHA (12 << 5)
+# define R200_TXA_ARG_B_R1_BLUE (13 << 5)
+# define R200_TXA_ARG_B_R2_ALPHA (14 << 5)
+# define R200_TXA_ARG_B_R2_BLUE (15 << 5)
+# define R200_TXA_ARG_B_R3_ALPHA (16 << 5)
+# define R200_TXA_ARG_B_R3_BLUE (17 << 5)
+# define R200_TXA_ARG_B_R4_ALPHA (18 << 5)
+# define R200_TXA_ARG_B_R4_BLUE (19 << 5)
+# define R200_TXA_ARG_B_R5_ALPHA (20 << 5)
+# define R200_TXA_ARG_B_R5_BLUE (21 << 5)
+# define R200_TXA_ARG_B_TFACTOR1_ALPHA (26 << 5)
+# define R200_TXA_ARG_B_TFACTOR1_BLUE (27 << 5)
+# define R200_TXA_ARG_B_MASK (31 << 5)
+# define R200_TXA_ARG_B_SHIFT 5
+# define R200_TXA_ARG_C_ZERO (0 << 10)
+# define R200_TXA_ARG_C_CURRENT_ALPHA (2 << 10) /* guess */
+# define R200_TXA_ARG_C_CURRENT_BLUE (3 << 10) /* guess */
+# define R200_TXA_ARG_C_DIFFUSE_ALPHA (4 << 10)
+# define R200_TXA_ARG_C_DIFFUSE_BLUE (5 << 10)
+# define R200_TXA_ARG_C_SPECULAR_ALPHA (6 << 10)
+# define R200_TXA_ARG_C_SPECULAR_BLUE (7 << 10)
+# define R200_TXA_ARG_C_TFACTOR_ALPHA (8 << 10)
+# define R200_TXA_ARG_C_TFACTOR_BLUE (9 << 10)
+# define R200_TXA_ARG_C_R0_ALPHA (10 << 10)
+# define R200_TXA_ARG_C_R0_BLUE (11 << 10)
+# define R200_TXA_ARG_C_R1_ALPHA (12 << 10)
+# define R200_TXA_ARG_C_R1_BLUE (13 << 10)
+# define R200_TXA_ARG_C_R2_ALPHA (14 << 10)
+# define R200_TXA_ARG_C_R2_BLUE (15 << 10)
+# define R200_TXA_ARG_C_R3_ALPHA (16 << 10)
+# define R200_TXA_ARG_C_R3_BLUE (17 << 10)
+# define R200_TXA_ARG_C_R4_ALPHA (18 << 10)
+# define R200_TXA_ARG_C_R4_BLUE (19 << 10)
+# define R200_TXA_ARG_C_R5_ALPHA (20 << 10)
+# define R200_TXA_ARG_C_R5_BLUE (21 << 10)
+# define R200_TXA_ARG_C_TFACTOR1_ALPHA (26 << 10)
+# define R200_TXA_ARG_C_TFACTOR1_BLUE (27 << 10)
+# define R200_TXA_ARG_C_MASK (31 << 10)
+# define R200_TXA_ARG_C_SHIFT 10
+# define R200_TXA_COMP_ARG_A (1 << 16)
+# define R200_TXA_COMP_ARG_A_SHIFT (16)
+# define R200_TXA_BIAS_ARG_A (1 << 17)
+# define R200_TXA_SCALE_ARG_A (1 << 18)
+# define R200_TXA_NEG_ARG_A (1 << 19)
+# define R200_TXA_COMP_ARG_B (1 << 20)
+# define R200_TXA_COMP_ARG_B_SHIFT (20)
+# define R200_TXA_BIAS_ARG_B (1 << 21)
+# define R200_TXA_SCALE_ARG_B (1 << 22)
+# define R200_TXA_NEG_ARG_B (1 << 23)
+# define R200_TXA_COMP_ARG_C (1 << 24)
+# define R200_TXA_COMP_ARG_C_SHIFT (24)
+# define R200_TXA_BIAS_ARG_C (1 << 25)
+# define R200_TXA_SCALE_ARG_C (1 << 26)
+# define R200_TXA_NEG_ARG_C (1 << 27)
+# define R200_TXA_OP_MADD (0 << 28)
+# define R200_TXA_OP_CND0 (2 << 28)
+# define R200_TXA_OP_LERP (3 << 28)
+# define R200_TXA_OP_CONDITIONAL (6 << 28)
+# define R200_TXA_OP_MASK (7 << 28)
+
+/* AKA PIXSHADER_I0_A1 */
+#define R200_REG_PP_TXABLEND2_0 0x2f0c
+# define R200_TXA_TFACTOR_SEL_SHIFT 0
+# define R200_TXA_TFACTOR_SEL_MASK 0x7
+# define R200_TXA_TFACTOR1_SEL_SHIFT 4
+# define R200_TXA_TFACTOR1_SEL_MASK (0x7 << 4)
+# define R200_TXA_SCALE_SHIFT 8
+# define R200_TXA_SCALE_MASK (7 << 8)
+# define R200_TXA_SCALE_1X (0 << 8)
+# define R200_TXA_SCALE_2X (1 << 8)
+# define R200_TXA_SCALE_4X (2 << 8)
+# define R200_TXA_SCALE_8X (3 << 8)
+# define R200_TXA_SCALE_INV2 (5 << 8)
+# define R200_TXA_SCALE_INV4 (6 << 8)
+# define R200_TXA_SCALE_INV8 (7 << 8)
+# define R200_TXA_CLAMP_SHIFT 12
+# define R200_TXA_CLAMP_MASK (3 << 12)
+# define R200_TXA_CLAMP_WRAP (0 << 12)
+# define R200_TXA_CLAMP_0_1 (1 << 12)
+# define R200_TXA_CLAMP_8_8 (2 << 12)
+# define R200_TXA_OUTPUT_REG_MASK (7 << 16)
+# define R200_TXA_OUTPUT_REG_NONE (0 << 16)
+# define R200_TXA_OUTPUT_REG_R0 (1 << 16)
+# define R200_TXA_OUTPUT_REG_R1 (2 << 16)
+# define R200_TXA_OUTPUT_REG_R2 (3 << 16)
+# define R200_TXA_OUTPUT_REG_R3 (4 << 16)
+# define R200_TXA_OUTPUT_REG_R4 (5 << 16)
+# define R200_TXA_OUTPUT_REG_R5 (6 << 16)
+# define R200_TXA_DOT_ALPHA (1 << 20)
+# define R200_TXA_REPL_NORMAL 0
+# define R200_TXA_REPL_RED 1
+# define R200_TXA_REPL_GREEN 2
+# define R200_TXA_REPL_ARG_A_SHIFT 26
+# define R200_TXA_REPL_ARG_A_MASK (3 << 26)
+# define R200_TXA_REPL_ARG_B_SHIFT 28
+# define R200_TXA_REPL_ARG_B_MASK (3 << 28)
+# define R200_TXA_REPL_ARG_C_SHIFT 30
+# define R200_TXA_REPL_ARG_C_MASK (3 << 30)
+
+#define RADEON_REG_RB2D_DSTCACHE_MODE 0x3428
+/* This is a read-only mirror of RADEON_REG_RB3D_DSTCACHE_MODE */
+
+#define RADEON_REG_RB2D_DSTCACHE_CTLSTAT 0x342C
+/* This is a read-only mirror of RADEON_REG_RB3D_DSTCACHE_CTLSTAT */
+
+#define RADEON_REG_RB3D_DSTCACHE_MODE 0x3258
+# define RADEON_RB3D_DC_CACHE_ENABLE (0)
+# define RADEON_RB3D_DC_2D_CACHE_DISABLE (1)
+# define RADEON_RB3D_DC_3D_CACHE_DISABLE (2)
+# define RADEON_RB3D_DC_CACHE_DISABLE (3)
+# define RADEON_RB3D_DC_2D_CACHE_LINESIZE_128 (1 << 2)
+# define RADEON_RB3D_DC_3D_CACHE_LINESIZE_128 (2 << 2)
+# define RADEON_RB3D_DC_2D_CACHE_AUTOFLUSH (1 << 8)
+# define RADEON_RB3D_DC_3D_CACHE_AUTOFLUSH (2 << 8)
+# define R200_RB3D_DC_2D_CACHE_AUTOFREE (1 << 10)
+# define R200_RB3D_DC_3D_CACHE_AUTOFREE (2 << 10)
+# define RADEON_RB3D_DC_FORCE_RMW (1 << 16)
+# define RADEON_RB3D_DC_DISABLE_RI_FILL (1 << 24)
+# define RADEON_RB3D_DC_DISABLE_RI_READ (1 << 25)
+# define RADEON_RB3D_DC_DISABLE_MASK_CHK (1 << 26)
+
+#define RADEON_REG_RB3D_DSTCACHE_CTLSTAT 0x325C
+# define RADEON_RB3D_DC_FLUSH (3 << 0)
+# define RADEON_RB3D_DC_FREE (3 << 2)
+# define RADEON_RB3D_DC_FLUSH_ALL 0xf
+# define RADEON_RB3D_DC_BUSY (1 << 31)
+
+/* PLL register defines */
+#define R128_REG_MCLK_CNTL 0x000f
+# define R128_FORCE_GCP (1 << 16)
+# define R128_FORCE_PIPE3D_CP (1 << 17)
+# define R128_FORCE_RCP (1 << 18)
+#define RADEON_REG_MCLK_CNTL 0x0012
+# define RADEON_FORCEON_MCLKA (1 << 16)
+# define RADEON_FORCEON_MCLKB (1 << 17)
+# define RADEON_FORCEON_YCLKA (1 << 18)
+# define RADEON_FORCEON_YCLKB (1 << 19)
+# define RADEON_FORCEON_MC (1 << 20)
+# define RADEON_FORCEON_AIC (1 << 21)
+
+/* CCE packet defines */
+
+#define ATI_CCE_PACKETTYPE_MASK 0xc0000000
+#define ATI_CCE_PACKET0 0x00000000
+#define ATI_CCE_PACKET0_COUNT_MASK 0x3fff0000
+#define ATI_CCE_PACKET0_ONE_REG_WR 0x00008000
+#define ATI_CCE_PACKET0_REG_MASK 0x000007ff
+#define ATI_CCE_PACKET1 0x40000000
+#define ATI_CCE_PACKET1_REG_1 0x000007ff
+#define ATI_CCE_PACKET1_REG_2 0x003ff800
+#define ATI_CCE_PACKET1_REG_2_SHIFT 10
+#define ATI_CCE_PACKET2 0x80000000
+#define ATI_CCE_PACKET3 0xc0000000
+#define ATI_CCE_PACKET3_COUNT_MASK 0x3fff0000
+#define ATI_CCE_PACKET3_IT_OPCODE_MASK 0x0000ff00
+#define ATI_CCE_PACKET3_NOP 0xc0001000
+#define ATI_CCE_PACKET3_NEXT_CHAR 0xc0001900
+#define ATI_CCE_PACKET3_PLY_NEXTSCAN 0xc0001d00
+#define ATI_CCE_PACKET3_SET_SCISSORS 0xc0001e00
+#define R128_CCE_PACKET3_SET_MODE_24BPP 0xc0001f00
+#define R128_CCE_PACKET3_3D_SAVE_CONTEXT 0xc0002000
+#define R128_CCE_PACKET3_3D_PLAY_CONTEXT 0xc0002100
+#define ATI_CCE_PACKET3_3D_RNDR_GEN_INDX_PRIM 0xc0002300
+#define RADEON_CP_PACKET3_LOAD_MICROCODE 0xc0002400
+#define ATI_CCE_PACKET3_3D_RNDR_GEN_PRIM 0xc0002500
+#define RADEON_CP_PACKET3_WAIT_FOR_IDLE 0xc0002600
+#define RADEON_CP_PACKET3_3D_DRAW_VBUF 0xc0002800
+#define RADEON_CP_PACKET3_3D_DRAW_IMMD 0xc0002900
+#define RADEON_CP_PACKET3_3D_DRAW_INDX 0xc0002a00
+#define ATI_CCE_PACKET3_LOAD_PALETTE 0xc0002c00
+#define R128_CCE_PACKET3_PURGE 0xc0002d00
+#define R128_CCE_PACKET3_NEXT_VERTEX_BUNDLE 0xc0002e00
+#define RADEON_CP_PACKET3_3D_LOAD_VBPNTR 0xc0002f00
+#define RADEON_CP_PACKET3_3D_CLEAR_ZMASK 0xc0003200
+#define R200_CP_PACKET3_3D_DRAW_IMMD_2 0xc0003500
+#define ATI_CCE_PACKET3_CNTL_PAINT 0xc0009100
+#define ATI_CCE_PACKET3_CNTL_BITBLT 0xc0009200
+#define ATI_CCE_PACKET3_CNTL_SMALLTEXT 0xc0009300
+#define ATI_CCE_PACKET3_HOSTDATA_BLT 0xc0009400
+#define ATI_CCE_PACKET3_CNTL_POLYLINE 0xc0009500
+#define R128_CCE_PACKET3_SCALE 0xc0009600
+#define R128_CCE_PACKET3_TRANS_SCALE 0xc0009700
+#define ATI_CCE_PACKET3_CNTL_POLYSCANLINES 0xc0009800
+#define ATI_CCE_PACKET3_PAINT_MULTI 0xc0009a00
+#define ATI_CCE_PACKET3_BITBLT_MULTI 0xc0009b00
+#define ATI_CCE_PACKET3_CNTL_TRANS_BITBLT 0xc0009c00
+
+#define RADEON_CP_VC_FRMT_XY 0x00000000
+#define RADEON_CP_VC_FRMT_W0 0x00000001
+#define RADEON_CP_VC_FRMT_FPCOLOR 0x00000002
+#define RADEON_CP_VC_FRMT_FPALPHA 0x00000004
+#define RADEON_CP_VC_FRMT_PKCOLOR 0x00000008
+#define RADEON_CP_VC_FRMT_FPSPEC 0x00000010
+#define RADEON_CP_VC_FRMT_FPFOG 0x00000020
+#define RADEON_CP_VC_FRMT_PKSPEC 0x00000040
+#define RADEON_CP_VC_FRMT_ST0 0x00000080
+#define RADEON_CP_VC_FRMT_ST1 0x00000100
+#define RADEON_CP_VC_FRMT_Q1 0x00000200
+#define RADEON_CP_VC_FRMT_ST2 0x00000400
+#define RADEON_CP_VC_FRMT_Q2 0x00000800
+#define RADEON_CP_VC_FRMT_ST3 0x00001000
+#define RADEON_CP_VC_FRMT_Q3 0x00002000
+#define RADEON_CP_VC_FRMT_Q0 0x00004000
+#define RADEON_CP_VC_FRMT_BLND_WEIGHT_CNT_MASK 0x00038000
+#define RADEON_CP_VC_FRMT_N0 0x00040000
+#define RADEON_CP_VC_FRMT_XY1 0x08000000
+#define RADEON_CP_VC_FRMT_Z1 0x10000000
+#define RADEON_CP_VC_FRMT_W1 0x20000000
+#define RADEON_CP_VC_FRMT_N1 0x40000000
+#define RADEON_CP_VC_FRMT_Z 0x80000000
+
+#define RADEON_CP_VC_CNTL_PRIM_TYPE_NONE 0x00000000
+#define RADEON_CP_VC_CNTL_PRIM_TYPE_POINT 0x00000001
+#define RADEON_CP_VC_CNTL_PRIM_TYPE_LINE 0x00000002
+#define RADEON_CP_VC_CNTL_PRIM_TYPE_LINE_STRIP 0x00000003
+#define RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST 0x00000004
+#define RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_FAN 0x00000005
+#define RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_STRIP 0x00000006
+#define RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_TYPE_2 0x00000007
+#define RADEON_CP_VC_CNTL_PRIM_TYPE_RECT_LIST 0x00000008
+#define RADEON_CP_VC_CNTL_PRIM_TYPE_3VRT_POINT_LIST 0x00000009
+#define RADEON_CP_VC_CNTL_PRIM_TYPE_3VRT_LINE_LIST 0x0000000a
+#define RADEON_CP_VC_CNTL_PRIM_WALK_IND 0x00000010
+#define RADEON_CP_VC_CNTL_PRIM_WALK_LIST 0x00000020
+#define RADEON_CP_VC_CNTL_PRIM_WALK_RING 0x00000030
+#define RADEON_CP_VC_CNTL_COLOR_ORDER_BGRA 0x00000000
+#define RADEON_CP_VC_CNTL_COLOR_ORDER_RGBA 0x00000040
+#define RADEON_CP_VC_CNTL_MAOS_ENABLE 0x00000080
+#define RADEON_CP_VC_CNTL_VTX_FMT_NON_RADEON_MODE 0x00000000
+#define RADEON_CP_VC_CNTL_VTX_FMT_RADEON_MODE 0x00000100
+#define RADEON_CP_VC_CNTL_TCL_DISABLE 0x00000000
+#define RADEON_CP_VC_CNTL_TCL_ENABLE 0x00000200
+#define RADEON_CP_VC_CNTL_NUM_SHIFT 16
+
+#define R128_CCE_VC_FRMT_RHW 0x00000001
+#define R128_CCE_VC_FRMT_DIFFUSE_BGR 0x00000002
+#define R128_CCE_VC_FRMT_DIFFUSE_A 0x00000004
+#define R128_CCE_VC_FRMT_DIFFUSE_ARGB 0x00000008
+#define R128_CCE_VC_FRMT_SPEC_BGR 0x00000010
+#define R128_CCE_VC_FRMT_SPEC_F 0x00000020
+#define R128_CCE_VC_FRMT_SPEC_FRGB 0x00000040
+#define R128_CCE_VC_FRMT_S_T 0x00000080
+#define R128_CCE_VC_FRMT_S2_T2 0x00000100
+#define R128_CCE_VC_FRMT_RHW2 0x00000200
+
+#define R128_CCE_VC_CNTL_PRIM_TYPE_NONE 0x00000000
+#define R128_CCE_VC_CNTL_PRIM_TYPE_POINT 0x00000001
+#define R128_CCE_VC_CNTL_PRIM_TYPE_LINE 0x00000002
+#define R128_CCE_VC_CNTL_PRIM_TYPE_POLY_LINE 0x00000003
+#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_LIST 0x00000004
+#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_FAN 0x00000005
+#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_STRIP 0x00000006
+#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_TYPE2 0x00000007
+#define R128_CCE_VC_CNTL_PRIM_WALK_IND 0x00000010
+#define R128_CCE_VC_CNTL_PRIM_WALK_LIST 0x00000020
+#define R128_CCE_VC_CNTL_PRIM_WALK_RING 0x00000030
+#define R128_CCE_VC_CNTL_NUM_SHIFT 16
+
+#define R128_DATATYPE_VQ 0
+#define R128_DATATYPE_CI4 1
+#define R128_DATATYPE_CI8 2
+#define R128_DATATYPE_ARGB1555 3
+#define R128_DATATYPE_RGB565 4
+#define R128_DATATYPE_RGB888 5
+#define R128_DATATYPE_ARGB8888 6
+#define R128_DATATYPE_RGB332 7
+#define R128_DATATYPE_Y8 8
+#define R128_DATATYPE_RGB8 9
+#define R128_DATATYPE_CI16 10
+#define R128_DATATYPE_VYUY_422 11
+#define R128_DATATYPE_YVYU_422 12
+#define R128_DATATYPE_AYUV_444 14
+#define R128_DATATYPE_ARGB4444 15
+
+#define R128_AGP_OFFSET 0x02000000
+
+#define R128_WATERMARK_L 16
+#define R128_WATERMARK_M 8
+#define R128_WATERMARK_N 8
+#define R128_WATERMARK_K 128
diff --git a/xorg-server/hw/kdrive/ati/ati_stub.c b/xorg-server/hw/kdrive/ati/ati_stub.c
new file mode 100644
index 000000000..f881b7f7b
--- /dev/null
+++ b/xorg-server/hw/kdrive/ati/ati_stub.c
@@ -0,0 +1,77 @@
+/*
+ * Copyright © 2003 Eric Anholt
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that
+ * copyright notice and this permission notice appear in supporting
+ * documentation, and that the name of Eric Anholt not be used in
+ * advertising or publicity pertaining to distribution of the software without
+ * specific, written prior permission. Eric Anholt makes no
+ * representations about the suitability of this software for any purpose. It
+ * is provided "as is" without express or implied warranty.
+ *
+ * ERIC ANHOLT DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL ERIC ANHOLT BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include <kdrive-config.h>
+#endif
+#include "ati.h"
+#include "klinux.h"
+
+extern struct pci_id_entry ati_pci_ids[];
+
+void
+InitCard(char *name)
+{
+ struct pci_id_entry *id;
+ KdCardAttr attr;
+
+ for (id = ati_pci_ids; id->name != NULL; id++) {
+ int j = 0;
+ while (LinuxFindPci(id->vendor, id->device, j++, &attr))
+ KdCardInfoAdd(&ATIFuncs, &attr, 0);
+ }
+}
+
+void
+InitOutput(ScreenInfo *pScreenInfo, int argc, char **argv)
+{
+ KdInitOutput(pScreenInfo, argc, argv);
+}
+
+void
+InitInput(int argc, char **argv)
+{
+ KdOsAddInputDrivers();
+ KdInitInput();
+}
+
+void
+ddxUseMsg (void)
+{
+ KdUseMsg();
+#ifdef KDRIVEVESA
+ vesaUseMsg();
+#endif
+}
+
+int
+ddxProcessArgument(int argc, char **argv, int i)
+{
+ int ret;
+
+#ifdef KDRIVEVESA
+ if (!(ret = vesaProcessArgument (argc, argv, i)))
+#endif
+ ret = KdProcessArgument(argc, argv, i);
+
+ return ret;
+}
diff --git a/xorg-server/hw/kdrive/ati/ati_video.c b/xorg-server/hw/kdrive/ati/ati_video.c
new file mode 100644
index 000000000..ca0ab464a
--- /dev/null
+++ b/xorg-server/hw/kdrive/ati/ati_video.c
@@ -0,0 +1,988 @@
+/*
+ * Copyright © 2004 Keith Packard
+ * Copyright © 2005 Eric Anholt
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that
+ * copyright notice and this permission notice appear in supporting
+ * documentation, and that the name of Eric Anholt not be used in
+ * advertising or publicity pertaining to distribution of the software without
+ * specific, written prior permission. Eric Anholt makes no
+ * representations about the suitability of this software for any purpose. It
+ * is provided "as is" without express or implied warranty.
+ *
+ * ERIC ANHOLT DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL ERIC ANHOLT BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ *
+ * Based on mach64video.c by Keith Packard.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include <kdrive-config.h>
+#endif
+#include "ati.h"
+#include "ati_dma.h"
+#include "ati_draw.h"
+#include "ati_reg.h"
+#include "kaa.h"
+
+#include <X11/extensions/Xv.h>
+#include "fourcc.h"
+
+#define MAKE_ATOM(a) MakeAtom(a, sizeof(a) - 1, TRUE)
+
+static Atom xvBrightness, xvSaturation;
+
+extern CARD8 ATIBltRop[16];
+
+#define IMAGE_MAX_WIDTH 2048
+#define IMAGE_MAX_HEIGHT 2048
+
+static void
+ATIStopVideo(KdScreenInfo *screen, pointer data, Bool exit)
+{
+ ScreenPtr pScreen = screen->pScreen;
+ ATIPortPrivPtr pPortPriv = (ATIPortPrivPtr)data;
+
+ REGION_EMPTY(screen->pScreen, &pPortPriv->clip);
+
+ if (pPortPriv->off_screen) {
+ KdOffscreenFree (pScreen, pPortPriv->off_screen);
+ pPortPriv->off_screen = 0;
+ }
+}
+
+static int
+ATISetPortAttribute(KdScreenInfo *screen, Atom attribute, int value,
+ pointer data)
+{
+ return BadMatch;
+}
+
+static int
+ATIGetPortAttribute(KdScreenInfo *screen, Atom attribute, int *value,
+ pointer data)
+{
+ return BadMatch;
+}
+
+static void
+ATIQueryBestSize(KdScreenInfo *screen, Bool motion, short vid_w, short vid_h,
+ short drw_w, short drw_h, unsigned int *p_w, unsigned int *p_h,
+ pointer data)
+{
+ *p_w = drw_w;
+ *p_h = drw_h;
+}
+
+/* ATIClipVideo -
+
+ Takes the dst box in standard X BoxRec form (top and left
+ edges inclusive, bottom and right exclusive). The new dst
+ box is returned. The source boundaries are given (x1, y1
+ inclusive, x2, y2 exclusive) and returned are the new source
+ boundaries in 16.16 fixed point.
+*/
+
+static void
+ATIClipVideo(BoxPtr dst, INT32 *x1, INT32 *x2, INT32 *y1, INT32 *y2,
+ BoxPtr extents, INT32 width, INT32 height)
+{
+ INT32 vscale, hscale, delta;
+ int diff;
+
+ hscale = ((*x2 - *x1) << 16) / (dst->x2 - dst->x1);
+ vscale = ((*y2 - *y1) << 16) / (dst->y2 - dst->y1);
+
+ *x1 <<= 16; *x2 <<= 16;
+ *y1 <<= 16; *y2 <<= 16;
+
+ diff = extents->x1 - dst->x1;
+ if (diff > 0) {
+ dst->x1 = extents->x1;
+ *x1 += diff * hscale;
+ }
+ diff = dst->x2 - extents->x2;
+ if (diff > 0) {
+ dst->x2 = extents->x2;
+ *x2 -= diff * hscale;
+ }
+ diff = extents->y1 - dst->y1;
+ if (diff > 0) {
+ dst->y1 = extents->y1;
+ *y1 += diff * vscale;
+ }
+ diff = dst->y2 - extents->y2;
+ if (diff > 0) {
+ dst->y2 = extents->y2;
+ *y2 -= diff * vscale;
+ }
+
+ if (*x1 < 0) {
+ diff = (- *x1 + hscale - 1)/ hscale;
+ dst->x1 += diff;
+ *x1 += diff * hscale;
+ }
+ delta = *x2 - (width << 16);
+ if (delta > 0) {
+ diff = (delta + hscale - 1)/ hscale;
+ dst->x2 -= diff;
+ *x2 -= diff * hscale;
+ }
+ if (*y1 < 0) {
+ diff = (- *y1 + vscale - 1)/ vscale;
+ dst->y1 += diff;
+ *y1 += diff * vscale;
+ }
+ delta = *y2 - (height << 16);
+ if (delta > 0) {
+ diff = (delta + vscale - 1)/ vscale;
+ dst->y2 -= diff;
+ *y2 -= diff * vscale;
+ }
+}
+
+static void
+R128DisplayVideo(KdScreenInfo *screen, ATIPortPrivPtr pPortPriv)
+{
+ ScreenPtr pScreen = screen->pScreen;
+ KdScreenPriv(pScreen);
+ ATIScreenInfo(pScreenPriv);
+ CARD32 dstDatatype, srcDatatype;
+ CARD32 dst_offset, dst_pitch;
+ int dstxoff, dstyoff;
+ PixmapPtr pPixmap = pPortPriv->pPixmap;
+ int bpp = pPixmap->drawable.bitsPerPixel;
+ RING_LOCALS;
+
+ BoxPtr pBox = REGION_RECTS(&pPortPriv->clip);
+ int nBox = REGION_NUM_RECTS(&pPortPriv->clip);
+
+ if (pPortPriv->id == FOURCC_UYVY)
+ srcDatatype = R128_DATATYPE_YVYU_422;
+ else
+ srcDatatype = R128_DATATYPE_VYUY_422;
+
+ switch (bpp)
+ {
+ case 16:
+ if (pPixmap->drawable.depth == 15)
+ dstDatatype = R128_DATATYPE_ARGB1555;
+ else
+ dstDatatype = R128_DATATYPE_RGB565;
+ break;
+ case 32:
+ dstDatatype = R128_DATATYPE_ARGB8888;
+ break;
+ default:
+ return;
+ }
+
+ dst_offset = ((CARD8 *)pPixmap->devPrivate.ptr -
+ pScreenPriv->screen->memory_base);
+ dst_pitch = pPixmap->devKind;
+#ifdef COMPOSITE
+ dstxoff = -pPixmap->screen_x + pPixmap->drawable.x;
+ dstyoff = -pPixmap->screen_y + pPixmap->drawable.y;
+#else
+ dstxoff = 0;
+ dstyoff = 0;
+#endif
+
+ BEGIN_DMA(18);
+ OUT_REG(ATI_REG_DST_PITCH_OFFSET,
+ ((dst_pitch / bpp) << 21) | (dst_offset >> 5));
+ OUT_REG(ATI_REG_DP_GUI_MASTER_CNTL,
+ ATI_GMC_DST_PITCH_OFFSET_CNTL |
+ ATI_GMC_BRUSH_NONE |
+ (dstDatatype << 8) |
+ ATI_GMC_SRC_DATATYPE_COLOR |
+ (ATIBltRop[GXcopy] << 16) |
+ R128_GMC_3D_FCN_EN |
+ ATI_GMC_CLR_CMP_CNTL_DIS |
+ R128_GMC_AUX_CLIP_DIS);
+ OUT_REG(ATI_REG_DP_CNTL,
+ ATI_DST_X_LEFT_TO_RIGHT | ATI_DST_Y_TOP_TO_BOTTOM );
+ OUT_REG(R128_REG_SCALE_3D_CNTL,
+ R128_SCALE_3D_SCALE |
+ R128_SBLEND_ONE |
+ R128_DBLEND_ZERO);
+ OUT_REG(R128_REG_TEX_CNTL_C, R128_TEX_CACHE_FLUSH);
+ OUT_REG(R128_REG_SCALE_3D_DATATYPE, srcDatatype);
+
+ OUT_RING(DMA_PACKET0(R128_REG_SCALE_PITCH, 5));
+ OUT_RING_REG(R128_REG_SCALE_PITCH, pPortPriv->src_pitch / 16);
+ OUT_RING_REG(R128_REG_SCALE_X_INC,
+ (pPortPriv->src_w << 16) / pPortPriv->dst_w);
+ OUT_RING_REG(R128_REG_SCALE_Y_INC,
+ (pPortPriv->src_h << 16) / pPortPriv->dst_h);
+ OUT_RING_REG(R128_REG_SCALE_HACC, 0x0);
+ OUT_RING_REG(R128_REG_SCALE_VACC, 0x0);
+
+ END_DMA();
+
+ while (nBox--) {
+ int srcX, srcY, dstX, dstY, srcw, srch, dstw, dsth;
+
+ dstX = pBox->x1 + dstxoff;
+ dstY = pBox->y1 + dstyoff;
+ dstw = pBox->x2 - pBox->x1;
+ dsth = pBox->y2 - pBox->y1;
+ srcX = (pBox->x1 - pPortPriv->dst_x1) *
+ pPortPriv->src_w / pPortPriv->dst_w;
+ srcY = (pBox->y1 - pPortPriv->dst_y1) *
+ pPortPriv->src_h / pPortPriv->dst_h;
+ srcw = pPortPriv->src_w - srcX;
+ srch = pPortPriv->src_h - srcY;
+
+ BEGIN_DMA(6);
+ OUT_RING(DMA_PACKET0(R128_REG_SCALE_SRC_HEIGHT_WIDTH, 2));
+ OUT_RING_REG(R128_REG_SCALE_SRC_HEIGHT_WIDTH,
+ (srch << 16) | srcw);
+ OUT_RING_REG(R128_REG_SCALE_OFFSET_0, pPortPriv->src_offset +
+ srcY * pPortPriv->src_pitch + srcX * 2);
+
+ OUT_RING(DMA_PACKET0(R128_REG_SCALE_DST_X_Y, 2));
+ OUT_RING_REG(R128_REG_SCALE_DST_X_Y, (dstX << 16) | dstY);
+ OUT_RING_REG(R128_REG_SCALE_DST_HEIGHT_WIDTH,
+ (dsth << 16) | dstw);
+ END_DMA();
+ pBox++;
+ }
+#ifdef DAMAGEEXT
+ /* XXX: Shouldn't this be in kxv.c instead? */
+ DamageDamageRegion(pPortPriv->pDraw, &pPortPriv->clip);
+#endif
+ kaaMarkSync(pScreen);
+}
+
+union intfloat {
+ float f;
+ CARD32 i;
+};
+
+struct blend_vertex {
+ union intfloat x, y;
+ union intfloat s0, t0;
+};
+
+#define VTX_DWORD_COUNT 4
+
+#define VTX_OUT(vtx) \
+do { \
+ OUT_RING(vtx.x.i); \
+ OUT_RING(vtx.y.i); \
+ OUT_RING(vtx.s0.i); \
+ OUT_RING(vtx.t0.i); \
+} while (0)
+
+static void
+RadeonDisplayVideo(KdScreenInfo *screen, ATIPortPrivPtr pPortPriv)
+{
+ ScreenPtr pScreen = screen->pScreen;
+ KdScreenPriv(pScreen);
+ ATICardInfo(pScreenPriv);
+ ATIScreenInfo(pScreenPriv);
+ struct blend_vertex vtx[4];
+ PixmapPtr pPixmap = pPortPriv->pPixmap;
+ CARD32 txformat;
+ CARD32 dst_offset, dst_pitch, dst_format;
+ int dstxoff, dstyoff, pixel_shift;
+ RING_LOCALS;
+
+ BoxPtr pBox = REGION_RECTS(&pPortPriv->clip);
+ int nBox = REGION_NUM_RECTS(&pPortPriv->clip);
+
+ switch (pPixmap->drawable.bitsPerPixel) {
+ case 16:
+ if (pPixmap->drawable.depth == 15)
+ dst_format = RADEON_COLOR_FORMAT_ARGB1555;
+ else
+ dst_format = RADEON_COLOR_FORMAT_RGB565;
+ pixel_shift = 1;
+ break;
+ case 32:
+ dst_format = RADEON_COLOR_FORMAT_ARGB8888;
+ pixel_shift = 2;
+ break;
+ default:
+ return;
+ }
+
+ dst_offset = ((CARD8 *)pPixmap->devPrivate.ptr -
+ pScreenPriv->screen->memory_base);
+ dst_pitch = pPixmap->devKind;
+
+#ifdef COMPOSITE
+ dstxoff = -pPixmap->screen_x + pPixmap->drawable.x;
+ dstyoff = -pPixmap->screen_y + pPixmap->drawable.y;
+#else
+ dstxoff = 0;
+ dstyoff = 0;
+#endif
+
+ /* Same for R100/R200 */
+ if (pPortPriv->id == FOURCC_UYVY)
+ txformat = RADEON_TXFORMAT_YVYU422;
+ else
+ txformat = RADEON_TXFORMAT_VYUY422;
+
+ txformat |= RADEON_TXFORMAT_NON_POWER2;
+
+ RadeonSwitchTo3D(atis);
+
+ BEGIN_DMA(8);
+
+ OUT_RING(DMA_PACKET0(RADEON_REG_PP_CNTL, 3));
+ OUT_RING_REG(RADEON_REG_PP_CNTL,
+ RADEON_TEX_0_ENABLE | RADEON_TEX_BLEND_0_ENABLE);
+ OUT_RING_REG(RADEON_REG_RB3D_CNTL,
+ dst_format | RADEON_ALPHA_BLEND_ENABLE);
+ OUT_RING_REG(RADEON_REG_RB3D_COLOROFFSET, dst_offset);
+
+ OUT_REG(RADEON_REG_RB3D_COLORPITCH, dst_pitch >> pixel_shift);
+
+ OUT_REG(RADEON_REG_RB3D_BLENDCNTL,
+ RADEON_SBLEND_GL_ONE | RADEON_DBLEND_GL_ZERO);
+
+ END_DMA();
+
+ if (atic->is_r200) {
+ BEGIN_DMA(17);
+
+ OUT_REG(R200_REG_SE_VTX_FMT_0, R200_VTX_XY);
+ OUT_REG(R200_REG_SE_VTX_FMT_1,
+ (2 << R200_VTX_TEX0_COMP_CNT_SHIFT));
+
+ OUT_RING(DMA_PACKET0(R200_REG_PP_TXFILTER_0, 5));
+ OUT_RING_REG(R200_REG_PP_TXFILTER_0,
+ R200_MAG_FILTER_LINEAR |
+ R200_MIN_FILTER_LINEAR |
+ R200_YUV_TO_RGB);
+ OUT_RING_REG(R200_REG_PP_TXFORMAT_0, txformat);
+ OUT_RING_REG(R200_REG_PP_TXFORMAT_X_0, 0);
+ OUT_RING_REG(R200_REG_PP_TXSIZE_0,
+ (pPixmap->drawable.width - 1) |
+ ((pPixmap->drawable.height - 1) << RADEON_TEX_VSIZE_SHIFT));
+ OUT_RING_REG(R200_REG_PP_TXPITCH_0, pPortPriv->src_pitch - 32);
+
+ OUT_REG(R200_PP_TXOFFSET_0, pPortPriv->src_offset);
+
+ OUT_RING(DMA_PACKET0(R200_REG_PP_TXCBLEND_0, 4));
+ OUT_RING_REG(R200_REG_PP_TXCBLEND_0,
+ R200_TXC_ARG_A_ZERO |
+ R200_TXC_ARG_B_ZERO |
+ R200_TXC_ARG_C_R0_COLOR |
+ R200_TXC_OP_MADD);
+ OUT_RING_REG(R200_REG_PP_TXCBLEND2_0,
+ R200_TXC_CLAMP_0_1 | R200_TXC_OUTPUT_REG_R0);
+ OUT_RING_REG(R200_REG_PP_TXABLEND_0,
+ R200_TXA_ARG_A_ZERO |
+ R200_TXA_ARG_B_ZERO |
+ R200_TXA_ARG_C_R0_ALPHA |
+ R200_TXA_OP_MADD);
+ OUT_RING_REG(R200_REG_PP_TXABLEND2_0,
+ R200_TXA_CLAMP_0_1 | R200_TXA_OUTPUT_REG_R0);
+
+ END_DMA();
+ } else {
+// BEGIN_DMA(11);
+ BEGIN_DMA(9);
+
+ OUT_RING(DMA_PACKET0(RADEON_REG_PP_TXFILTER_0, 5));
+ OUT_RING_REG(RADEON_REG_PP_TXFILTER_0, RADEON_MAG_FILTER_LINEAR |
+ RADEON_MIN_FILTER_LINEAR |
+ RADEON_YUV_TO_RGB);
+ OUT_RING_REG(RADEON_REG_PP_TXFORMAT_0, txformat);
+ OUT_RING_REG(RADEON_REG_PP_TXOFFSET_0, pPortPriv->src_offset);
+ OUT_RING_REG(RADEON_REG_PP_TXCBLEND_0,
+ RADEON_COLOR_ARG_A_ZERO |
+ RADEON_COLOR_ARG_B_ZERO |
+ RADEON_COLOR_ARG_C_T0_COLOR |
+ RADEON_BLEND_CTL_ADD |
+ RADEON_CLAMP_TX);
+ OUT_RING_REG(RADEON_REG_PP_TXABLEND_0,
+ RADEON_ALPHA_ARG_A_ZERO |
+ RADEON_ALPHA_ARG_B_ZERO |
+ RADEON_ALPHA_ARG_C_T0_ALPHA |
+ RADEON_BLEND_CTL_ADD |
+ RADEON_CLAMP_TX);
+
+ OUT_RING(DMA_PACKET0(RADEON_REG_PP_TEX_SIZE_0, 2));
+ OUT_RING_REG(RADEON_REG_PP_TEX_SIZE_0,
+ (pPixmap->drawable.width - 1) |
+ ((pPixmap->drawable.height - 1) << RADEON_TEX_VSIZE_SHIFT));
+ OUT_RING_REG(RADEON_REG_PP_TEX_PITCH_0,
+ pPortPriv->src_pitch - 32);
+
+// OUT_RING_REG(ATI_REG_WAIT_UNTIL, ATI_WAIT_CRTC_VLINE);
+
+ END_DMA();
+ }
+
+ while (nBox--) {
+ float srcX, srcY, dstX, dstY, srcw, srch, dstw, dsth;
+
+ dstX = pBox->x1 + dstxoff;
+ dstY = pBox->y1 + dstyoff;
+ dstw = pBox->x2 - pBox->x1;
+ dsth = pBox->y2 - pBox->y1;
+ srcX = (pBox->x1 - pPortPriv->dst_x1) *
+ pPortPriv->src_w / pPortPriv->dst_w;
+ srcY = (pBox->y1 - pPortPriv->dst_y1) *
+ pPortPriv->src_h / pPortPriv->dst_h;
+ srcw = pPortPriv->src_w * (dstw / pPortPriv->dst_w);
+ srch = pPortPriv->src_h * (dsth / pPortPriv->dst_h);
+
+ /*
+ * rectangle:
+ *
+ * +---------2
+ * | |
+ * | |
+ * 0---------1
+ */
+
+ vtx[0].x.f = dstX;
+ vtx[0].y.f = dstY + dsth;
+ vtx[0].s0.f = srcX;
+ vtx[0].t0.f = srcY + srch;
+
+ vtx[1].x.f = dstX + dstw;
+ vtx[1].y.f = dstY + dsth;
+ vtx[1].s0.f = srcX + srcw;
+ vtx[1].t0.f = srcY + srch;
+
+ vtx[2].x.f = dstX + dstw;
+ vtx[2].y.f = dstY;
+ vtx[2].s0.f = srcX + srcw;
+ vtx[2].t0.f = srcY;
+
+ if (atic->is_r100) {
+ BEGIN_DMA(3 * VTX_DWORD_COUNT + 3);
+ OUT_RING(DMA_PACKET3(RADEON_CP_PACKET3_3D_DRAW_IMMD,
+ 3 * VTX_DWORD_COUNT + 2));
+ OUT_RING(RADEON_CP_VC_FRMT_XY |
+ RADEON_CP_VC_FRMT_ST0);
+ OUT_RING(RADEON_CP_VC_CNTL_PRIM_TYPE_RECT_LIST |
+ RADEON_CP_VC_CNTL_PRIM_WALK_RING |
+ RADEON_CP_VC_CNTL_MAOS_ENABLE |
+ RADEON_CP_VC_CNTL_VTX_FMT_RADEON_MODE |
+ (3 << RADEON_CP_VC_CNTL_NUM_SHIFT));
+ } else {
+ BEGIN_DMA(3 * VTX_DWORD_COUNT + 2);
+ OUT_RING(DMA_PACKET3(R200_CP_PACKET3_3D_DRAW_IMMD_2,
+ 3 * VTX_DWORD_COUNT + 1));
+ OUT_RING(RADEON_CP_VC_CNTL_PRIM_TYPE_RECT_LIST |
+ RADEON_CP_VC_CNTL_PRIM_WALK_RING |
+ (3 << RADEON_CP_VC_CNTL_NUM_SHIFT));
+ }
+
+ VTX_OUT(vtx[0]);
+ VTX_OUT(vtx[1]);
+ VTX_OUT(vtx[2]);
+ END_DMA();
+
+ pBox++;
+ }
+#ifdef DAMAGEEXT
+ /* XXX: Shouldn't this be in kxv.c instead? */
+ DamageDamageRegion(pPortPriv->pDraw, &pPortPriv->clip);
+#endif
+ kaaMarkSync(pScreen);
+}
+
+static void
+ATIVideoSave(ScreenPtr pScreen, KdOffscreenArea *area)
+{
+ KdScreenPriv(pScreen);
+ ATIScreenInfo(pScreenPriv);
+ ATIPortPrivPtr pPortPriv = atis->pAdaptor->pPortPrivates[0].ptr;
+
+ if (pPortPriv->off_screen == area)
+ pPortPriv->off_screen = 0;
+}
+
+static int
+ATIPutImage(KdScreenInfo *screen, DrawablePtr pDraw,
+ short src_x, short src_y,
+ short drw_x, short drw_y,
+ short src_w, short src_h,
+ short drw_w, short drw_h,
+ int id,
+ unsigned char *buf,
+ short width,
+ short height,
+ Bool sync,
+ RegionPtr clipBoxes,
+ pointer data)
+{
+ ScreenPtr pScreen = screen->pScreen;
+ KdScreenPriv(pScreen);
+ ATICardInfo(pScreenPriv);
+ ATIScreenInfo(pScreenPriv);
+ ATIPortPrivPtr pPortPriv = (ATIPortPrivPtr)data;
+ char *mmio = atic->reg_base;
+ INT32 x1, x2, y1, y2;
+ int randr = RR_Rotate_0 /* XXX */;
+ int srcPitch, srcPitch2, dstPitch;
+ int top, left, npixels, nlines, size;
+ BoxRec dstBox;
+ int dst_width = width, dst_height = height;
+ int rot_x1, rot_y1, rot_x2, rot_y2;
+ int dst_x1, dst_y1, dst_x2, dst_y2;
+ int rot_src_w, rot_src_h, rot_drw_w, rot_drw_h;
+
+ /* Clip */
+ x1 = src_x;
+ x2 = src_x + src_w;
+ y1 = src_y;
+ y2 = src_y + src_h;
+
+ dstBox.x1 = drw_x;
+ dstBox.x2 = drw_x + drw_w;
+ dstBox.y1 = drw_y;
+ dstBox.y2 = drw_y + drw_h;
+
+ ATIClipVideo(&dstBox, &x1, &x2, &y1, &y2,
+ REGION_EXTENTS(pScreen, clipBoxes), width, height);
+
+ src_w = (x2 - x1) >> 16;
+ src_h = (y2 - y1) >> 16;
+ drw_w = dstBox.x2 - dstBox.x1;
+ drw_h = dstBox.y2 - dstBox.y1;
+
+ if ((x1 >= x2) || (y1 >= y2))
+ return Success;
+
+ if (mmio == NULL)
+ return BadAlloc;
+
+ if (randr & (RR_Rotate_0|RR_Rotate_180)) {
+ dst_width = width;
+ dst_height = height;
+ rot_src_w = src_w;
+ rot_src_h = src_h;
+ rot_drw_w = drw_w;
+ rot_drw_h = drw_h;
+ } else {
+ dst_width = height;
+ dst_height = width;
+ rot_src_w = src_h;
+ rot_src_h = src_w;
+ rot_drw_w = drw_h;
+ rot_drw_h = drw_w;
+ }
+
+ switch (randr & RR_Rotate_All) {
+ case RR_Rotate_0:
+ default:
+ dst_x1 = dstBox.x1;
+ dst_y1 = dstBox.y1;
+ dst_x2 = dstBox.x2;
+ dst_y2 = dstBox.y2;
+ rot_x1 = x1;
+ rot_y1 = y1;
+ rot_x2 = x2;
+ rot_y2 = y2;
+ break;
+ case RR_Rotate_90:
+ dst_x1 = dstBox.y1;
+ dst_y1 = screen->height - dstBox.x2;
+ dst_x2 = dstBox.y2;
+ dst_y2 = screen->height - dstBox.x1;
+ rot_x1 = y1;
+ rot_y1 = (src_w << 16) - x2;
+ rot_x2 = y2;
+ rot_y2 = (src_w << 16) - x1;
+ break;
+ case RR_Rotate_180:
+ dst_x1 = screen->width - dstBox.x2;
+ dst_y1 = screen->height - dstBox.y2;
+ dst_x2 = screen->width - dstBox.x1;
+ dst_y2 = screen->height - dstBox.y1;
+ rot_x1 = (src_w << 16) - x2;
+ rot_y1 = (src_h << 16) - y2;
+ rot_x2 = (src_w << 16) - x1;
+ rot_y2 = (src_h << 16) - y1;
+ break;
+ case RR_Rotate_270:
+ dst_x1 = screen->width - dstBox.y2;
+ dst_y1 = dstBox.x1;
+ dst_x2 = screen->width - dstBox.y1;
+ dst_y2 = dstBox.x2;
+ rot_x1 = (src_h << 16) - y2;
+ rot_y1 = x1;
+ rot_x2 = (src_h << 16) - y1;
+ rot_y2 = x2;
+ break;
+ }
+
+ switch(id) {
+ case FOURCC_YV12:
+ case FOURCC_I420:
+ dstPitch = ((dst_width << 1) + 15) & ~15;
+ srcPitch = (width + 3) & ~3;
+ srcPitch2 = ((width >> 1) + 3) & ~3;
+ size = dstPitch * dst_height;
+ break;
+ case FOURCC_UYVY:
+ case FOURCC_YUY2:
+ default:
+ dstPitch = ((dst_width << 1) + 15) & ~15;
+ srcPitch = (width << 1);
+ srcPitch2 = 0;
+ size = dstPitch * dst_height;
+ break;
+ }
+
+ if (pPortPriv->off_screen != NULL && size != pPortPriv->size) {
+ KdOffscreenFree(screen->pScreen, pPortPriv->off_screen);
+ pPortPriv->off_screen = 0;
+ }
+
+ if (pPortPriv->off_screen == NULL) {
+ pPortPriv->off_screen = KdOffscreenAlloc(screen->pScreen,
+ size * 2, 64, TRUE, ATIVideoSave, pPortPriv);
+ if (pPortPriv->off_screen == NULL)
+ return BadAlloc;
+ }
+
+
+ if (pDraw->type == DRAWABLE_WINDOW)
+ pPortPriv->pPixmap =
+ (*pScreen->GetWindowPixmap)((WindowPtr)pDraw);
+ else
+ pPortPriv->pPixmap = (PixmapPtr)pDraw;
+
+ /* Migrate the pixmap to offscreen if necessary. */
+ if (!kaaPixmapIsOffscreen(pPortPriv->pPixmap))
+ kaaMoveInPixmap(pPortPriv->pPixmap);
+
+ if (!kaaPixmapIsOffscreen(pPortPriv->pPixmap)) {
+ return BadAlloc;
+ }
+
+ pPortPriv->src_offset = pPortPriv->off_screen->offset;
+ pPortPriv->src_addr = (CARD8 *)(pScreenPriv->screen->memory_base +
+ pPortPriv->src_offset);
+ pPortPriv->src_pitch = dstPitch;
+ pPortPriv->size = size;
+ pPortPriv->pDraw = pDraw;
+
+ /* copy data */
+ top = rot_y1 >> 16;
+ left = (rot_x1 >> 16) & ~1;
+ npixels = ((((rot_x2 + 0xffff) >> 16) + 1) & ~1) - left;
+
+ /* Since we're probably overwriting the area that might still be used
+ * for the last PutImage request, wait for idle.
+ */
+ ATIWaitIdle(atis);
+
+ switch(id) {
+ case FOURCC_YV12:
+ case FOURCC_I420:
+ top &= ~1;
+ nlines = ((((rot_y2 + 0xffff) >> 16) + 1) & ~1) - top;
+ KdXVCopyPlanarData(screen, buf, pPortPriv->src_addr, randr,
+ srcPitch, srcPitch2, dstPitch, rot_src_w, rot_src_h,
+ height, top, left, nlines, npixels, id);
+ break;
+ case FOURCC_UYVY:
+ case FOURCC_YUY2:
+ default:
+ nlines = ((rot_y2 + 0xffff) >> 16) - top;
+ KdXVCopyPackedData(screen, buf, pPortPriv->src_addr, randr,
+ srcPitch, dstPitch, rot_src_w, rot_src_h, top, left,
+ nlines, npixels);
+ break;
+ }
+
+ /* update cliplist */
+ if (!REGION_EQUAL(screen->pScreen, &pPortPriv->clip, clipBoxes)) {
+ REGION_COPY(screen->pScreen, &pPortPriv->clip, clipBoxes);
+ }
+
+ pPortPriv->id = id;
+ pPortPriv->src_x1 = rot_x1;
+ pPortPriv->src_y1 = rot_y1;
+ pPortPriv->src_x2 = rot_x2;
+ pPortPriv->src_y2 = rot_y2;
+ pPortPriv->src_w = rot_src_w;
+ pPortPriv->src_h = rot_src_h;
+ pPortPriv->dst_x1 = dst_x1;
+ pPortPriv->dst_y1 = dst_y1;
+ pPortPriv->dst_x2 = dst_x2;
+ pPortPriv->dst_y2 = dst_y2;
+ pPortPriv->dst_w = rot_drw_w;
+ pPortPriv->dst_h = rot_drw_h;
+
+ if (atic->is_radeon)
+ RadeonDisplayVideo(screen, pPortPriv);
+ else
+ R128DisplayVideo(screen, pPortPriv);
+
+ return Success;
+}
+
+static int
+ATIReputImage(KdScreenInfo *screen, DrawablePtr pDraw, short drw_x, short drw_y,
+ RegionPtr clipBoxes, pointer data)
+{
+ ScreenPtr pScreen = screen->pScreen;
+ KdScreenPriv(pScreen);
+ ATICardInfo(pScreenPriv);
+ ATIPortPrivPtr pPortPriv = (ATIPortPrivPtr)data;
+ BoxPtr pOldExtents = REGION_EXTENTS(screen->pScreen, &pPortPriv->clip);
+ BoxPtr pNewExtents = REGION_EXTENTS(screen->pScreen, clipBoxes);
+
+ if (pOldExtents->x1 != pNewExtents->x1 ||
+ pOldExtents->x2 != pNewExtents->x2 ||
+ pOldExtents->y1 != pNewExtents->y1 ||
+ pOldExtents->y2 != pNewExtents->y2)
+ return BadMatch;
+
+ if (pDraw->type == DRAWABLE_WINDOW)
+ pPortPriv->pPixmap =
+ (*pScreen->GetWindowPixmap)((WindowPtr)pDraw);
+ else
+ pPortPriv->pPixmap = (PixmapPtr)pDraw;
+
+ if (!kaaPixmapIsOffscreen(pPortPriv->pPixmap))
+ kaaMoveInPixmap(pPortPriv->pPixmap);
+
+ if (!kaaPixmapIsOffscreen(pPortPriv->pPixmap)) {
+ ErrorF("err\n");
+ return BadAlloc;
+ }
+
+
+ /* update cliplist */
+ if (!REGION_EQUAL(screen->pScreen, &pPortPriv->clip, clipBoxes))
+ REGION_COPY(screen->pScreen, &pPortPriv->clip, clipBoxes);
+
+ /* XXX: What do the drw_x and drw_y here mean for us? */
+
+ if (atic->is_radeon)
+ RadeonDisplayVideo(screen, pPortPriv);
+ else
+ R128DisplayVideo(screen, pPortPriv);
+
+ return Success;
+}
+
+static int
+ATIQueryImageAttributes(KdScreenInfo *screen, int id, unsigned short *w,
+ unsigned short *h, int *pitches, int *offsets)
+{
+ int size, tmp;
+
+ if (*w > IMAGE_MAX_WIDTH)
+ *w = IMAGE_MAX_WIDTH;
+ if (*h > IMAGE_MAX_HEIGHT)
+ *h = IMAGE_MAX_HEIGHT;
+
+ *w = (*w + 1) & ~1;
+ if (offsets)
+ offsets[0] = 0;
+
+ switch (id)
+ {
+ case FOURCC_YV12:
+ case FOURCC_I420:
+ *h = (*h + 1) & ~1;
+ size = (*w + 3) & ~3;
+ if (pitches)
+ pitches[0] = size;
+ size *= *h;
+ if (offsets)
+ offsets[1] = size;
+ tmp = ((*w >> 1) + 3) & ~3;
+ if (pitches)
+ pitches[1] = pitches[2] = tmp;
+ tmp *= (*h >> 1);
+ size += tmp;
+ if (offsets)
+ offsets[2] = size;
+ size += tmp;
+ break;
+ case FOURCC_UYVY:
+ case FOURCC_YUY2:
+ default:
+ size = *w << 1;
+ if (pitches)
+ pitches[0] = size;
+ size *= *h;
+ break;
+ }
+
+ return size;
+}
+
+
+/* client libraries expect an encoding */
+static KdVideoEncodingRec DummyEncoding[1] =
+{
+ {
+ 0,
+ "XV_IMAGE",
+ IMAGE_MAX_WIDTH, IMAGE_MAX_HEIGHT,
+ {1, 1}
+ }
+};
+
+#define NUM_FORMATS 3
+
+static KdVideoFormatRec Formats[NUM_FORMATS] =
+{
+ {15, TrueColor}, {16, TrueColor}, {24, TrueColor}
+};
+
+#define NUM_ATTRIBUTES 0
+
+static KdAttributeRec Attributes[NUM_ATTRIBUTES] =
+{
+};
+
+#define NUM_IMAGES 4
+
+static KdImageRec Images[NUM_IMAGES] =
+{
+ XVIMAGE_YUY2,
+ XVIMAGE_YV12,
+ XVIMAGE_I420,
+ XVIMAGE_UYVY
+};
+
+static KdVideoAdaptorPtr
+ATISetupImageVideo(ScreenPtr pScreen)
+{
+ KdScreenPriv(pScreen);
+ ATIScreenInfo(pScreenPriv);
+ KdVideoAdaptorPtr adapt;
+ ATIPortPrivPtr pPortPriv;
+ int i;
+
+ atis->num_texture_ports = 16;
+
+ adapt = xcalloc(1, sizeof(KdVideoAdaptorRec) + atis->num_texture_ports *
+ (sizeof(ATIPortPrivRec) + sizeof(DevUnion)));
+ if (adapt == NULL)
+ return NULL;
+
+ adapt->type = XvWindowMask | XvInputMask | XvImageMask;
+ adapt->flags = VIDEO_CLIP_TO_VIEWPORT;
+ adapt->name = "ATI Texture Video";
+ adapt->nEncodings = 1;
+ adapt->pEncodings = DummyEncoding;
+ adapt->nFormats = NUM_FORMATS;
+ adapt->pFormats = Formats;
+ adapt->nPorts = atis->num_texture_ports;
+ adapt->pPortPrivates = (DevUnion*)(&adapt[1]);
+
+ pPortPriv =
+ (ATIPortPrivPtr)(&adapt->pPortPrivates[atis->num_texture_ports]);
+
+ for (i = 0; i < atis->num_texture_ports; i++)
+ adapt->pPortPrivates[i].ptr = &pPortPriv[i];
+
+ adapt->nAttributes = NUM_ATTRIBUTES;
+ adapt->pAttributes = Attributes;
+ adapt->pImages = Images;
+ adapt->nImages = NUM_IMAGES;
+ adapt->PutVideo = NULL;
+ adapt->PutStill = NULL;
+ adapt->GetVideo = NULL;
+ adapt->GetStill = NULL;
+ adapt->StopVideo = ATIStopVideo;
+ adapt->SetPortAttribute = ATISetPortAttribute;
+ adapt->GetPortAttribute = ATIGetPortAttribute;
+ adapt->QueryBestSize = ATIQueryBestSize;
+ adapt->PutImage = ATIPutImage;
+ adapt->ReputImage = ATIReputImage;
+ adapt->QueryImageAttributes = ATIQueryImageAttributes;
+
+ /* gotta uninit this someplace */
+ REGION_INIT(pScreen, &pPortPriv->clip, NullBox, 0);
+
+ atis->pAdaptor = adapt;
+
+ xvBrightness = MAKE_ATOM("XV_BRIGHTNESS");
+ xvSaturation = MAKE_ATOM("XV_SATURATION");
+
+ return adapt;
+}
+
+Bool ATIInitVideo(ScreenPtr pScreen)
+{
+ KdScreenPriv(pScreen);
+ ATIScreenInfo(pScreenPriv);
+ ATICardInfo(pScreenPriv);
+ KdScreenInfo *screen = pScreenPriv->screen;
+ KdVideoAdaptorPtr *adaptors, *newAdaptors = NULL;
+ KdVideoAdaptorPtr newAdaptor = NULL;
+ int num_adaptors;
+
+ atis->pAdaptor = NULL;
+
+ if (atic->reg_base == NULL)
+ return FALSE;
+ if (atic->is_r300)
+ return FALSE;
+
+ num_adaptors = KdXVListGenericAdaptors(screen, &adaptors);
+
+ newAdaptor = ATISetupImageVideo(pScreen);
+
+ if (newAdaptor) {
+ if (!num_adaptors) {
+ num_adaptors = 1;
+ adaptors = &newAdaptor;
+ } else {
+ newAdaptors = xalloc((num_adaptors + 1) *
+ sizeof(KdVideoAdaptorPtr *));
+ if (newAdaptors) {
+ memcpy(newAdaptors, adaptors, num_adaptors *
+ sizeof(KdVideoAdaptorPtr));
+ newAdaptors[num_adaptors] = newAdaptor;
+ adaptors = newAdaptors;
+ num_adaptors++;
+ }
+ }
+ }
+
+ if (num_adaptors)
+ KdXVScreenInit(pScreen, adaptors, num_adaptors);
+
+ if (newAdaptors)
+ xfree(newAdaptors);
+
+ return TRUE;
+}
+
+void
+ATIFiniVideo(ScreenPtr pScreen)
+{
+ KdScreenPriv(pScreen);
+ ATIScreenInfo(pScreenPriv);
+ KdVideoAdaptorPtr adapt = atis->pAdaptor;
+ ATIPortPrivPtr pPortPriv;
+ int i;
+
+ if (!adapt)
+ return;
+
+ for (i = 0; i < atis->num_texture_ports; i++) {
+ pPortPriv = (ATIPortPrivPtr)(&adapt->pPortPrivates[i].ptr);
+ REGION_UNINIT(pScreen, &pPortPriv->clip);
+ }
+ xfree(adapt);
+ atis->pAdaptor = NULL;
+}
diff --git a/xorg-server/hw/kdrive/ati/r128_composite.c b/xorg-server/hw/kdrive/ati/r128_composite.c
new file mode 100644
index 000000000..0d18ebff7
--- /dev/null
+++ b/xorg-server/hw/kdrive/ati/r128_composite.c
@@ -0,0 +1,564 @@
+/*
+ * Copyright © 2003 Eric Anholt, Anders Carlsson
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that
+ * copyright notice and this permission notice appear in supporting
+ * documentation, and that the name of Eric Anholt not be used in
+ * advertising or publicity pertaining to distribution of the software without
+ * specific, written prior permission. Eric Anholt makes no
+ * representations about the suitability of this software for any purpose. It
+ * is provided "as is" without express or implied warranty.
+ *
+ * ERIC ANHOLT DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL ERIC ANHOLT BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#include "ati.h"
+#include "ati_reg.h"
+#include "ati_dma.h"
+#include "ati_draw.h"
+
+extern ATIScreenInfo *accel_atis;
+extern int sample_count;
+extern float sample_offsets_x[255];
+extern float sample_offsets_y[255];
+extern CARD8 ATIBltRop[16];
+
+static int widths[2] = {1,1};
+static int heights[2] = {1,1};
+static Bool is_transform[2];
+static PictTransform *transform[2];
+
+struct blendinfo {
+ Bool dst_alpha;
+ Bool src_alpha;
+ CARD32 blendctl;
+};
+
+static struct blendinfo R128BlendOp[] = {
+ /* Clear */
+ {0, 0, R128_SBLEND_ZERO | R128_DBLEND_ZERO},
+ /* Src */
+ {0, 0, R128_SBLEND_ONE | R128_DBLEND_ZERO},
+ /* Dst */
+ {0, 0, R128_SBLEND_ZERO | R128_DBLEND_ONE},
+ /* Over */
+ {0, 1, R128_SBLEND_ONE | R128_DBLEND_INV_SRC_ALPHA},
+ /* OverReverse */
+ {1, 0, R128_SBLEND_INV_DST_ALPHA | R128_DBLEND_ONE},
+ /* In */
+ {1, 0, R128_SBLEND_DST_ALPHA | R128_DBLEND_ZERO},
+ /* InReverse */
+ {0, 1, R128_SBLEND_ZERO | R128_DBLEND_SRC_ALPHA},
+ /* Out */
+ {1, 0, R128_SBLEND_INV_DST_ALPHA | R128_DBLEND_ZERO},
+ /* OutReverse */
+ {0, 1, R128_SBLEND_ZERO | R128_DBLEND_INV_SRC_ALPHA},
+ /* Atop */
+ {1, 1, R128_SBLEND_DST_ALPHA | R128_DBLEND_INV_SRC_ALPHA},
+ /* AtopReverse */
+ {1, 1, R128_SBLEND_INV_DST_ALPHA | R128_DBLEND_SRC_ALPHA},
+ /* Xor */
+ {1, 1, R128_SBLEND_INV_DST_ALPHA | R128_DBLEND_INV_SRC_ALPHA},
+ /* Add */
+ {0, 0, R128_SBLEND_ONE | R128_DBLEND_ONE},
+};
+
+static Bool
+R128GetDatatypePict(CARD32 format, CARD32 *type)
+{
+ switch (format) {
+ case PICT_a1r5g5b5:
+ case PICT_x1r5g5b5:
+ *type = R128_DATATYPE_ARGB1555;
+ return TRUE;
+ case PICT_r5g6b5:
+ *type = R128_DATATYPE_RGB565;
+ return TRUE;
+ case PICT_a8r8g8b8:
+ case PICT_x8r8g8b8:
+ *type = R128_DATATYPE_ARGB8888;
+ return TRUE;
+ default:
+ return FALSE;
+ }
+
+}
+
+static Bool
+R128CheckCompositeTexture(PicturePtr pPict)
+{
+ int w = pPict->pDrawable->width;
+ int h = pPict->pDrawable->height;
+
+ if (w > (1 << 10) || h > (1 << 10))
+ ATI_FALLBACK(("Picture w/h too large (%dx%d)\n", w, h));
+ if (pPict->repeat && ((w & (w - 1)) != 0 || (h & (h - 1)) != 0))
+ ATI_FALLBACK(("NPOT repeat unsupported (%dx%d)\n", w, h));
+
+ switch (pPict->format) {
+ case PICT_a8:
+ case PICT_a1r5g5b5:
+ case PICT_a4r4g4b4:
+ case PICT_r5g6b5:
+ case PICT_a8r8g8b8:
+ break;
+ default:
+ ATI_FALLBACK(("Unsupported picture format 0x%x\n",
+ pPict->format));
+ }
+
+ return TRUE;
+}
+
+Bool
+R128CheckComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
+ PicturePtr pDstPicture)
+{
+ CARD32 dstDatatype;
+
+ if (op >= sizeof(R128BlendOp)/sizeof(R128BlendOp[0]))
+ ATI_FALLBACK(("Unsupported op 0x%x\n", op));
+ if (pDstPicture->format == PICT_a8) {
+ if (R128BlendOp[op].src_alpha || R128BlendOp[op].dst_alpha ||
+ pMaskPicture != NULL)
+ ATI_FALLBACK(("alpha blending unsupported with "
+ "A8 dst?\n"));
+ } else if (!R128GetDatatypePict(pDstPicture->format, &dstDatatype)) {
+ ATI_FALLBACK(("Unsupported dest format 0x%x\n",
+ pDstPicture->format));
+ }
+ if (pMaskPicture != NULL && pMaskPicture->componentAlpha &&
+ R128BlendOp[op].src_alpha)
+ ATI_FALLBACK(("Component alpha not supported with source alpha "
+ "blending.\n"));
+
+ if (!R128CheckCompositeTexture(pSrcPicture))
+ return FALSE;
+ if (pMaskPicture != NULL && !R128CheckCompositeTexture(pMaskPicture))
+ return FALSE;
+
+ return TRUE;
+}
+
+static Bool
+R128TextureSetup(PicturePtr pPict, PixmapPtr pPix, int unit, CARD32 *txsize,
+ CARD32 *tex_cntl_c)
+{
+ int w = pPict->pDrawable->width;
+ int h = pPict->pDrawable->height;
+ int bytepp, shift, l2w, l2h, l2p;
+ int pitch;
+
+ pitch = pPix->devKind;
+ if ((pitch & (pitch - 1)) != 0)
+ ATI_FALLBACK(("NPOT pitch 0x%x unsupported\n", pitch));
+
+ switch (pPict->format) {
+ case PICT_a8:
+ /* DATATYPE_RGB8 appears to expand the value into the alpha
+ * channel like we want. We then blank out the R,G,B channels
+ * as necessary using the combiners.
+ */
+ *tex_cntl_c = R128_DATATYPE_RGB8 << R128_TEX_DATATYPE_SHIFT;
+ break;
+ case PICT_a1r5g5b5:
+ *tex_cntl_c = R128_DATATYPE_ARGB1555 << R128_TEX_DATATYPE_SHIFT;
+ break;
+ case PICT_a4r4g4b4:
+ *tex_cntl_c = R128_DATATYPE_ARGB4444 << R128_TEX_DATATYPE_SHIFT;
+ break;
+ case PICT_r5g6b5:
+ *tex_cntl_c = R128_DATATYPE_RGB565 << R128_TEX_DATATYPE_SHIFT;
+ break;
+ case PICT_a8r8g8b8:
+ *tex_cntl_c = R128_DATATYPE_ARGB8888 << R128_TEX_DATATYPE_SHIFT;
+ break;
+ default:
+ return FALSE;
+ }
+ bytepp = PICT_FORMAT_BPP(pPict->format) / 8;
+
+ *tex_cntl_c |= R128_MIP_MAP_DISABLE;
+
+ if (pPict->filter == PictFilterBilinear)
+ *tex_cntl_c |= R128_MIN_BLEND_LINEAR | R128_MAG_BLEND_LINEAR;
+
+ if (unit == 0)
+ shift = 0;
+ else {
+ shift = 16;
+ *tex_cntl_c |= R128_SEC_SELECT_SEC_ST;
+ }
+
+ /* ATILog2 returns -1 for value of 0 */
+ l2w = ATILog2(w - 1) + 1;
+ l2h = ATILog2(h - 1) + 1;
+ l2p = ATILog2(pPix->devKind / bytepp);
+
+ if (pPict->repeat && w == 1 && h == 1)
+ l2p = 0;
+ else if (pPict->repeat && l2p != l2w)
+ ATI_FALLBACK(("Repeat not supported for pitch != width\n"));
+ l2w = l2p;
+
+ widths[unit] = 1 << l2w;
+ heights[unit] = 1 << l2h;
+ *txsize |= l2p << (R128_TEX_PITCH_SHIFT + shift);
+ *txsize |= ((l2w > l2h) ? l2w : l2h) << (R128_TEX_SIZE_SHIFT + shift);
+ *txsize |= l2h << (R128_TEX_HEIGHT_SHIFT + shift);
+
+ if (pPict->transform != 0) {
+ is_transform[unit] = TRUE;
+ transform[unit] = pPict->transform;
+ } else {
+ is_transform[unit] = FALSE;
+ }
+
+ return TRUE;
+}
+
+Bool
+R128PrepareComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
+ PicturePtr pDstPicture, PixmapPtr pSrc, PixmapPtr pMask, PixmapPtr pDst)
+{
+ KdScreenPriv(pDst->drawable.pScreen);
+ ATIScreenInfo(pScreenPriv);
+ CARD32 txsize = 0, prim_tex_cntl_c, sec_tex_cntl_c = 0, dstDatatype;
+ CARD32 dst_pitch_offset, color_factor, in_color_factor, alpha_comb;
+ CARD32 blend_cntl;
+ int i;
+ RING_LOCALS;
+
+ accel_atis = atis;
+
+ if (pDstPicture->format == PICT_a8)
+ dstDatatype = R128_DATATYPE_Y8;
+ else
+ R128GetDatatypePict(pDstPicture->format, &dstDatatype);
+
+ if (!R128TextureSetup(pSrcPicture, pSrc, 0, &txsize, &prim_tex_cntl_c))
+ return FALSE;
+ if (pMask != NULL && !R128TextureSetup(pMaskPicture, pMask, 1, &txsize,
+ &sec_tex_cntl_c))
+ return FALSE;
+ else if (pMask == NULL)
+ is_transform[1] = FALSE;
+
+ if (!ATIGetPixmapOffsetPitch(pDst, &dst_pitch_offset))
+ return FALSE;
+
+ blend_cntl = R128BlendOp[op].blendctl;
+ if (PICT_FORMAT_A(pDstPicture->format) == 0 &&
+ R128BlendOp[op].dst_alpha) {
+ if ((blend_cntl & R128_SBLEND_MASK) ==
+ R128_SBLEND_DST_ALPHA)
+ blend_cntl = (blend_cntl & ~R128_SBLEND_MASK) |
+ R128_SBLEND_ONE;
+ else if ((blend_cntl & R128_SBLEND_MASK) ==
+ R128_SBLEND_INV_DST_ALPHA)
+ blend_cntl = (blend_cntl & ~R128_SBLEND_MASK) |
+ R128_SBLEND_ZERO;
+ }
+
+ BEGIN_DMA(12);
+ OUT_REG(R128_REG_SCALE_3D_CNTL,
+ R128_SCALE_3D_TEXMAP_SHADE |
+ R128_SCALE_PIX_REPLICATE |
+ R128_TEX_CACHE_SPLIT |
+ R128_TEX_MAP_ALPHA_IN_TEXTURE |
+ R128_TEX_CACHE_LINE_SIZE_4QW);
+ OUT_REG(ATI_REG_DST_PITCH_OFFSET, dst_pitch_offset);
+ OUT_REG(ATI_REG_DP_GUI_MASTER_CNTL,
+ ATI_GMC_DST_PITCH_OFFSET_CNTL |
+ ATI_GMC_BRUSH_SOLID_COLOR |
+ (dstDatatype << 8) |
+ ATI_GMC_SRC_DATATYPE_COLOR |
+ (ATIBltRop[GXcopy] << 16) |
+ ATI_DP_SRC_SOURCE_MEMORY |
+ R128_GMC_3D_FCN_EN |
+ ATI_GMC_CLR_CMP_CNTL_DIS |
+ R128_GMC_AUX_CLIP_DIS |
+ ATI_GMC_WR_MSK_DIS);
+ OUT_REG(R128_REG_MISC_3D_STATE_CNTL,
+ R128_MISC_SCALE_3D_TEXMAP_SHADE |
+ R128_MISC_SCALE_PIX_REPLICATE |
+ R128_ALPHA_COMB_ADD_CLAMP |
+ blend_cntl);
+ OUT_REG(R128_REG_TEX_CNTL_C,
+ R128_TEXMAP_ENABLE |
+ ((pMask != NULL) ? R128_SEC_TEXMAP_ENABLE : 0) |
+ R128_ALPHA_ENABLE |
+ R128_TEX_CACHE_FLUSH);
+ OUT_REG(R128_REG_PC_GUI_CTLSTAT, R128_PC_FLUSH_GUI);
+ END_DMA();
+
+ /* IN operator: Without a mask, only the first texture unit is enabled.
+ * With a mask, we put the source in the first unit and have it pass
+ * through as input to the 2nd. The 2nd unit takes the incoming source
+ * pixel and modulates it with either the alpha or each of the channels
+ * in the mask, depending on componentAlpha.
+ */
+ BEGIN_DMA(15);
+ OUT_RING(DMA_PACKET0(R128_REG_PRIM_TEX_CNTL_C, 14));
+ OUT_RING_REG(R128_REG_PRIM_TEX_CNTL_C, prim_tex_cntl_c);
+
+ /* If this is the only stage and the dest is a8, route the alpha result
+ * to the color (red channel, in particular), too. Otherwise, be sure
+ * to zero out color channels of an a8 source.
+ */
+ if (pMaskPicture == NULL && pDstPicture->format == PICT_a8)
+ color_factor = R128_COLOR_FACTOR_ALPHA;
+ else if (pSrcPicture->format == PICT_a8)
+ color_factor = R128_COLOR_FACTOR_CONST_COLOR;
+ else
+ color_factor = R128_COLOR_FACTOR_TEX;
+
+ if (PICT_FORMAT_A(pSrcPicture->format) == 0)
+ alpha_comb = R128_COMB_ALPHA_COPY_INP;
+ else
+ alpha_comb = R128_COMB_ALPHA_DIS;
+
+ OUT_RING_REG(R128_REG_PRIM_TEXTURE_COMBINE_CNTL_C,
+ R128_COMB_COPY |
+ color_factor |
+ R128_INPUT_FACTOR_INT_COLOR |
+ alpha_comb |
+ R128_ALPHA_FACTOR_TEX_ALPHA |
+ R128_INP_FACTOR_A_CONST_ALPHA);
+ OUT_RING_REG(R128_REG_TEX_SIZE_PITCH_C, txsize);
+ /* We could save some output by only writing the offset register that
+ * will actually be used. On the other hand, this is easy.
+ */
+ for (i = 0; i <= 10; i++) {
+ OUT_RING_REG(R128_REG_PRIM_TEX_0_OFFSET_C + 4 * i,
+ ((CARD8 *)pSrc->devPrivate.ptr -
+ pScreenPriv->screen->memory_base));
+ }
+ END_DMA();
+
+ if (pMask != NULL) {
+ BEGIN_DMA(14);
+ OUT_RING(DMA_PACKET0(R128_REG_SEC_TEX_CNTL_C, 13));
+ OUT_RING_REG(R128_REG_SEC_TEX_CNTL_C, sec_tex_cntl_c);
+
+ if (pDstPicture->format == PICT_a8) {
+ color_factor = R128_COLOR_FACTOR_ALPHA;
+ in_color_factor = R128_INPUT_FACTOR_PREV_ALPHA;
+ } else if (pMaskPicture->componentAlpha) {
+ color_factor = R128_COLOR_FACTOR_TEX;
+ in_color_factor = R128_INPUT_FACTOR_PREV_COLOR;
+ } else {
+ color_factor = R128_COLOR_FACTOR_ALPHA;
+ in_color_factor = R128_INPUT_FACTOR_PREV_COLOR;
+ }
+
+ OUT_RING_REG(R128_REG_SEC_TEXTURE_COMBINE_CNTL_C,
+ R128_COMB_MODULATE |
+ color_factor |
+ in_color_factor |
+ R128_COMB_ALPHA_MODULATE |
+ R128_ALPHA_FACTOR_TEX_ALPHA |
+ R128_INP_FACTOR_A_PREV_ALPHA);
+ for (i = 0; i <= 10; i++) {
+ OUT_RING_REG(R128_REG_SEC_TEX_0_OFFSET_C + 4 * i,
+ ((CARD8 *)pMask->devPrivate.ptr -
+ pScreenPriv->screen->memory_base));
+ }
+ END_DMA();
+ }
+
+ return TRUE;
+}
+#define VTX_RING_COUNT 8
+
+#define VTX_OUT(_dstX, _dstY, _srcX, _srcY, _maskX, _maskY) \
+do { \
+ OUT_RING_F((_dstX)); \
+ OUT_RING_F(((float)(_dstY)) + .125); \
+ OUT_RING_F(0.0); \
+ OUT_RING_F(1.0); \
+ OUT_RING_F((((float)(_srcX)) + 0.5) / (widths[0])); \
+ OUT_RING_F((((float)(_srcY)) + 0.5) / (heights[0])); \
+ OUT_RING_F((((float)(_maskX)) + 0.5) / (widths[1])); \
+ OUT_RING_F((((float)(_maskY)) + 0.5) / (heights[1])); \
+} while (0)
+
+void
+R128Composite(int srcX, int srcY, int maskX, int maskY, int dstX, int dstY,
+ int w, int h)
+{
+ ATIScreenInfo *atis = accel_atis;
+ int srcXend, srcYend, maskXend, maskYend;
+ PictVector v;
+ RING_LOCALS;
+
+ /*ErrorF("R128Composite (%d,%d) (%d,%d) (%d,%d) (%d,%d)\n",
+ srcX, srcY, maskX, maskY,dstX, dstY, w, h);*/
+
+ srcXend = srcX + w;
+ srcYend = srcY + h;
+ maskXend = maskX + w;
+ maskYend = maskY + h;
+ if (is_transform[0]) {
+ v.vector[0] = IntToxFixed(srcX);
+ v.vector[1] = IntToxFixed(srcY);
+ v.vector[2] = xFixed1;
+ PictureTransformPoint(transform[0], &v);
+ srcX = xFixedToInt(v.vector[0]);
+ srcY = xFixedToInt(v.vector[1]);
+ v.vector[0] = IntToxFixed(srcXend);
+ v.vector[1] = IntToxFixed(srcYend);
+ v.vector[2] = xFixed1;
+ PictureTransformPoint(transform[0], &v);
+ srcXend = xFixedToInt(v.vector[0]);
+ srcYend = xFixedToInt(v.vector[1]);
+ }
+ if (is_transform[1]) {
+ v.vector[0] = IntToxFixed(maskX);
+ v.vector[1] = IntToxFixed(maskY);
+ v.vector[2] = xFixed1;
+ PictureTransformPoint(transform[1], &v);
+ maskX = xFixedToInt(v.vector[0]);
+ maskY = xFixedToInt(v.vector[1]);
+ v.vector[0] = IntToxFixed(maskXend);
+ v.vector[1] = IntToxFixed(maskYend);
+ v.vector[2] = xFixed1;
+ PictureTransformPoint(transform[1], &v);
+ maskXend = xFixedToInt(v.vector[0]);
+ maskYend = xFixedToInt(v.vector[1]);
+ }
+
+ BEGIN_DMA(3 + 4 * VTX_RING_COUNT);
+ OUT_RING(DMA_PACKET3(ATI_CCE_PACKET3_3D_RNDR_GEN_PRIM,
+ 2 + 4 * VTX_RING_COUNT));
+ OUT_RING(R128_CCE_VC_FRMT_RHW |
+ R128_CCE_VC_FRMT_S_T |
+ R128_CCE_VC_FRMT_S2_T2);
+ OUT_RING(R128_CCE_VC_CNTL_PRIM_TYPE_TRI_FAN |
+ R128_CCE_VC_CNTL_PRIM_WALK_RING |
+ (4 << R128_CCE_VC_CNTL_NUM_SHIFT));
+
+ VTX_OUT(dstX, dstY, srcX, srcY, maskX, maskY);
+ VTX_OUT(dstX, dstY + h, srcX, srcYend, maskX, maskYend);
+ VTX_OUT(dstX + w, dstY + h, srcXend, srcYend, maskXend, maskYend);
+ VTX_OUT(dstX + w, dstY, srcXend, srcY, maskXend, maskY);
+
+ END_DMA();
+}
+
+void
+R128DoneComposite(void)
+{
+}
+
+Bool
+R128PrepareTrapezoids(PicturePtr pDstPicture, PixmapPtr pDst)
+{
+ KdScreenPriv(pDst->drawable.pScreen);
+ ATIScreenInfo(pScreenPriv);
+ CARD32 dst_pitch_offset;
+ RING_LOCALS;
+
+ accel_atis = atis;
+
+ if (!ATIGetPixmapOffsetPitch(pDst, &dst_pitch_offset))
+ return FALSE;
+
+ BEGIN_DMA(18);
+ OUT_REG(R128_REG_SCALE_3D_CNTL,
+ R128_SCALE_3D_TEXMAP_SHADE |
+ R128_SCALE_PIX_REPLICATE |
+ R128_TEX_CACHE_SPLIT |
+ R128_TEX_CACHE_LINE_SIZE_4QW);
+ OUT_REG(ATI_REG_DST_PITCH_OFFSET, dst_pitch_offset);
+ OUT_REG(ATI_REG_DP_GUI_MASTER_CNTL,
+ ATI_GMC_DST_PITCH_OFFSET_CNTL |
+ ATI_GMC_BRUSH_SOLID_COLOR |
+ (R128_DATATYPE_RGB8 << 8) |
+ ATI_GMC_SRC_DATATYPE_COLOR |
+ (ATIBltRop[GXcopy] << 16) |
+ ATI_DP_SRC_SOURCE_MEMORY |
+ R128_GMC_3D_FCN_EN |
+ ATI_GMC_CLR_CMP_CNTL_DIS |
+ ATI_GMC_WR_MSK_DIS);
+ OUT_REG(R128_REG_MISC_3D_STATE_CNTL,
+ R128_MISC_SCALE_3D_TEXMAP_SHADE |
+ R128_MISC_SCALE_PIX_REPLICATE |
+ R128_ALPHA_COMB_ADD_CLAMP |
+ R128BlendOp[PictOpAdd].blendctl);
+ OUT_REG(R128_REG_TEX_CNTL_C,
+ R128_ALPHA_ENABLE);
+ OUT_REG(R128_REG_PC_GUI_CTLSTAT, R128_PC_FLUSH_GUI);
+
+ OUT_RING(DMA_PACKET0(R128_REG_AUX_SC_CNTL, 5));
+ OUT_RING_REG(R128_REG_AUX_SC_CNTL, R128_AUX1_SC_ENB);
+ OUT_RING_REG(R128_REG_AUX1_SC_LEFT, 0);
+ OUT_RING_REG(R128_REG_AUX1_SC_RIGHT, pDst->drawable.width);
+ OUT_RING_REG(R128_REG_AUX1_SC_TOP, 0);
+ OUT_RING_REG(R128_REG_AUX1_SC_BOTTOM, pDst->drawable.height);
+ END_DMA();
+
+ return TRUE;
+}
+
+#define TRAP_VERT_RING_COUNT 4
+
+#define TRAP_VERT(_x, _y) \
+do { \
+ OUT_RING_F((_x) + sample_x); \
+ OUT_RING_F((_y) + 0.125 + sample_y); \
+ OUT_RING_F(0.0); \
+ OUT_RING(0x01010101); \
+} while (0)
+
+void
+R128Trapezoids(KaaTrapezoid *traps, int ntraps)
+{
+ ATIScreenInfo *atis = accel_atis;
+ RING_LOCALS;
+
+ while (ntraps > 0) {
+ int i, sample, count, vertcount;
+
+ count = 0xffff / 4 / sample_count;
+ if (count > ntraps)
+ count = ntraps;
+ vertcount = count * sample_count * 4;
+
+ BEGIN_DMA(3 + vertcount * TRAP_VERT_RING_COUNT);
+ OUT_RING(DMA_PACKET3(ATI_CCE_PACKET3_3D_RNDR_GEN_PRIM,
+ 2 + vertcount * TRAP_VERT_RING_COUNT));
+ OUT_RING(R128_CCE_VC_FRMT_DIFFUSE_ARGB);
+ OUT_RING(R128_CCE_VC_CNTL_PRIM_TYPE_TRI_FAN |
+ R128_CCE_VC_CNTL_PRIM_WALK_RING |
+ (vertcount << R128_CCE_VC_CNTL_NUM_SHIFT));
+
+ for (i = 0; i < count; i++) {
+ for (sample = 0; sample < sample_count; sample++) {
+ float sample_x = sample_offsets_x[sample];
+ float sample_y = sample_offsets_y[sample];
+ TRAP_VERT(traps[i].tl, traps[i].ty);
+ TRAP_VERT(traps[i].bl, traps[i].by);
+ TRAP_VERT(traps[i].br, traps[i].by);
+ TRAP_VERT(traps[i].tr, traps[i].ty);
+ }
+ }
+ END_DMA();
+
+ ntraps -= count;
+ traps += count;
+ }
+}
+
+void
+R128DoneTrapezoids(void)
+{
+}
diff --git a/xorg-server/hw/kdrive/ati/radeon_composite.c b/xorg-server/hw/kdrive/ati/radeon_composite.c
new file mode 100644
index 000000000..ddad343e3
--- /dev/null
+++ b/xorg-server/hw/kdrive/ati/radeon_composite.c
@@ -0,0 +1,875 @@
+/*
+ * Copyright © 2003 Eric Anholt
+ *
+ * Permission to use, copy, modify, distribute, and sell this software and its
+ * documentation for any purpose is hereby granted without fee, provided that
+ * the above copyright notice appear in all copies and that both that
+ * copyright notice and this permission notice appear in supporting
+ * documentation, and that the name of Eric Anholt not be used in
+ * advertising or publicity pertaining to distribution of the software without
+ * specific, written prior permission. Eric Anholt makes no
+ * representations about the suitability of this software for any purpose. It
+ * is provided "as is" without express or implied warranty.
+ *
+ * ERIC ANHOLT DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+ * EVENT SHALL ERIC ANHOLT BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include <kdrive-config.h>
+#endif
+#include "ati.h"
+#include "ati_reg.h"
+#include "ati_dma.h"
+#include "ati_draw.h"
+
+extern ATIScreenInfo *accel_atis;
+extern int sample_count;
+extern float sample_offsets_x[255];
+extern float sample_offsets_y[255];
+static Bool is_transform[2];
+static PictTransform *transform[2];
+
+struct blendinfo {
+ Bool dst_alpha;
+ Bool src_alpha;
+ CARD32 blend_cntl;
+};
+
+static struct blendinfo RadeonBlendOp[] = {
+ /* Clear */
+ {0, 0, RADEON_SBLEND_GL_ZERO | RADEON_DBLEND_GL_ZERO},
+ /* Src */
+ {0, 0, RADEON_SBLEND_GL_ONE | RADEON_DBLEND_GL_ZERO},
+ /* Dst */
+ {0, 0, RADEON_SBLEND_GL_ZERO | RADEON_DBLEND_GL_ONE},
+ /* Over */
+ {0, 1, RADEON_SBLEND_GL_ONE | RADEON_DBLEND_GL_INV_SRC_ALPHA},
+ /* OverReverse */
+ {1, 0, RADEON_SBLEND_GL_INV_DST_ALPHA | RADEON_DBLEND_GL_ONE},
+ /* In */
+ {1, 0, RADEON_SBLEND_GL_DST_ALPHA | RADEON_DBLEND_GL_ZERO},
+ /* InReverse */
+ {0, 1, RADEON_SBLEND_GL_ZERO | RADEON_DBLEND_GL_SRC_ALPHA},
+ /* Out */
+ {1, 0, RADEON_SBLEND_GL_INV_DST_ALPHA | RADEON_DBLEND_GL_ZERO},
+ /* OutReverse */
+ {0, 1, RADEON_SBLEND_GL_ZERO | RADEON_DBLEND_GL_INV_SRC_ALPHA},
+ /* Atop */
+ {1, 1, RADEON_SBLEND_GL_DST_ALPHA | RADEON_DBLEND_GL_INV_SRC_ALPHA},
+ /* AtopReverse */
+ {1, 1, RADEON_SBLEND_GL_INV_DST_ALPHA | RADEON_DBLEND_GL_SRC_ALPHA},
+ /* Xor */
+ {1, 1, RADEON_SBLEND_GL_INV_DST_ALPHA | RADEON_DBLEND_GL_INV_SRC_ALPHA},
+ /* Add */
+ {0, 0, RADEON_SBLEND_GL_ONE | RADEON_DBLEND_GL_ONE},
+};
+
+struct formatinfo {
+ int fmt;
+ Bool byte_swap;
+ CARD32 card_fmt;
+};
+
+/* Note on texture formats:
+ * TXFORMAT_Y8 expands to (Y,Y,Y,1). TXFORMAT_I8 expands to (I,I,I,I)
+ */
+static struct formatinfo R100TexFormats[] = {
+ {PICT_a8r8g8b8, 0, RADEON_TXFORMAT_ARGB8888 | RADEON_TXFORMAT_ALPHA_IN_MAP},
+ {PICT_x8r8g8b8, 0, RADEON_TXFORMAT_ARGB8888},
+ {PICT_a8b8g8r8, 1, RADEON_TXFORMAT_RGBA8888 | RADEON_TXFORMAT_ALPHA_IN_MAP},
+ {PICT_x8b8g8r8, 1, RADEON_TXFORMAT_RGBA8888},
+ {PICT_r5g6b5, 0, RADEON_TXFORMAT_RGB565},
+ {PICT_a1r5g5b5, 0, RADEON_TXFORMAT_ARGB1555 | RADEON_TXFORMAT_ALPHA_IN_MAP},
+ {PICT_x1r5g5b5, 0, RADEON_TXFORMAT_ARGB1555},
+ {PICT_a8, 0, RADEON_TXFORMAT_I8 | RADEON_TXFORMAT_ALPHA_IN_MAP},
+};
+
+static struct formatinfo R200TexFormats[] = {
+ {PICT_a8r8g8b8, 0, R200_TXFORMAT_ARGB8888 | R200_TXFORMAT_ALPHA_IN_MAP},
+ {PICT_x8r8g8b8, 0, R200_TXFORMAT_ARGB8888},
+ {PICT_a8r8g8b8, 1, R200_TXFORMAT_RGBA8888 | R200_TXFORMAT_ALPHA_IN_MAP},
+ {PICT_x8r8g8b8, 1, R200_TXFORMAT_RGBA8888},
+ {PICT_r5g6b5, 0, R200_TXFORMAT_RGB565},
+ {PICT_a1r5g5b5, 0, R200_TXFORMAT_ARGB1555 | R200_TXFORMAT_ALPHA_IN_MAP},
+ {PICT_x1r5g5b5, 0, R200_TXFORMAT_ARGB1555},
+ {PICT_a8, 0, R200_TXFORMAT_I8 | R200_TXFORMAT_ALPHA_IN_MAP},
+};
+
+/* Common Radeon setup code */
+
+static Bool
+RadeonGetDestFormat(PicturePtr pDstPicture, CARD32 *dst_format)
+{
+ switch (pDstPicture->format) {
+ case PICT_a8r8g8b8:
+ case PICT_x8r8g8b8:
+ *dst_format = RADEON_COLOR_FORMAT_ARGB8888;
+ break;
+ case PICT_r5g6b5:
+ *dst_format = RADEON_COLOR_FORMAT_RGB565;
+ break;
+ case PICT_a1r5g5b5:
+ case PICT_x1r5g5b5:
+ *dst_format = RADEON_COLOR_FORMAT_ARGB1555;
+ break;
+ case PICT_a8:
+ *dst_format = RADEON_COLOR_FORMAT_RGB8;
+ break;
+ default:
+ ATI_FALLBACK(("Unsupported dest format 0x%x\n",
+ pDstPicture->format));
+ }
+
+ return TRUE;
+}
+
+/* R100-specific code */
+
+static Bool
+R100CheckCompositeTexture(PicturePtr pPict, int unit)
+{
+ int w = pPict->pDrawable->width;
+ int h = pPict->pDrawable->height;
+ int i;
+
+ if ((w > 0x7ff) || (h > 0x7ff))
+ ATI_FALLBACK(("Picture w/h too large (%dx%d)\n", w, h));
+
+ for (i = 0; i < sizeof(R100TexFormats) / sizeof(R100TexFormats[0]); i++)
+ {
+ if (R100TexFormats[i].fmt == pPict->format)
+ break;
+ }
+ if (i == sizeof(R100TexFormats) / sizeof(R100TexFormats[0]))
+ ATI_FALLBACK(("Unsupported picture format 0x%x\n",
+ pPict->format));
+
+ if (pPict->repeat && ((w & (w - 1)) != 0 || (h & (h - 1)) != 0))
+ ATI_FALLBACK(("NPOT repeat unsupported (%dx%d)\n", w, h));
+
+ if (pPict->filter != PictFilterNearest &&
+ pPict->filter != PictFilterBilinear)
+ ATI_FALLBACK(("Unsupported filter 0x%x\n", pPict->filter));
+
+ return TRUE;
+}
+
+static Bool
+R100TextureSetup(PicturePtr pPict, PixmapPtr pPix, int unit)
+{
+ ATIScreenInfo *atis = accel_atis;
+ KdScreenPriv(pPix->drawable.pScreen);
+ CARD32 txfilter, txformat, txoffset, txpitch;
+ int w = pPict->pDrawable->width;
+ int h = pPict->pDrawable->height;
+ int i;
+ RING_LOCALS;
+
+ txpitch = pPix->devKind;
+ txoffset = ((CARD8 *)pPix->devPrivate.ptr -
+ pScreenPriv->screen->memory_base);
+
+ for (i = 0; i < sizeof(R100TexFormats) / sizeof(R100TexFormats[0]); i++)
+ {
+ if (R100TexFormats[i].fmt == pPict->format)
+ break;
+ }
+ txformat = R100TexFormats[i].card_fmt;
+ if (R100TexFormats[i].byte_swap)
+ txoffset |= RADEON_TXO_ENDIAN_BYTE_SWAP;
+
+ if (pPict->repeat) {
+ txformat |= ATILog2(w) << RADEON_TXFORMAT_WIDTH_SHIFT;
+ txformat |= ATILog2(h) << RADEON_TXFORMAT_HEIGHT_SHIFT;
+ } else
+ txformat |= RADEON_TXFORMAT_NON_POWER2;
+ txformat |= unit << 24; /* RADEON_TXFORMAT_ST_ROUTE_STQX */
+
+
+ if ((txoffset & 0x1f) != 0)
+ ATI_FALLBACK(("Bad texture offset 0x%x\n", txoffset));
+ if ((txpitch & 0x1f) != 0)
+ ATI_FALLBACK(("Bad texture pitch 0x%x\n", txpitch));
+
+ switch (pPict->filter) {
+ case PictFilterNearest:
+ txfilter = (RADEON_MAG_FILTER_NEAREST |
+ RADEON_MIN_FILTER_NEAREST);
+ break;
+ case PictFilterBilinear:
+ txfilter = (RADEON_MAG_FILTER_LINEAR |
+ RADEON_MIN_FILTER_LINEAR);
+ break;
+ default:
+ ATI_FALLBACK(("Bad filter 0x%x\n", pPict->filter));
+ }
+
+ BEGIN_DMA(7);
+ if (unit == 0) {
+ OUT_RING(DMA_PACKET0(RADEON_REG_PP_TXFILTER_0, 3));
+ OUT_RING_REG(RADEON_REG_PP_TXFILTER_0, txfilter);
+ OUT_RING_REG(RADEON_REG_PP_TXFORMAT_0, txformat);
+ OUT_RING_REG(RADEON_REG_PP_TXOFFSET_0, txoffset);
+ OUT_RING(DMA_PACKET0(RADEON_REG_PP_TEX_SIZE_0, 2));
+ OUT_RING_REG(RADEON_REG_PP_TEX_SIZE_0,
+ (pPix->drawable.width - 1) |
+ ((pPix->drawable.height - 1) << RADEON_TEX_VSIZE_SHIFT));
+ OUT_RING_REG(RADEON_REG_PP_TEX_PITCH_0, txpitch - 32);
+ } else {
+ OUT_RING(DMA_PACKET0(RADEON_REG_PP_TXFILTER_1, 3));
+ OUT_RING_REG(RADEON_REG_PP_TXFILTER_1, txfilter);
+ OUT_RING_REG(RADEON_REG_PP_TXFORMAT_1, txformat);
+ OUT_RING_REG(RADEON_REG_PP_TXOFFSET_1, txoffset);
+ OUT_RING(DMA_PACKET0(RADEON_REG_PP_TEX_SIZE_1, 2));
+ OUT_RING_REG(RADEON_REG_PP_TEX_SIZE_1,
+ (pPix->drawable.width - 1) |
+ ((pPix->drawable.height - 1) << RADEON_TEX_VSIZE_SHIFT));
+ OUT_RING_REG(RADEON_REG_PP_TEX_PITCH_1, txpitch - 32);
+ }
+ END_DMA();
+
+ if (pPict->transform != 0) {
+ is_transform[unit] = TRUE;
+ transform[unit] = pPict->transform;
+ } else {
+ is_transform[unit] = FALSE;
+ }
+
+ return TRUE;
+}
+
+Bool
+R100CheckComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
+ PicturePtr pDstPicture)
+{
+ CARD32 tmp1;
+
+ /* Check for unsupported compositing operations. */
+ if (op >= sizeof(RadeonBlendOp) / sizeof(RadeonBlendOp[0]))
+ ATI_FALLBACK(("Unsupported Composite op 0x%x\n", op));
+ if (pMaskPicture != NULL && pMaskPicture->componentAlpha &&
+ RadeonBlendOp[op].src_alpha)
+ ATI_FALLBACK(("Component alpha not supported with source "
+ "alpha blending.\n"));
+ if (pDstPicture->pDrawable->width >= (1 << 11) ||
+ pDstPicture->pDrawable->height >= (1 << 11))
+ ATI_FALLBACK(("Dest w/h too large (%d,%d).\n",
+ pDstPicture->pDrawable->width,
+ pDstPicture->pDrawable->height));
+
+ if (!R100CheckCompositeTexture(pSrcPicture, 0))
+ return FALSE;
+ if (pMaskPicture != NULL && !R100CheckCompositeTexture(pMaskPicture, 1))
+ return FALSE;
+
+ if (pDstPicture->componentAlpha)
+ return FALSE;
+
+ if (!RadeonGetDestFormat(pDstPicture, &tmp1))
+ return FALSE;
+
+ return TRUE;
+}
+
+Bool
+R100PrepareComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
+ PicturePtr pDstPicture, PixmapPtr pSrc, PixmapPtr pMask, PixmapPtr pDst)
+{
+ KdScreenPriv(pDst->drawable.pScreen);
+ ATIScreenInfo(pScreenPriv);
+ CARD32 dst_format, dst_offset, dst_pitch;
+ CARD32 pp_cntl, blendcntl, cblend, ablend;
+ int pixel_shift;
+ RING_LOCALS;
+
+ accel_atis = atis;
+
+ RadeonGetDestFormat(pDstPicture, &dst_format);
+ pixel_shift = pDst->drawable.bitsPerPixel >> 4;
+
+ dst_offset = ((CARD8 *)pDst->devPrivate.ptr -
+ pScreenPriv->screen->memory_base);
+ dst_pitch = pDst->devKind;
+ if ((dst_offset & 0x0f) != 0)
+ ATI_FALLBACK(("Bad destination offset 0x%x\n", dst_offset));
+ if (((dst_pitch >> pixel_shift) & 0x7) != 0)
+ ATI_FALLBACK(("Bad destination pitch 0x%x\n", dst_pitch));
+
+ if (!R100TextureSetup(pSrcPicture, pSrc, 0))
+ return FALSE;
+ pp_cntl = RADEON_TEX_0_ENABLE | RADEON_TEX_BLEND_0_ENABLE;
+
+ if (pMask != NULL) {
+ if (!R100TextureSetup(pMaskPicture, pMask, 1))
+ return FALSE;
+ pp_cntl |= RADEON_TEX_1_ENABLE;
+ } else {
+ is_transform[1] = FALSE;
+ }
+
+ ENTER_DRAW(pDst);
+
+ RadeonSwitchTo3D(atis);
+
+ BEGIN_DMA(12);
+
+ OUT_RING(DMA_PACKET0(RADEON_REG_PP_CNTL, 3));
+ OUT_RING_REG(RADEON_REG_PP_CNTL, pp_cntl);
+ OUT_RING_REG(RADEON_REG_RB3D_CNTL,
+ dst_format | RADEON_ALPHA_BLEND_ENABLE);
+ OUT_RING_REG(RADEON_REG_RB3D_COLOROFFSET, dst_offset);
+
+ OUT_REG(RADEON_REG_RB3D_COLORPITCH, dst_pitch >> pixel_shift);
+
+ /* IN operator: Multiply src by mask components or mask alpha.
+ * BLEND_CTL_ADD is A * B + C.
+ * If a picture is a8, we have to explicitly zero its color values.
+ * If the destination is a8, we have to route the alpha to red, I think.
+ */
+ cblend = RADEON_BLEND_CTL_ADD | RADEON_CLAMP_TX |
+ RADEON_COLOR_ARG_C_ZERO;
+ ablend = RADEON_BLEND_CTL_ADD | RADEON_CLAMP_TX |
+ RADEON_ALPHA_ARG_C_ZERO;
+
+ if (pDstPicture->format == PICT_a8)
+ cblend |= RADEON_COLOR_ARG_A_T0_ALPHA;
+ else if (pSrcPicture->format == PICT_a8)
+ cblend |= RADEON_COLOR_ARG_A_ZERO;
+ else
+ cblend |= RADEON_COLOR_ARG_A_T0_COLOR;
+ ablend |= RADEON_ALPHA_ARG_A_T0_ALPHA;
+
+ if (pMask) {
+ if (pMaskPicture->componentAlpha &&
+ pDstPicture->format != PICT_a8)
+ cblend |= RADEON_COLOR_ARG_B_T1_COLOR;
+ else
+ cblend |= RADEON_COLOR_ARG_B_T1_ALPHA;
+ ablend |= RADEON_ALPHA_ARG_B_T1_ALPHA;
+ } else {
+ cblend |= RADEON_COLOR_ARG_B_ZERO | RADEON_COMP_ARG_B;
+ ablend |= RADEON_ALPHA_ARG_B_ZERO | RADEON_COMP_ARG_B;
+ }
+
+ OUT_REG(RADEON_REG_PP_TXCBLEND_0, cblend);
+ OUT_REG(RADEON_REG_PP_TXABLEND_0, ablend);
+
+ /* Op operator. */
+ blendcntl = RadeonBlendOp[op].blend_cntl;
+ if (PICT_FORMAT_A(pDstPicture->format) == 0 &&
+ RadeonBlendOp[op].dst_alpha) {
+ if ((blendcntl & RADEON_SBLEND_MASK) ==
+ RADEON_SBLEND_GL_DST_ALPHA)
+ blendcntl = (blendcntl & ~RADEON_SBLEND_MASK) |
+ RADEON_SBLEND_GL_ONE;
+ else if ((blendcntl & RADEON_SBLEND_MASK) ==
+ RADEON_SBLEND_GL_INV_DST_ALPHA)
+ blendcntl = (blendcntl & ~RADEON_SBLEND_MASK) |
+ RADEON_SBLEND_GL_ZERO;
+ }
+ OUT_REG(RADEON_REG_RB3D_BLENDCNTL, blendcntl);
+ END_DMA();
+
+ LEAVE_DRAW(pDst);
+
+ return TRUE;
+}
+
+static Bool
+R200CheckCompositeTexture(PicturePtr pPict, int unit)
+{
+ int w = pPict->pDrawable->width;
+ int h = pPict->pDrawable->height;
+ int i;
+
+ if ((w > 0x7ff) || (h > 0x7ff))
+ ATI_FALLBACK(("Picture w/h too large (%dx%d)\n", w, h));
+
+ for (i = 0; i < sizeof(R200TexFormats) / sizeof(R200TexFormats[0]); i++)
+ {
+ if (R200TexFormats[i].fmt == pPict->format)
+ break;
+ }
+ if (i == sizeof(R200TexFormats) / sizeof(R200TexFormats[0]))
+ ATI_FALLBACK(("Unsupported picture format 0x%x\n",
+ pPict->format));
+
+ if (pPict->repeat && ((w & (w - 1)) != 0 || (h & (h - 1)) != 0))
+ ATI_FALLBACK(("NPOT repeat unsupported (%dx%d)\n", w, h));
+
+ if (pPict->filter != PictFilterNearest &&
+ pPict->filter != PictFilterBilinear)
+ ATI_FALLBACK(("Unsupported filter 0x%x\n", pPict->filter));
+
+ return TRUE;
+}
+
+static Bool
+R200TextureSetup(PicturePtr pPict, PixmapPtr pPix, int unit)
+{
+ ATIScreenInfo *atis = accel_atis;
+ KdScreenPriv(pPix->drawable.pScreen);
+ CARD32 txfilter, txformat, txoffset, txpitch;
+ int w = pPict->pDrawable->width;
+ int h = pPict->pDrawable->height;
+ int i;
+ RING_LOCALS;
+
+ txpitch = pPix->devKind;
+ txoffset = ((CARD8 *)pPix->devPrivate.ptr -
+ pScreenPriv->screen->memory_base);
+
+ for (i = 0; i < sizeof(R200TexFormats) / sizeof(R200TexFormats[0]); i++)
+ {
+ if (R200TexFormats[i].fmt == pPict->format)
+ break;
+ }
+ txformat = R200TexFormats[i].card_fmt;
+ if (R200TexFormats[i].byte_swap)
+ txoffset |= R200_TXO_ENDIAN_BYTE_SWAP;
+
+ if (pPict->repeat) {
+ txformat |= ATILog2(w) << R200_TXFORMAT_WIDTH_SHIFT;
+ txformat |= ATILog2(h) << R200_TXFORMAT_HEIGHT_SHIFT;
+ } else
+ txformat |= R200_TXFORMAT_NON_POWER2;
+ txformat |= unit << R200_TXFORMAT_ST_ROUTE_SHIFT;
+
+ if ((txoffset & 0x1f) != 0)
+ ATI_FALLBACK(("Bad texture offset 0x%x\n", txoffset));
+ if ((txpitch & 0x1f) != 0)
+ ATI_FALLBACK(("Bad texture pitch 0x%x\n", txpitch));
+
+ switch (pPict->filter) {
+ case PictFilterNearest:
+ txfilter = (R200_MAG_FILTER_NEAREST |
+ R200_MIN_FILTER_NEAREST);
+ break;
+ case PictFilterBilinear:
+ txfilter = (R200_MAG_FILTER_LINEAR |
+ R200_MIN_FILTER_LINEAR);
+ break;
+ default:
+ ATI_FALLBACK(("Bad filter 0x%x\n", pPict->filter));
+ }
+
+ if (unit == 0) {
+ BEGIN_DMA(6);
+ OUT_RING(DMA_PACKET0(R200_REG_PP_TXFILTER_0 + 0x20 * unit, 5));
+ OUT_RING_REG(R200_REG_PP_TXFILTER_0, txfilter);
+ OUT_RING_REG(R200_REG_PP_TXFORMAT_0, txformat);
+ OUT_RING_REG(R200_REG_PP_TXFORMAT_X_0, 0);
+ OUT_RING_REG(R200_REG_PP_TXSIZE_0,
+ (pPix->drawable.width - 1) |
+ ((pPix->drawable.height - 1) << RADEON_TEX_VSIZE_SHIFT));
+ OUT_RING_REG(R200_REG_PP_TXPITCH_0, txpitch - 32);
+ END_DMA();
+ } else {
+ BEGIN_DMA(6);
+ OUT_RING(DMA_PACKET0(R200_REG_PP_TXFILTER_1, 5));
+ OUT_RING_REG(R200_REG_PP_TXFILTER_1, txfilter);
+ OUT_RING_REG(R200_REG_PP_TXFORMAT_1, txformat);
+ OUT_RING_REG(R200_REG_PP_TXFORMAT_X_1, 0);
+ OUT_RING_REG(R200_REG_PP_TXSIZE_1,
+ (pPix->drawable.width - 1) |
+ ((pPix->drawable.height - 1) << RADEON_TEX_VSIZE_SHIFT));
+ OUT_RING_REG(R200_REG_PP_TXPITCH_1, txpitch - 32);
+ END_DMA();
+ }
+
+ BEGIN_DMA(2);
+ OUT_REG(R200_PP_TXOFFSET_0 + 0x18 * unit, txoffset);
+ END_DMA();
+
+ if (pPict->transform != 0) {
+ is_transform[unit] = TRUE;
+ transform[unit] = pPict->transform;
+ } else {
+ is_transform[unit] = FALSE;
+ }
+
+ return TRUE;
+}
+
+Bool
+R200CheckComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
+ PicturePtr pDstPicture)
+{
+ CARD32 tmp1;
+
+ /* Check for unsupported compositing operations. */
+ if (op >= sizeof(RadeonBlendOp) / sizeof(RadeonBlendOp[0]))
+ ATI_FALLBACK(("Unsupported Composite op 0x%x\n", op));
+ if (pMaskPicture != NULL && pMaskPicture->componentAlpha &&
+ RadeonBlendOp[op].src_alpha)
+ ATI_FALLBACK(("Component alpha not supported with source "
+ "alpha blending.\n"));
+
+ if (!R200CheckCompositeTexture(pSrcPicture, 0))
+ return FALSE;
+ if (pMaskPicture != NULL && !R200CheckCompositeTexture(pMaskPicture, 1))
+ return FALSE;
+
+ if (!RadeonGetDestFormat(pDstPicture, &tmp1))
+ return FALSE;
+
+ return TRUE;
+}
+
+Bool
+R200PrepareComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
+ PicturePtr pDstPicture, PixmapPtr pSrc, PixmapPtr pMask, PixmapPtr pDst)
+{
+ KdScreenPriv(pDst->drawable.pScreen);
+ ATIScreenInfo(pScreenPriv);
+ CARD32 dst_format, dst_offset, dst_pitch;
+ CARD32 pp_cntl, blendcntl, cblend, ablend;
+ int pixel_shift;
+ RING_LOCALS;
+
+ RadeonGetDestFormat(pDstPicture, &dst_format);
+ pixel_shift = pDst->drawable.bitsPerPixel >> 4;
+
+ accel_atis = atis;
+
+ dst_offset = ((CARD8 *)pDst->devPrivate.ptr -
+ pScreenPriv->screen->memory_base);
+ dst_pitch = pDst->devKind;
+ if ((dst_offset & 0x0f) != 0)
+ ATI_FALLBACK(("Bad destination offset 0x%x\n", dst_offset));
+ if (((dst_pitch >> pixel_shift) & 0x7) != 0)
+ ATI_FALLBACK(("Bad destination pitch 0x%x\n", dst_pitch));
+
+ if (!R200TextureSetup(pSrcPicture, pSrc, 0))
+ return FALSE;
+ pp_cntl = RADEON_TEX_0_ENABLE | RADEON_TEX_BLEND_0_ENABLE;
+
+ if (pMask != NULL) {
+ if (!R200TextureSetup(pMaskPicture, pMask, 1))
+ return FALSE;
+ pp_cntl |= RADEON_TEX_1_ENABLE;
+ } else {
+ is_transform[1] = FALSE;
+ }
+
+ RadeonSwitchTo3D(atis);
+
+ BEGIN_DMA(17);
+
+ OUT_RING(DMA_PACKET0(RADEON_REG_PP_CNTL, 3));
+ OUT_RING_REG(RADEON_REG_PP_CNTL, pp_cntl);
+ OUT_RING_REG(RADEON_REG_RB3D_CNTL, dst_format | RADEON_ALPHA_BLEND_ENABLE);
+ OUT_RING_REG(RADEON_REG_RB3D_COLOROFFSET, dst_offset);
+
+ OUT_REG(R200_REG_SE_VTX_FMT_0, R200_VTX_XY);
+ OUT_REG(R200_REG_SE_VTX_FMT_1,
+ (2 << R200_VTX_TEX0_COMP_CNT_SHIFT) |
+ (2 << R200_VTX_TEX1_COMP_CNT_SHIFT));
+
+ OUT_REG(RADEON_REG_RB3D_COLORPITCH, dst_pitch >> pixel_shift);
+
+ /* IN operator: Multiply src by mask components or mask alpha.
+ * BLEND_CTL_ADD is A * B + C.
+ * If a picture is a8, we have to explicitly zero its color values.
+ * If the destination is a8, we have to route the alpha to red, I think.
+ */
+ cblend = R200_TXC_OP_MADD | R200_TXC_ARG_C_ZERO;
+ ablend = R200_TXA_OP_MADD | R200_TXA_ARG_C_ZERO;
+
+ if (pDstPicture->format == PICT_a8)
+ cblend |= R200_TXC_ARG_A_R0_ALPHA;
+ else if (pSrcPicture->format == PICT_a8)
+ cblend |= R200_TXC_ARG_A_ZERO;
+ else
+ cblend |= R200_TXC_ARG_A_R0_COLOR;
+ ablend |= R200_TXA_ARG_A_R0_ALPHA;
+
+ if (pMask) {
+ if (pMaskPicture->componentAlpha &&
+ pDstPicture->format != PICT_a8)
+ cblend |= R200_TXC_ARG_B_R1_COLOR;
+ else
+ cblend |= R200_TXC_ARG_B_R1_ALPHA;
+ ablend |= R200_TXA_ARG_B_R1_ALPHA;
+ } else {
+ cblend |= R200_TXC_ARG_B_ZERO | R200_TXC_COMP_ARG_B;
+ ablend |= R200_TXA_ARG_B_ZERO | R200_TXA_COMP_ARG_B;
+ }
+
+ OUT_RING(DMA_PACKET0(R200_REG_PP_TXCBLEND_0, 4));
+ OUT_RING_REG(R200_REG_PP_TXCBLEND_0, cblend);
+ OUT_RING_REG(R200_REG_PP_TXCBLEND2_0,
+ R200_TXC_CLAMP_0_1 | R200_TXC_OUTPUT_REG_R0);
+ OUT_RING_REG(R200_REG_PP_TXABLEND_0, ablend);
+ OUT_RING_REG(R200_REG_PP_TXABLEND2_0,
+ R200_TXA_CLAMP_0_1 | R200_TXA_OUTPUT_REG_R0);
+
+ /* Op operator. */
+ blendcntl = RadeonBlendOp[op].blend_cntl;
+ if (PICT_FORMAT_A(pDstPicture->format) == 0 &&
+ RadeonBlendOp[op].dst_alpha) {
+ if ((blendcntl & RADEON_SBLEND_MASK) ==
+ RADEON_SBLEND_GL_DST_ALPHA)
+ blendcntl = (blendcntl & ~RADEON_SBLEND_MASK) |
+ RADEON_SBLEND_GL_ONE;
+ else if ((blendcntl & RADEON_SBLEND_MASK) ==
+ RADEON_SBLEND_GL_INV_DST_ALPHA)
+ blendcntl = (blendcntl & ~RADEON_SBLEND_MASK) |
+ RADEON_SBLEND_GL_ZERO;
+ }
+ OUT_REG(RADEON_REG_RB3D_BLENDCNTL, blendcntl);
+ END_DMA();
+
+ return TRUE;
+}
+
+union intfloat {
+ float f;
+ CARD32 i;
+};
+
+struct blend_vertex {
+ union intfloat x, y;
+ union intfloat s0, t0;
+ union intfloat s1, t1;
+};
+
+#define VTX_DWORD_COUNT 6
+
+#define VTX_OUT(_dstX, _dstY, _srcX, _srcY, _maskX, _maskY) \
+do { \
+ OUT_RING_F(_dstX); \
+ OUT_RING_F(_dstY); \
+ OUT_RING_F(_srcX); \
+ OUT_RING_F(_srcY); \
+ OUT_RING_F(_maskX); \
+ OUT_RING_F(_maskY); \
+} while (0)
+
+void
+RadeonComposite(int srcX, int srcY, int maskX, int maskY, int dstX, int dstY,
+ int w, int h)
+{
+ ATIScreenInfo *atis = accel_atis;
+ ATICardInfo *atic = atis->atic;
+ int srcXend, srcYend, maskXend, maskYend;
+ RING_LOCALS;
+ PictVector v;
+
+ ENTER_DRAW(0);
+
+ /*ErrorF("RadeonComposite (%d,%d) (%d,%d) (%d,%d) (%d,%d)\n",
+ srcX, srcY, maskX, maskY,dstX, dstY, w, h);*/
+
+ srcXend = srcX + w;
+ srcYend = srcY + h;
+ maskXend = maskX + w;
+ maskYend = maskY + h;
+ if (is_transform[0]) {
+ v.vector[0] = IntToxFixed(srcX);
+ v.vector[1] = IntToxFixed(srcY);
+ v.vector[2] = xFixed1;
+ PictureTransformPoint(transform[0], &v);
+ srcX = xFixedToInt(v.vector[0]);
+ srcY = xFixedToInt(v.vector[1]);
+ v.vector[0] = IntToxFixed(srcXend);
+ v.vector[1] = IntToxFixed(srcYend);
+ v.vector[2] = xFixed1;
+ PictureTransformPoint(transform[0], &v);
+ srcXend = xFixedToInt(v.vector[0]);
+ srcYend = xFixedToInt(v.vector[1]);
+ }
+ if (is_transform[1]) {
+ v.vector[0] = IntToxFixed(maskX);
+ v.vector[1] = IntToxFixed(maskY);
+ v.vector[2] = xFixed1;
+ PictureTransformPoint(transform[1], &v);
+ maskX = xFixedToInt(v.vector[0]);
+ maskY = xFixedToInt(v.vector[1]);
+ v.vector[0] = IntToxFixed(maskXend);
+ v.vector[1] = IntToxFixed(maskYend);
+ v.vector[2] = xFixed1;
+ PictureTransformPoint(transform[1], &v);
+ maskXend = xFixedToInt(v.vector[0]);
+ maskYend = xFixedToInt(v.vector[1]);
+ }
+
+ if (atic->is_r100) {
+ BEGIN_DMA(4 * VTX_DWORD_COUNT + 3);
+ OUT_RING(DMA_PACKET3(RADEON_CP_PACKET3_3D_DRAW_IMMD,
+ 4 * VTX_DWORD_COUNT + 2));
+ OUT_RING(RADEON_CP_VC_FRMT_XY |
+ RADEON_CP_VC_FRMT_ST0 |
+ RADEON_CP_VC_FRMT_ST1);
+ OUT_RING(RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_FAN |
+ RADEON_CP_VC_CNTL_PRIM_WALK_RING |
+ RADEON_CP_VC_CNTL_MAOS_ENABLE |
+ RADEON_CP_VC_CNTL_VTX_FMT_RADEON_MODE |
+ (4 << RADEON_CP_VC_CNTL_NUM_SHIFT));
+ } else {
+ BEGIN_DMA(4 * VTX_DWORD_COUNT + 2);
+ OUT_RING(DMA_PACKET3(R200_CP_PACKET3_3D_DRAW_IMMD_2,
+ 4 * VTX_DWORD_COUNT + 1));
+ OUT_RING(RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_FAN |
+ RADEON_CP_VC_CNTL_PRIM_WALK_RING |
+ (4 << RADEON_CP_VC_CNTL_NUM_SHIFT));
+ }
+
+ VTX_OUT(dstX, dstY, srcX, srcY, maskX, maskY);
+ VTX_OUT(dstX, dstY + h, srcX, srcYend, maskX, maskYend);
+ VTX_OUT(dstX + w, dstY + h, srcXend, srcYend, maskXend, maskYend);
+ VTX_OUT(dstX + w, dstY, srcXend, srcY, maskXend, maskY);
+
+ LEAVE_DRAW(0);
+
+ END_DMA();
+}
+
+void
+RadeonDoneComposite(void)
+{
+ ENTER_DRAW(0);
+ LEAVE_DRAW(0);
+}
+
+Bool
+RadeonPrepareTrapezoids(PicturePtr pDstPicture, PixmapPtr pDst)
+{
+ KdScreenPriv(pDst->drawable.pScreen);
+ ATIScreenInfo(pScreenPriv);
+ ATICardInfo(pScreenPriv);
+ CARD32 dst_offset, dst_pitch;
+ int pixel_shift;
+ RING_LOCALS;
+
+ pixel_shift = pDst->drawable.bitsPerPixel >> 4;
+
+ accel_atis = atis;
+
+ dst_offset = ((CARD8 *)pDst->devPrivate.ptr -
+ pScreenPriv->screen->memory_base);
+ dst_pitch = pDst->devKind;
+ if ((dst_offset & 0x0f) != 0)
+ ATI_FALLBACK(("Bad destination offset 0x%x\n", dst_offset));
+ if (((dst_pitch >> pixel_shift) & 0x7) != 0)
+ ATI_FALLBACK(("Bad destination pitch 0x%x\n", dst_pitch));
+
+ RadeonSwitchTo3D(atis);
+
+ BEGIN_DMA(8);
+
+ OUT_RING(DMA_PACKET0(RADEON_REG_PP_CNTL, 5));
+ OUT_RING_REG(RADEON_REG_PP_CNTL, RADEON_TEX_BLEND_0_ENABLE);
+ OUT_RING_REG(RADEON_REG_RB3D_CNTL,
+ RADEON_COLOR_FORMAT_RGB8 | RADEON_ALPHA_BLEND_ENABLE);
+ OUT_RING_REG(RADEON_REG_RB3D_COLOROFFSET, dst_offset);
+ OUT_RING_REG(RADEON_REG_RE_WIDTH_HEIGHT,
+ ((pDst->drawable.height - 1) << 16) |
+ (pDst->drawable.width - 1));
+ OUT_RING_REG(RADEON_REG_RB3D_COLORPITCH, dst_pitch >> pixel_shift);
+ OUT_REG(RADEON_REG_RB3D_BLENDCNTL, RadeonBlendOp[PictOpAdd].blend_cntl);
+ END_DMA();
+
+ if (atic->is_r100) {
+ BEGIN_DMA(4);
+ OUT_RING(DMA_PACKET0(RADEON_REG_PP_TXCBLEND_0, 3));
+ OUT_RING_REG(RADEON_REG_PP_TXCBLEND_0,
+ RADEON_BLEND_CTL_ADD | RADEON_CLAMP_TX |
+ RADEON_COLOR_ARG_C_TFACTOR_ALPHA);
+ OUT_RING_REG(RADEON_REG_PP_TXABLEND_0,
+ RADEON_BLEND_CTL_ADD | RADEON_CLAMP_TX |
+ RADEON_ALPHA_ARG_C_TFACTOR_ALPHA);
+ OUT_RING_REG(RADEON_REG_PP_TFACTOR_0, 0x01000000);
+ END_DMA();
+ } else if (atic->is_r200) {
+ BEGIN_DMA(14);
+ OUT_REG(R200_REG_SE_VTX_FMT_0, R200_VTX_XY);
+ OUT_REG(R200_REG_SE_VTX_FMT_1, 0);
+ OUT_REG(R200_REG_PP_TXCBLEND_0,
+ R200_TXC_ARG_C_TFACTOR_COLOR);
+ OUT_REG(R200_REG_PP_TXABLEND_0,
+ R200_TXA_ARG_C_TFACTOR_ALPHA);
+ OUT_REG(R200_REG_PP_TXCBLEND2_0, R200_TXC_OUTPUT_REG_R0);
+ OUT_REG(R200_REG_PP_TXABLEND2_0, R200_TXA_OUTPUT_REG_R0);
+ OUT_REG(RADEON_REG_PP_TFACTOR_0, 0x01000000);
+ END_DMA();
+ }
+
+ return TRUE;
+}
+
+#define TRAP_VERT_RING_COUNT 2
+
+#define TRAP_VERT(_x, _y) \
+do { \
+ OUT_RING_F((_x) + sample_x); \
+ OUT_RING_F((_y) + sample_y); \
+} while (0)
+
+void
+RadeonTrapezoids(KaaTrapezoid *traps, int ntraps)
+{
+ ATIScreenInfo *atis = accel_atis;
+ ATICardInfo *atic = atis->atic;
+ RING_LOCALS;
+
+ while (ntraps > 0) {
+ int i, sample, count, vertcount;
+
+ count = 0xffff / 4 / sample_count;
+ if (count > ntraps)
+ count = ntraps;
+ vertcount = count * sample_count * 4;
+
+ if (atic->is_r100) {
+ BEGIN_DMA(3 + vertcount * TRAP_VERT_RING_COUNT);
+ OUT_RING(DMA_PACKET3(RADEON_CP_PACKET3_3D_DRAW_IMMD,
+ 2 + vertcount * TRAP_VERT_RING_COUNT));
+ OUT_RING(RADEON_CP_VC_FRMT_XY);
+ OUT_RING(RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_FAN |
+ RADEON_CP_VC_CNTL_PRIM_WALK_RING |
+ RADEON_CP_VC_CNTL_MAOS_ENABLE |
+ RADEON_CP_VC_CNTL_VTX_FMT_RADEON_MODE |
+ (vertcount << RADEON_CP_VC_CNTL_NUM_SHIFT));
+ } else {
+ BEGIN_DMA(2 + vertcount * TRAP_VERT_RING_COUNT);
+ OUT_RING(DMA_PACKET3(R200_CP_PACKET3_3D_DRAW_IMMD_2,
+ 1 + vertcount * TRAP_VERT_RING_COUNT));
+ OUT_RING(RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_FAN |
+ RADEON_CP_VC_CNTL_PRIM_WALK_RING |
+ (vertcount << RADEON_CP_VC_CNTL_NUM_SHIFT));
+ }
+
+ for (i = 0; i < count; i++) {
+ for (sample = 0; sample < sample_count; sample++) {
+ float sample_x = sample_offsets_x[sample];
+ float sample_y = sample_offsets_y[sample];
+ TRAP_VERT(traps[i].tl, traps[i].ty);
+ TRAP_VERT(traps[i].bl, traps[i].by);
+ TRAP_VERT(traps[i].br, traps[i].by);
+ TRAP_VERT(traps[i].tr, traps[i].ty);
+ }
+ }
+ END_DMA();
+
+ ntraps -= count;
+ traps += count;
+ }
+}
+
+void
+RadeonDoneTrapezoids(void)
+{
+ ATIScreenInfo *atis = accel_atis;
+ RING_LOCALS;
+
+ BEGIN_DMA(2);
+ OUT_REG(RADEON_REG_RE_WIDTH_HEIGHT, 0xffffffff);
+ END_DMA();
+}