diff options
author | marha <marha@users.sourceforge.net> | 2012-06-08 09:33:13 +0200 |
---|---|---|
committer | marha <marha@users.sourceforge.net> | 2012-06-08 09:33:13 +0200 |
commit | 990bc3f015a4f8fce2eb918375defcd44980a845 (patch) | |
tree | 8e8301f19482b52cc00bd95b4593522cc93267af /xorg-server/hw/xfree86/ddc/DDC.HOWTO | |
parent | 1af6fc1b5d93e54d6674de8b5870448b29f139a7 (diff) | |
download | vcxsrv-990bc3f015a4f8fce2eb918375defcd44980a845.tar.gz vcxsrv-990bc3f015a4f8fce2eb918375defcd44980a845.tar.bz2 vcxsrv-990bc3f015a4f8fce2eb918375defcd44980a845.zip |
Used synchronise script to update files
Diffstat (limited to 'xorg-server/hw/xfree86/ddc/DDC.HOWTO')
-rw-r--r-- | xorg-server/hw/xfree86/ddc/DDC.HOWTO | 194 |
1 files changed, 97 insertions, 97 deletions
diff --git a/xorg-server/hw/xfree86/ddc/DDC.HOWTO b/xorg-server/hw/xfree86/ddc/DDC.HOWTO index 1d06ca124..54fbe73ad 100644 --- a/xorg-server/hw/xfree86/ddc/DDC.HOWTO +++ b/xorg-server/hw/xfree86/ddc/DDC.HOWTO @@ -1,97 +1,97 @@ - DDC.HOWTO - - This file describes how to add DDC support to a chipset driver. - -1) DDC INITIALIZATION - - When implementing DDC in the driver one has the choice between - DDC1 and DDC2. - DDC1 data is continuously transmitted by a DDC1 capable display - device. The data is send serially over a data line; the Vsync - signal serves as clock. Only one EDID 1.x data block can be - transmitted using DDC1. Since transmission of an EDID1 block - using a regular Vsync frequency would take up several seconds - the driver can increase the Vsync frequency to up to 25 kHz as - soon as it detects DDC1 activity on the data line. - DDC2 data is transmitted using the I2C protocol. This requires - an additional clock line. DDC2 is capable of transmitting EDID1 - and EDID2 block as well as a VDIF block on display devices that - support these. - Display devices switch into the DDC2 mode as soon as they detect - activity on the DDC clock line. Once the are in DDC2 mode they - stop transmitting DDC1 signals until the next power cycle. - - Some graphics chipset configurations which are not capable of - DDC2 might still be able to read DDC1 data. Where available - DDC2 it is preferable. - - All relevant prototypes and defines are in xf86DDC.h. - DDC2 additionally requires I2C support. The I2C prototypes - are in xf86i2c.h. - - DDC1 Support: - - The driver has to provide a read function which waits for the - end of the next Vsync signal and reads in and returns the status - of the DDC line: - - unsigned int XXX_ddc1Read(ScrnInfoPtr pScrn) - - Additionally a function is required to increase the Vsync - frequency to max. 25 kHz. - - void XXX_ddc1SetSpeed(ScrnInfoPtr pScrn, xf86ddcSpeed speed) - - If the speed argument is DDC_FAST the function should increase - the Vsync frequency on DDC_SLOW it should restore the original - value. For convenience a generic ddc1SetSpeed() function is provided - in the vga module for VGA-like chipsets. - - void vgaHWddc1SetSpeed(ScrnInfoPtr pScrn, sf86ddcSpeed speed). - - To read out the DDC1 data the driver should call - - xf86MonPtr xf86DoEDID_DDC1(int scrnIndex, - void (*DDC1SetSpeed)(ScrnInfoPtr, xf86ddcSpeed), - unsigned int (*DDC1Read)(ScrnInfoPtr)) - - in PreInit(). DDC1SetSpeed is a pointer to the SetSpeed() - function, DDC1Read has to point to the DDC1 read function. - The function will return a pointer to the xf86Monitor structure - which contains all information retrieved by DDC. - NULL will be returned on failure. - - DDC2 Support - - To read out DDC2 information I2C has to be initialized first. - (See documentation for the i2c module). - The function - - xf86MonPtr xf86DoEDID_DDC2(int scrnIndex, I2CBusPtr pBus) - - is provided to read out and process DDC2 data. A pointer - to the I2CBusRec of the appropriate I2C Bus has to be passed - as the second argument. - The function will return a pointer to the xf86Monitor structure - which contains all information retrieved by DDC. - NULL will be returned on failure. - - Printing monitor parameters - - To print out the information contained in the xf86Monitor - structure the function - - xf86MonPtr xf86PrintEDID(xf86MonPtr monitor) - - is provided. - - Further processing of the xf86Monitor structure is not yet - implemented. However, it is planned to use the information - about video modes, gamma values etc. - Therefore it is strongly recommended to read out DDC data - before any video mode processing is done. - - - - -$XFree86: xc/programs/Xserver/hw/xfree86/ddc/DDC.HOWTO,v 1.2 1998/12/06 13:30:39 dawes Exp $ + DDC.HOWTO
+
+ This file describes how to add DDC support to a chipset driver.
+
+1) DDC INITIALIZATION
+
+ When implementing DDC in the driver one has the choice between
+ DDC1 and DDC2.
+ DDC1 data is continuously transmitted by a DDC1 capable display
+ device. The data is send serially over a data line; the Vsync
+ signal serves as clock. Only one EDID 1.x data block can be
+ transmitted using DDC1. Since transmission of an EDID1 block
+ using a regular Vsync frequency would take up several seconds
+ the driver can increase the Vsync frequency to up to 25 kHz as
+ soon as it detects DDC1 activity on the data line.
+ DDC2 data is transmitted using the I2C protocol. This requires
+ an additional clock line. DDC2 is capable of transmitting EDID1
+ and EDID2 block as well as a VDIF block on display devices that
+ support these.
+ Display devices switch into the DDC2 mode as soon as they detect
+ activity on the DDC clock line. Once the are in DDC2 mode they
+ stop transmitting DDC1 signals until the next power cycle.
+
+ Some graphics chipset configurations which are not capable of
+ DDC2 might still be able to read DDC1 data. Where available
+ DDC2 it is preferable.
+
+ All relevant prototypes and defines are in xf86DDC.h.
+ DDC2 additionally requires I2C support. The I2C prototypes
+ are in xf86i2c.h.
+
+ DDC1 Support:
+
+ The driver has to provide a read function which waits for the
+ end of the next Vsync signal and reads in and returns the status
+ of the DDC line:
+
+ unsigned int XXX_ddc1Read(ScrnInfoPtr pScrn)
+
+ Additionally a function is required to increase the Vsync
+ frequency to max. 25 kHz.
+
+ void XXX_ddc1SetSpeed(ScrnInfoPtr pScrn, xf86ddcSpeed speed)
+
+ If the speed argument is DDC_FAST the function should increase
+ the Vsync frequency on DDC_SLOW it should restore the original
+ value. For convenience a generic ddc1SetSpeed() function is provided
+ in the vga module for VGA-like chipsets.
+
+ void vgaHWddc1SetSpeed(ScrnInfoPtr pScrn, sf86ddcSpeed speed).
+
+ To read out the DDC1 data the driver should call
+
+ xf86MonPtr xf86DoEDID_DDC1(int scrnIndex,
+ void (*DDC1SetSpeed)(ScrnInfoPtr, xf86ddcSpeed),
+ unsigned int (*DDC1Read)(ScrnInfoPtr))
+
+ in PreInit(). DDC1SetSpeed is a pointer to the SetSpeed()
+ function, DDC1Read has to point to the DDC1 read function.
+ The function will return a pointer to the xf86Monitor structure
+ which contains all information retrieved by DDC.
+ NULL will be returned on failure.
+
+ DDC2 Support
+
+ To read out DDC2 information I2C has to be initialized first.
+ (See documentation for the i2c module).
+ The function
+
+ xf86MonPtr xf86DoEDID_DDC2(int scrnIndex, I2CBusPtr pBus)
+
+ is provided to read out and process DDC2 data. A pointer
+ to the I2CBusRec of the appropriate I2C Bus has to be passed
+ as the second argument.
+ The function will return a pointer to the xf86Monitor structure
+ which contains all information retrieved by DDC.
+ NULL will be returned on failure.
+
+ Printing monitor parameters
+
+ To print out the information contained in the xf86Monitor
+ structure the function
+
+ xf86MonPtr xf86PrintEDID(xf86MonPtr monitor)
+
+ is provided.
+
+ Further processing of the xf86Monitor structure is not yet
+ implemented. However, it is planned to use the information
+ about video modes, gamma values etc.
+ Therefore it is strongly recommended to read out DDC data
+ before any video mode processing is done.
+
+
+
+
+$XFree86: xc/programs/Xserver/hw/xfree86/ddc/DDC.HOWTO,v 1.2 1998/12/06 13:30:39 dawes Exp $
|