xserver git update 15/5/2010

3 files changed, 1551 insertions, 1551 deletions

diff --git a/xorg-server/hw/xfree86/int10/generic.c b/xorg-server/hw/xfree86/int10/generic.c
index 9d39e99b0..c242405cc 100644
--- a/xorg-server/hw/xfree86/int10/generic.c
+++ b/xorg-server/hw/xfree86/int10/generic.c
@@ -1,494 +1,494 @@
-/*
- *                   XFree86 int10 module
- *   execute BIOS int 10h calls in x86 real mode environment
- *                 Copyright 1999 Egbert Eich
- */
-#ifdef HAVE_XORG_CONFIG_H
-#include <xorg-config.h>
-#endif
-
-#include <string.h>
-#include <unistd.h>
-
-#include "xf86.h"
-#include "xf86_OSproc.h"
-#include "compiler.h"
-#define _INT10_PRIVATE
-#include "xf86int10.h"
-#include "int10Defines.h"
-#include "Pci.h"
-
-#define ALLOC_ENTRIES(x) ((V_RAM / x) - 1)
-
-static CARD8 read_b(xf86Int10InfoPtr pInt,int addr);
-static CARD16 read_w(xf86Int10InfoPtr pInt,int addr);
-static CARD32 read_l(xf86Int10InfoPtr pInt,int addr);
-static void write_b(xf86Int10InfoPtr pInt,int addr, CARD8 val);
-static void write_w(xf86Int10InfoPtr pInt,int addr, CARD16 val);
-static void write_l(xf86Int10InfoPtr pInt,int addr, CARD32 val);
-
-/*
- * the emulator cannot pass a pointer to the current xf86Int10InfoRec
- * to the memory access functions therefore store it here.
- */
-
-typedef struct {
-    int shift;
-    int entries;
-    void* base;
-    void* vRam;
-    int highMemory;
-    void* sysMem;
-    char* alloc;
-} genericInt10Priv;
-
-#define INTPriv(x) ((genericInt10Priv*)x->private)
-
-int10MemRec genericMem = {
-    read_b,
-    read_w,
-    read_l,
-    write_b,
-    write_w,
-    write_l
-};
-
-static void MapVRam(xf86Int10InfoPtr pInt);
-static void UnmapVRam(xf86Int10InfoPtr pInt);
-#ifdef _PC
-#define GET_HIGH_BASE(x) (((V_BIOS + (x) + getpagesize() - 1)/getpagesize()) \
-                              * getpagesize())
-#endif
-
-static void *sysMem = NULL;
-
-/**
- * Read legacy VGA video BIOS associated with specified domain.
- * 
- * Attempts to read up to 128KiB of legacy VGA video BIOS.
- * 
- * \return
- * The number of bytes read on success or -1 on failure.
- *
- * \bug
- * PCI ROMs can contain multiple BIOS images (e.g., OpenFirmware, x86 VGA,
- * etc.).  How do we know that \c pci_device_read_rom will return the
- * legacy VGA BIOS image?
- */
-#ifndef _PC
-static int
-read_legacy_video_BIOS(struct pci_device *dev, unsigned char *Buf)
-{
-    const ADDRESS Base = 0xC0000;
-    const int Len = 0x10000 * 2;
-    const int pagemask = getpagesize() - 1;
-    const ADDRESS offset = Base & ~pagemask;
-    const unsigned long size = ((Base + Len + pagemask) & ~pagemask) - offset;
-    unsigned char *ptr, *src;
-    int len;
-
-
-    /* Try to use the civilized PCI interface first.
-     */
-    if (pci_device_read_rom(dev, Buf) == 0) {
-	return dev->rom_size;
-    }
-
-    ptr = xf86MapDomainMemory(-1, VIDMEM_READONLY, dev, offset, size);
-
-    if (!ptr)
-	return -1;
-
-    /* Using memcpy() here can hang the system */
-    src = ptr + (Base - offset);
-    for (len = 0; len < (Len / 2); len++) {
-	Buf[len] = src[len];
-    }
-
-    if ((Buf[0] == 0x55) && (Buf[1] == 0xAA) && (Buf[2] > 0x80)) {
-	for ( /* empty */ ; len < Len; len++) {
-	    Buf[len] = src[len];
-	}
-    }
-
-    xf86UnMapVidMem(-1, ptr, size);
-
-    return Len;
-}
-#endif /* _PC */
-
-
-xf86Int10InfoPtr
-xf86ExtendedInitInt10(int entityIndex, int Flags)
-{
-    xf86Int10InfoPtr pInt;
-    void* base = 0;
-    void* vbiosMem = 0;
-    void* options = NULL;
-    int screen;
-    legacyVGARec vga;
- 
-#if 0
-    CARD32 cs;
-#endif
-
-    screen = (xf86FindScreenForEntity(entityIndex))->scrnIndex;
-
-    options = xf86HandleInt10Options(xf86Screens[screen],entityIndex);
-    
-    if (int10skip(options)) {
-	xfree(options);
-	return NULL;
-    }
-    
-    pInt = (xf86Int10InfoPtr)xnfcalloc(1, sizeof(xf86Int10InfoRec));
-    pInt->entityIndex = entityIndex;
-    if (!xf86Int10ExecSetup(pInt))
-	goto error0;
-    pInt->mem = &genericMem;
-    pInt->private = (pointer)xnfcalloc(1, sizeof(genericInt10Priv));
-    INTPriv(pInt)->alloc = (pointer)xnfcalloc(1, ALLOC_ENTRIES(getpagesize()));
-    pInt->scrnIndex = screen;
-    base = INTPriv(pInt)->base = xnfalloc(SYS_BIOS);
-
-    /* FIXME: Shouldn't this be a failure case?  Leaving dev as NULL seems like
-     * FIXME: an error
-     */
-    pInt->dev = xf86GetPciInfoForEntity(entityIndex);
-
-    /*
-     * we need to map video RAM MMIO as some chipsets map mmio
-     * registers into this range.
-     */
-    MapVRam(pInt);
-#ifdef _PC
-    if (!sysMem)
-	sysMem = xf86MapVidMem(screen, VIDMEM_MMIO, V_BIOS,
-			       BIOS_SIZE + SYS_BIOS - V_BIOS);
-    INTPriv(pInt)->sysMem = sysMem;
-
-    if (xf86ReadBIOS(0, 0, base, LOW_PAGE_SIZE) < 0) {
-	xf86DrvMsg(screen, X_ERROR, "Cannot read int vect\n");
-	goto error1;
-    }
-
-    /*
-     * Retrieve everything between V_BIOS and SYS_BIOS as some system BIOSes
-     * have executable code there.  Note that xf86ReadBIOS() can only read in
-     * 64kB at a time.
-     */
-    memset((char *)base + V_BIOS, 0, SYS_BIOS - V_BIOS);
-#if 0
-    for (cs = V_BIOS;  cs < SYS_BIOS;  cs += V_BIOS_SIZE)
-	if (xf86ReadBIOS(cs, 0, (unsigned char *)base + cs, V_BIOS_SIZE) <
-		V_BIOS_SIZE)
-	    xf86DrvMsg(screen, X_WARNING,
-		       "Unable to retrieve all of segment 0x%06X.\n", cs);
-#endif
-    INTPriv(pInt)->highMemory = V_BIOS;
-    
-    if (xf86IsEntityPrimary(entityIndex) && !(initPrimary(options))) {
-	if (!xf86int10GetBiosSegment(pInt, (unsigned char *)sysMem - V_BIOS))
-	    goto error1;
-
-	set_return_trap(pInt);
-
-	pInt->Flags = Flags & (SET_BIOS_SCRATCH | RESTORE_BIOS_SCRATCH);
-	if (! (pInt->Flags & SET_BIOS_SCRATCH))
-	    pInt->Flags &= ~RESTORE_BIOS_SCRATCH;
-	xf86Int10SaveRestoreBIOSVars(pInt, TRUE);
-	
-    } else {
-	const BusType location_type = xf86int10GetBiosLocationType(pInt);
-	int bios_location = V_BIOS;
-
-        reset_int_vect(pInt);
-	set_return_trap(pInt);
-
-	switch (location_type) {
-	case BUS_PCI: {
-	    int err;
-	    struct pci_device *rom_device =
-		xf86GetPciInfoForEntity(pInt->entityIndex);
-
-	    vbiosMem = (unsigned char *)base + bios_location;
-	    err = pci_device_read_rom(rom_device, vbiosMem);
-	    if (err) {
-		xf86DrvMsg(screen,X_ERROR,"Cannot read V_BIOS (3) %s\n",
-			   strerror(err));
-		goto error1;
-	    }
-	    INTPriv(pInt)->highMemory = GET_HIGH_BASE(rom_device->rom_size);
-	    break;
-	}
-	default:
-	    goto error1;
-	}
-	pInt->BIOSseg = V_BIOS >> 4;
-	pInt->num = 0xe6;
-	LockLegacyVGA(pInt, &vga);
-	xf86ExecX86int10(pInt);
-	UnlockLegacyVGA(pInt, &vga);
-    }
-#else
-    if (!sysMem) {
-	sysMem = xnfalloc(BIOS_SIZE);
-	setup_system_bios(sysMem);
-    }
-    INTPriv(pInt)->sysMem = sysMem;
-    setup_int_vect(pInt);
-    set_return_trap(pInt);
-
-    /* Retrieve the entire legacy video BIOS segment.  This can be upto
-     * 128KiB.
-     */
-    vbiosMem = (char *)base + V_BIOS;
-    memset(vbiosMem, 0, 2 * V_BIOS_SIZE);
-    if (read_legacy_video_BIOS(pInt->dev, vbiosMem) < V_BIOS_SIZE) {
-	xf86DrvMsg(screen, X_WARNING,
-		   "Unable to retrieve all of segment 0x0C0000.\n");
-    }
-
-    /*
-     * If this adapter is the primary, use its post-init BIOS (if we can find
-     * it).
-     */
-    {
-	int bios_location = V_BIOS;
-	Bool done = FALSE;
-	vbiosMem = (unsigned char *)base + bios_location;
-	
-	if (xf86IsEntityPrimary(entityIndex)) {
-	    if (int10_check_bios(screen, bios_location >> 4, vbiosMem)) 
-		done = TRUE;
-	    else 
-		xf86DrvMsg(screen,X_INFO,
-			"No legacy BIOS found -- trying PCI\n");
-	} 
-	if (!done) {
-	    int err;
-	    struct pci_device *rom_device =
-		xf86GetPciInfoForEntity(pInt->entityIndex);
-
-	    err = pci_device_read_rom(rom_device, vbiosMem);
-	    if (err) {
-		xf86DrvMsg(screen,X_ERROR,"Cannot read V_BIOS (5) %s\n",
-			   strerror(err));
-		goto error1;
-	    }
-	} 
-    }
-
-    pInt->BIOSseg = V_BIOS >> 4;
-    pInt->num = 0xe6;
-    LockLegacyVGA(pInt, &vga);
-    xf86ExecX86int10(pInt);
-    UnlockLegacyVGA(pInt, &vga);
-#endif
-    xfree(options);
-    return pInt;
-
- error1:
-    xfree(base);
-    UnmapVRam(pInt);
-    xfree(INTPriv(pInt)->alloc);
-    xfree(pInt->private);
- error0:
-    xfree(pInt);
-    xfree(options);
-    
-    return NULL;
-}
-
-static void
-MapVRam(xf86Int10InfoPtr pInt)
-{
-    int pagesize = getpagesize();
-    int size = ((VRAM_SIZE + pagesize - 1) / pagesize) * pagesize;
-
-    INTPriv(pInt)->vRam = xf86MapDomainMemory(pInt->scrnIndex, VIDMEM_MMIO,
-					      pInt->dev, V_RAM, size);
-
-    pInt->ioBase = xf86Screens[pInt->scrnIndex]->domainIOBase;
-}
-
-static void
-UnmapVRam(xf86Int10InfoPtr pInt)
-{
-    int screen = pInt->scrnIndex;
-    int pagesize = getpagesize();
-    int size = ((VRAM_SIZE + pagesize - 1)/pagesize) * pagesize;
-
-    xf86UnMapVidMem(screen, INTPriv(pInt)->vRam, size);
-}
-
-Bool
-MapCurrentInt10(xf86Int10InfoPtr pInt)
-{
-    /* nothing to do here */
-    return TRUE;
-}
-
-void
-xf86FreeInt10(xf86Int10InfoPtr pInt)
-{
-    if (!pInt)
-      return;
-#if defined (_PC)
-    xf86Int10SaveRestoreBIOSVars(pInt, FALSE);
-#endif
-    if (Int10Current == pInt)
-	Int10Current = NULL;
-    xfree(INTPriv(pInt)->base);
-    UnmapVRam(pInt);
-    xfree(INTPriv(pInt)->alloc);
-    xfree(pInt->private);
-    xfree(pInt);
-}
-
-void *
-xf86Int10AllocPages(xf86Int10InfoPtr pInt, int num, int *off)
-{
-    int pagesize = getpagesize();
-    int num_pages = ALLOC_ENTRIES(pagesize);
-    int i,j;
-
-    for (i = 0; i < (num_pages - num); i++) {
-	if (INTPriv(pInt)->alloc[i] == 0) {
-	    for (j = i; j < (num + i); j++)
-		if (INTPriv(pInt)->alloc[j] != 0)
-		    break;
-	    if (j == (num + i))
-		break;
-	    i += num;
-	}
-    }
-    if (i == (num_pages - num))
-	return NULL;
-
-    for (j = i; j < (i + num); j++)
-	INTPriv(pInt)->alloc[j] = 1;
-
-    *off = (i + 1) * pagesize;
-
-    return (char *)INTPriv(pInt)->base + *off;
-}
-
-void
-xf86Int10FreePages(xf86Int10InfoPtr pInt, void *pbase, int num)
-{
-    int pagesize = getpagesize();
-    int first = (((char *)pbase - (char *)INTPriv(pInt)->base) / pagesize) - 1;
-    int i;
-
-    for (i = first; i < (first + num); i++)
-	INTPriv(pInt)->alloc[i] = 0;
-}
-
-#define OFF(addr) ((addr) & 0xffff)
-#if defined _PC
-# define HIGH_OFFSET (INTPriv(pInt)->highMemory)
-# define HIGH_BASE   V_BIOS
-#else
-# define HIGH_OFFSET SYS_BIOS
-# define HIGH_BASE   SYS_BIOS
-#endif
-# define SYS(addr) ((addr) >= HIGH_OFFSET)
-#define V_ADDR(addr) \
-	  (SYS(addr) ? ((char*)INTPriv(pInt)->sysMem) + (addr - HIGH_BASE) \
-	   : (((char*)(INTPriv(pInt)->base) + addr)))
-#define VRAM_ADDR(addr) (addr - V_RAM)
-#define VRAM_BASE (INTPriv(pInt)->vRam)
-
-#define VRAM(addr) ((addr >= V_RAM) && (addr < (V_RAM + VRAM_SIZE)))
-#define V_ADDR_RB(addr) \
-	(VRAM(addr)) ? MMIO_IN8((CARD8*)VRAM_BASE,VRAM_ADDR(addr)) \
-	   : *(CARD8*) V_ADDR(addr)
-#define V_ADDR_RW(addr) \
-	(VRAM(addr)) ? MMIO_IN16((CARD16*)VRAM_BASE,VRAM_ADDR(addr)) \
-	   : ldw_u((pointer)V_ADDR(addr))
-#define V_ADDR_RL(addr) \
-	(VRAM(addr)) ? MMIO_IN32((CARD32*)VRAM_BASE,VRAM_ADDR(addr)) \
-	   : ldl_u((pointer)V_ADDR(addr))
-
-#define V_ADDR_WB(addr,val) \
-	if(VRAM(addr)) \
-	    MMIO_OUT8((CARD8*)VRAM_BASE,VRAM_ADDR(addr),val); \
-	else \
-	    *(CARD8*) V_ADDR(addr) = val;
-#define V_ADDR_WW(addr,val) \
-	if(VRAM(addr)) \
-	    MMIO_OUT16((CARD16*)VRAM_BASE,VRAM_ADDR(addr),val); \
-	else \
-	    stw_u((val),(pointer)(V_ADDR(addr)));
-
-#define V_ADDR_WL(addr,val) \
-	if (VRAM(addr)) \
-	    MMIO_OUT32((CARD32*)VRAM_BASE,VRAM_ADDR(addr),val); \
-	else \
-	    stl_u(val,(pointer)(V_ADDR(addr)));
-
-static CARD8
-read_b(xf86Int10InfoPtr pInt, int addr)
-{
-    return V_ADDR_RB(addr);
-}
-
-static CARD16
-read_w(xf86Int10InfoPtr pInt, int addr)
-{
-#if X_BYTE_ORDER == X_LITTLE_ENDIAN
-    if (OFF(addr + 1) > 0)
-	return V_ADDR_RW(addr);
-#endif
-    return V_ADDR_RB(addr) | (V_ADDR_RB(addr + 1) << 8);
-}
-
-static CARD32
-read_l(xf86Int10InfoPtr pInt, int addr)
-{
-#if X_BYTE_ORDER == X_LITTLE_ENDIAN
-    if (OFF(addr + 3) > 2)
-	return V_ADDR_RL(addr);
-#endif
-    return V_ADDR_RB(addr) |
-	   (V_ADDR_RB(addr + 1) << 8) |
-	   (V_ADDR_RB(addr + 2) << 16) |
-	   (V_ADDR_RB(addr + 3) << 24);
-}
-
-static void
-write_b(xf86Int10InfoPtr pInt, int addr, CARD8 val)
-{
-    V_ADDR_WB(addr,val);
-}
-
-static void
-write_w(xf86Int10InfoPtr pInt, int addr, CARD16 val)
-{
-#if X_BYTE_ORDER == X_LITTLE_ENDIAN
-    if (OFF(addr + 1) > 0)
-      { V_ADDR_WW(addr, val); }
-#endif
-    V_ADDR_WB(addr, val);
-    V_ADDR_WB(addr + 1, val >> 8);
-}
-
-static void
-write_l(xf86Int10InfoPtr pInt, int addr, CARD32 val)
-{
-#if X_BYTE_ORDER == X_LITTLE_ENDIAN
-    if (OFF(addr + 3) > 2)
-      { V_ADDR_WL(addr, val); }
-#endif
-    V_ADDR_WB(addr, val);
-    V_ADDR_WB(addr + 1, val >> 8);
-    V_ADDR_WB(addr + 2, val >> 16);
-    V_ADDR_WB(addr + 3, val >> 24);
-}
-
-pointer
-xf86int10Addr(xf86Int10InfoPtr pInt, CARD32 addr)
-{
-    return V_ADDR(addr);
-}
+/*

+ *                   XFree86 int10 module

+ *   execute BIOS int 10h calls in x86 real mode environment

+ *                 Copyright 1999 Egbert Eich

+ */

+#ifdef HAVE_XORG_CONFIG_H

+#include <xorg-config.h>

+#endif

+

+#include <string.h>

+#include <unistd.h>

+

+#include "xf86.h"

+#include "xf86_OSproc.h"

+#include "compiler.h"

+#define _INT10_PRIVATE

+#include "xf86int10.h"

+#include "int10Defines.h"

+#include "Pci.h"

+

+#define ALLOC_ENTRIES(x) ((V_RAM / x) - 1)

+

+static CARD8 read_b(xf86Int10InfoPtr pInt,int addr);

+static CARD16 read_w(xf86Int10InfoPtr pInt,int addr);

+static CARD32 read_l(xf86Int10InfoPtr pInt,int addr);

+static void write_b(xf86Int10InfoPtr pInt,int addr, CARD8 val);

+static void write_w(xf86Int10InfoPtr pInt,int addr, CARD16 val);

+static void write_l(xf86Int10InfoPtr pInt,int addr, CARD32 val);

+

+/*

+ * the emulator cannot pass a pointer to the current xf86Int10InfoRec

+ * to the memory access functions therefore store it here.

+ */

+

+typedef struct {

+    int shift;

+    int entries;

+    void* base;

+    void* vRam;

+    int highMemory;

+    void* sysMem;

+    char* alloc;

+} genericInt10Priv;

+

+#define INTPriv(x) ((genericInt10Priv*)x->private)

+

+int10MemRec genericMem = {

+    read_b,

+    read_w,

+    read_l,

+    write_b,

+    write_w,

+    write_l

+};

+

+static void MapVRam(xf86Int10InfoPtr pInt);

+static void UnmapVRam(xf86Int10InfoPtr pInt);

+#ifdef _PC

+#define GET_HIGH_BASE(x) (((V_BIOS + (x) + getpagesize() - 1)/getpagesize()) \

+                              * getpagesize())

+#endif

+

+static void *sysMem = NULL;

+

+/**

+ * Read legacy VGA video BIOS associated with specified domain.

+ * 

+ * Attempts to read up to 128KiB of legacy VGA video BIOS.

+ * 

+ * \return

+ * The number of bytes read on success or -1 on failure.

+ *

+ * \bug

+ * PCI ROMs can contain multiple BIOS images (e.g., OpenFirmware, x86 VGA,

+ * etc.).  How do we know that \c pci_device_read_rom will return the

+ * legacy VGA BIOS image?

+ */

+#ifndef _PC

+static int

+read_legacy_video_BIOS(struct pci_device *dev, unsigned char *Buf)

+{

+    const ADDRESS Base = 0xC0000;

+    const int Len = 0x10000 * 2;

+    const int pagemask = getpagesize() - 1;

+    const ADDRESS offset = Base & ~pagemask;

+    const unsigned long size = ((Base + Len + pagemask) & ~pagemask) - offset;

+    unsigned char *ptr, *src;

+    int len;

+

+

+    /* Try to use the civilized PCI interface first.

+     */

+    if (pci_device_read_rom(dev, Buf) == 0) {

+	return dev->rom_size;

+    }

+

+    ptr = xf86MapDomainMemory(-1, VIDMEM_READONLY, dev, offset, size);

+

+    if (!ptr)

+	return -1;

+

+    /* Using memcpy() here can hang the system */

+    src = ptr + (Base - offset);

+    for (len = 0; len < (Len / 2); len++) {

+	Buf[len] = src[len];

+    }

+

+    if ((Buf[0] == 0x55) && (Buf[1] == 0xAA) && (Buf[2] > 0x80)) {

+	for ( /* empty */ ; len < Len; len++) {

+	    Buf[len] = src[len];

+	}

+    }

+

+    xf86UnMapVidMem(-1, ptr, size);

+

+    return Len;

+}

+#endif /* _PC */

+

+

+xf86Int10InfoPtr

+xf86ExtendedInitInt10(int entityIndex, int Flags)

+{

+    xf86Int10InfoPtr pInt;

+    void* base = 0;

+    void* vbiosMem = 0;

+    void* options = NULL;

+    int screen;

+    legacyVGARec vga;

+ 

+#if 0

+    CARD32 cs;

+#endif

+

+    screen = (xf86FindScreenForEntity(entityIndex))->scrnIndex;

+

+    options = xf86HandleInt10Options(xf86Screens[screen],entityIndex);

+    

+    if (int10skip(options)) {

+	free(options);

+	return NULL;

+    }

+    

+    pInt = (xf86Int10InfoPtr)xnfcalloc(1, sizeof(xf86Int10InfoRec));

+    pInt->entityIndex = entityIndex;

+    if (!xf86Int10ExecSetup(pInt))

+	goto error0;

+    pInt->mem = &genericMem;

+    pInt->private = (pointer)xnfcalloc(1, sizeof(genericInt10Priv));

+    INTPriv(pInt)->alloc = (pointer)xnfcalloc(1, ALLOC_ENTRIES(getpagesize()));

+    pInt->scrnIndex = screen;

+    base = INTPriv(pInt)->base = xnfalloc(SYS_BIOS);

+

+    /* FIXME: Shouldn't this be a failure case?  Leaving dev as NULL seems like

+     * FIXME: an error

+     */

+    pInt->dev = xf86GetPciInfoForEntity(entityIndex);

+

+    /*

+     * we need to map video RAM MMIO as some chipsets map mmio

+     * registers into this range.

+     */

+    MapVRam(pInt);

+#ifdef _PC

+    if (!sysMem)

+	sysMem = xf86MapVidMem(screen, VIDMEM_MMIO, V_BIOS,

+			       BIOS_SIZE + SYS_BIOS - V_BIOS);

+    INTPriv(pInt)->sysMem = sysMem;

+

+    if (xf86ReadBIOS(0, 0, base, LOW_PAGE_SIZE) < 0) {

+	xf86DrvMsg(screen, X_ERROR, "Cannot read int vect\n");

+	goto error1;

+    }

+

+    /*

+     * Retrieve everything between V_BIOS and SYS_BIOS as some system BIOSes

+     * have executable code there.  Note that xf86ReadBIOS() can only read in

+     * 64kB at a time.

+     */

+    memset((char *)base + V_BIOS, 0, SYS_BIOS - V_BIOS);

+#if 0

+    for (cs = V_BIOS;  cs < SYS_BIOS;  cs += V_BIOS_SIZE)

+	if (xf86ReadBIOS(cs, 0, (unsigned char *)base + cs, V_BIOS_SIZE) <

+		V_BIOS_SIZE)

+	    xf86DrvMsg(screen, X_WARNING,

+		       "Unable to retrieve all of segment 0x%06X.\n", cs);

+#endif

+    INTPriv(pInt)->highMemory = V_BIOS;

+    

+    if (xf86IsEntityPrimary(entityIndex) && !(initPrimary(options))) {

+	if (!xf86int10GetBiosSegment(pInt, (unsigned char *)sysMem - V_BIOS))

+	    goto error1;

+

+	set_return_trap(pInt);

+

+	pInt->Flags = Flags & (SET_BIOS_SCRATCH | RESTORE_BIOS_SCRATCH);

+	if (! (pInt->Flags & SET_BIOS_SCRATCH))

+	    pInt->Flags &= ~RESTORE_BIOS_SCRATCH;

+	xf86Int10SaveRestoreBIOSVars(pInt, TRUE);

+	

+    } else {

+	const BusType location_type = xf86int10GetBiosLocationType(pInt);

+	int bios_location = V_BIOS;

+

+        reset_int_vect(pInt);

+	set_return_trap(pInt);

+

+	switch (location_type) {

+	case BUS_PCI: {

+	    int err;

+	    struct pci_device *rom_device =

+		xf86GetPciInfoForEntity(pInt->entityIndex);

+

+	    vbiosMem = (unsigned char *)base + bios_location;

+	    err = pci_device_read_rom(rom_device, vbiosMem);

+	    if (err) {

+		xf86DrvMsg(screen,X_ERROR,"Cannot read V_BIOS (3) %s\n",

+			   strerror(err));

+		goto error1;

+	    }

+	    INTPriv(pInt)->highMemory = GET_HIGH_BASE(rom_device->rom_size);

+	    break;

+	}

+	default:

+	    goto error1;

+	}

+	pInt->BIOSseg = V_BIOS >> 4;

+	pInt->num = 0xe6;

+	LockLegacyVGA(pInt, &vga);

+	xf86ExecX86int10(pInt);

+	UnlockLegacyVGA(pInt, &vga);

+    }

+#else

+    if (!sysMem) {

+	sysMem = xnfalloc(BIOS_SIZE);

+	setup_system_bios(sysMem);

+    }

+    INTPriv(pInt)->sysMem = sysMem;

+    setup_int_vect(pInt);

+    set_return_trap(pInt);

+

+    /* Retrieve the entire legacy video BIOS segment.  This can be upto

+     * 128KiB.

+     */

+    vbiosMem = (char *)base + V_BIOS;

+    memset(vbiosMem, 0, 2 * V_BIOS_SIZE);

+    if (read_legacy_video_BIOS(pInt->dev, vbiosMem) < V_BIOS_SIZE) {

+	xf86DrvMsg(screen, X_WARNING,

+		   "Unable to retrieve all of segment 0x0C0000.\n");

+    }

+

+    /*

+     * If this adapter is the primary, use its post-init BIOS (if we can find

+     * it).

+     */

+    {

+	int bios_location = V_BIOS;

+	Bool done = FALSE;

+	vbiosMem = (unsigned char *)base + bios_location;

+	

+	if (xf86IsEntityPrimary(entityIndex)) {

+	    if (int10_check_bios(screen, bios_location >> 4, vbiosMem)) 

+		done = TRUE;

+	    else 

+		xf86DrvMsg(screen,X_INFO,

+			"No legacy BIOS found -- trying PCI\n");

+	} 

+	if (!done) {

+	    int err;

+	    struct pci_device *rom_device =

+		xf86GetPciInfoForEntity(pInt->entityIndex);

+

+	    err = pci_device_read_rom(rom_device, vbiosMem);

+	    if (err) {

+		xf86DrvMsg(screen,X_ERROR,"Cannot read V_BIOS (5) %s\n",

+			   strerror(err));

+		goto error1;

+	    }

+	} 

+    }

+

+    pInt->BIOSseg = V_BIOS >> 4;

+    pInt->num = 0xe6;

+    LockLegacyVGA(pInt, &vga);

+    xf86ExecX86int10(pInt);

+    UnlockLegacyVGA(pInt, &vga);

+#endif

+    free(options);

+    return pInt;

+

+ error1:

+    free(base);

+    UnmapVRam(pInt);

+    free(INTPriv(pInt)->alloc);

+    free(pInt->private);

+ error0:

+    free(pInt);

+    free(options);

+    

+    return NULL;

+}

+

+static void

+MapVRam(xf86Int10InfoPtr pInt)

+{

+    int pagesize = getpagesize();

+    int size = ((VRAM_SIZE + pagesize - 1) / pagesize) * pagesize;

+

+    INTPriv(pInt)->vRam = xf86MapDomainMemory(pInt->scrnIndex, VIDMEM_MMIO,

+					      pInt->dev, V_RAM, size);

+

+    pInt->ioBase = xf86Screens[pInt->scrnIndex]->domainIOBase;

+}

+

+static void

+UnmapVRam(xf86Int10InfoPtr pInt)

+{

+    int screen = pInt->scrnIndex;

+    int pagesize = getpagesize();

+    int size = ((VRAM_SIZE + pagesize - 1)/pagesize) * pagesize;

+

+    xf86UnMapVidMem(screen, INTPriv(pInt)->vRam, size);

+}

+

+Bool

+MapCurrentInt10(xf86Int10InfoPtr pInt)

+{

+    /* nothing to do here */

+    return TRUE;

+}

+

+void

+xf86FreeInt10(xf86Int10InfoPtr pInt)

+{

+    if (!pInt)

+      return;

+#if defined (_PC)

+    xf86Int10SaveRestoreBIOSVars(pInt, FALSE);

+#endif

+    if (Int10Current == pInt)

+	Int10Current = NULL;

+    free(INTPriv(pInt)->base);

+    UnmapVRam(pInt);

+    free(INTPriv(pInt)->alloc);

+    free(pInt->private);

+    free(pInt);

+}

+

+void *

+xf86Int10AllocPages(xf86Int10InfoPtr pInt, int num, int *off)

+{

+    int pagesize = getpagesize();

+    int num_pages = ALLOC_ENTRIES(pagesize);

+    int i,j;

+

+    for (i = 0; i < (num_pages - num); i++) {

+	if (INTPriv(pInt)->alloc[i] == 0) {

+	    for (j = i; j < (num + i); j++)

+		if (INTPriv(pInt)->alloc[j] != 0)

+		    break;

+	    if (j == (num + i))

+		break;

+	    i += num;

+	}

+    }

+    if (i == (num_pages - num))

+	return NULL;

+

+    for (j = i; j < (i + num); j++)

+	INTPriv(pInt)->alloc[j] = 1;

+

+    *off = (i + 1) * pagesize;

+

+    return (char *)INTPriv(pInt)->base + *off;

+}

+

+void

+xf86Int10FreePages(xf86Int10InfoPtr pInt, void *pbase, int num)

+{

+    int pagesize = getpagesize();

+    int first = (((char *)pbase - (char *)INTPriv(pInt)->base) / pagesize) - 1;

+    int i;

+

+    for (i = first; i < (first + num); i++)

+	INTPriv(pInt)->alloc[i] = 0;

+}

+

+#define OFF(addr) ((addr) & 0xffff)

+#if defined _PC

+# define HIGH_OFFSET (INTPriv(pInt)->highMemory)

+# define HIGH_BASE   V_BIOS

+#else

+# define HIGH_OFFSET SYS_BIOS

+# define HIGH_BASE   SYS_BIOS

+#endif

+# define SYS(addr) ((addr) >= HIGH_OFFSET)

+#define V_ADDR(addr) \

+	  (SYS(addr) ? ((char*)INTPriv(pInt)->sysMem) + (addr - HIGH_BASE) \

+	   : (((char*)(INTPriv(pInt)->base) + addr)))

+#define VRAM_ADDR(addr) (addr - V_RAM)

+#define VRAM_BASE (INTPriv(pInt)->vRam)

+

+#define VRAM(addr) ((addr >= V_RAM) && (addr < (V_RAM + VRAM_SIZE)))

+#define V_ADDR_RB(addr) \

+	(VRAM(addr)) ? MMIO_IN8((CARD8*)VRAM_BASE,VRAM_ADDR(addr)) \

+	   : *(CARD8*) V_ADDR(addr)

+#define V_ADDR_RW(addr) \

+	(VRAM(addr)) ? MMIO_IN16((CARD16*)VRAM_BASE,VRAM_ADDR(addr)) \

+	   : ldw_u((pointer)V_ADDR(addr))

+#define V_ADDR_RL(addr) \

+	(VRAM(addr)) ? MMIO_IN32((CARD32*)VRAM_BASE,VRAM_ADDR(addr)) \

+	   : ldl_u((pointer)V_ADDR(addr))

+

+#define V_ADDR_WB(addr,val) \

+	if(VRAM(addr)) \

+	    MMIO_OUT8((CARD8*)VRAM_BASE,VRAM_ADDR(addr),val); \

+	else \

+	    *(CARD8*) V_ADDR(addr) = val;

+#define V_ADDR_WW(addr,val) \

+	if(VRAM(addr)) \

+	    MMIO_OUT16((CARD16*)VRAM_BASE,VRAM_ADDR(addr),val); \

+	else \

+	    stw_u((val),(pointer)(V_ADDR(addr)));

+

+#define V_ADDR_WL(addr,val) \

+	if (VRAM(addr)) \

+	    MMIO_OUT32((CARD32*)VRAM_BASE,VRAM_ADDR(addr),val); \

+	else \

+	    stl_u(val,(pointer)(V_ADDR(addr)));

+

+static CARD8

+read_b(xf86Int10InfoPtr pInt, int addr)

+{

+    return V_ADDR_RB(addr);

+}

+

+static CARD16

+read_w(xf86Int10InfoPtr pInt, int addr)

+{

+#if X_BYTE_ORDER == X_LITTLE_ENDIAN

+    if (OFF(addr + 1) > 0)

+	return V_ADDR_RW(addr);

+#endif

+    return V_ADDR_RB(addr) | (V_ADDR_RB(addr + 1) << 8);

+}

+

+static CARD32

+read_l(xf86Int10InfoPtr pInt, int addr)

+{

+#if X_BYTE_ORDER == X_LITTLE_ENDIAN

+    if (OFF(addr + 3) > 2)

+	return V_ADDR_RL(addr);

+#endif

+    return V_ADDR_RB(addr) |

+	   (V_ADDR_RB(addr + 1) << 8) |

+	   (V_ADDR_RB(addr + 2) << 16) |

+	   (V_ADDR_RB(addr + 3) << 24);

+}

+

+static void

+write_b(xf86Int10InfoPtr pInt, int addr, CARD8 val)

+{

+    V_ADDR_WB(addr,val);

+}

+

+static void

+write_w(xf86Int10InfoPtr pInt, int addr, CARD16 val)

+{

+#if X_BYTE_ORDER == X_LITTLE_ENDIAN

+    if (OFF(addr + 1) > 0)

+      { V_ADDR_WW(addr, val); }

+#endif

+    V_ADDR_WB(addr, val);

+    V_ADDR_WB(addr + 1, val >> 8);

+}

+

+static void

+write_l(xf86Int10InfoPtr pInt, int addr, CARD32 val)

+{

+#if X_BYTE_ORDER == X_LITTLE_ENDIAN

+    if (OFF(addr + 3) > 2)

+      { V_ADDR_WL(addr, val); }

+#endif

+    V_ADDR_WB(addr, val);

+    V_ADDR_WB(addr + 1, val >> 8);

+    V_ADDR_WB(addr + 2, val >> 16);

+    V_ADDR_WB(addr + 3, val >> 24);

+}

+

+pointer

+xf86int10Addr(xf86Int10InfoPtr pInt, CARD32 addr)

+{

+    return V_ADDR(addr);

+}

diff --git a/xorg-server/hw/xfree86/int10/helper_exec.c b/xorg-server/hw/xfree86/int10/helper_exec.c
index 6ba647f89..5b6253646 100644
--- a/xorg-server/hw/xfree86/int10/helper_exec.c
+++ b/xorg-server/hw/xfree86/int10/helper_exec.c
@@ -1,727 +1,727 @@
-/*
- *                   XFree86 int10 module
- *   execute BIOS int 10h calls in x86 real mode environment
- *                 Copyright 1999 Egbert Eich
- *
- *   Part of this code was inspired  by the VBIOS POSTing code in DOSEMU
- *   developed by the "DOSEMU-Development-Team"
- */
-
-/*
- * To debug port accesses define PRINT_PORT to 1.
- * Note! You also have to comment out ioperm()
- * in xf86EnableIO(). Otherwise we won't trap
- * on PIO.
- */
-
-#ifdef HAVE_XORG_CONFIG_H
-#include <xorg-config.h>
-#endif
-
-#define PRINT_PORT 0
-
-#include <unistd.h>
-
-#include <X11/Xos.h>
-#include "xf86.h"
-#include "xf86_OSproc.h"
-#include "compiler.h"
-#define _INT10_PRIVATE
-#include "int10Defines.h"
-#include "xf86int10.h"
-#include "Pci.h"
-#ifdef _X86EMU
-#include "x86emu/x86emui.h"
-#else
-#define DEBUG_IO_TRACE() 0
-#endif
-#include <pciaccess.h>
-
-static int pciCfg1in(CARD16 addr, CARD32 *val);
-static int pciCfg1out(CARD16 addr, CARD32 val);
-static int pciCfg1inw(CARD16 addr, CARD16 *val);
-static int pciCfg1outw(CARD16 addr, CARD16 val);
-static int pciCfg1inb(CARD16 addr, CARD8 *val);
-static int pciCfg1outb(CARD16 addr, CARD8 val);
-#if defined (_PC)
-static void SetResetBIOSVars(xf86Int10InfoPtr pInt, Bool set);
-#endif
-
-#define REG pInt
-
-int
-setup_int(xf86Int10InfoPtr pInt)
-{
-    if (pInt != Int10Current) {
-	if (!MapCurrentInt10(pInt))
-	    return -1;
-	Int10Current = pInt;
-    }
-    X86_EAX = (CARD32) pInt->ax;
-    X86_EBX = (CARD32) pInt->bx;
-    X86_ECX = (CARD32) pInt->cx;
-    X86_EDX = (CARD32) pInt->dx;
-    X86_ESI = (CARD32) pInt->si;
-    X86_EDI = (CARD32) pInt->di;
-    X86_EBP = (CARD32) pInt->bp;
-    X86_ESP = 0x1000; X86_SS = pInt->stackseg >> 4;
-    X86_EIP = 0x0600; X86_CS = 0x0;	/* address of 'hlt' */
-    X86_DS = 0x40;			/* standard pc ds */
-    X86_ES = pInt->es;
-    X86_FS = 0;
-    X86_GS = 0;
-    X86_EFLAGS = X86_IF_MASK | X86_IOPL_MASK;
-#if defined (_PC)
-    if (pInt->Flags & SET_BIOS_SCRATCH)
-	SetResetBIOSVars(pInt, TRUE);
-#endif
-    return xf86BlockSIGIO();
-}
-
-void
-finish_int(xf86Int10InfoPtr pInt, int sig)
-{
-    xf86UnblockSIGIO(sig);
-    pInt->ax = (CARD32) X86_EAX;
-    pInt->bx = (CARD32) X86_EBX;
-    pInt->cx = (CARD32) X86_ECX;
-    pInt->dx = (CARD32) X86_EDX;
-    pInt->si = (CARD32) X86_ESI;
-    pInt->di = (CARD32) X86_EDI;
-    pInt->es = (CARD16) X86_ES;
-    pInt->bp = (CARD32) X86_EBP;
-    pInt->flags = (CARD32) X86_FLAGS;
-#if defined (_PC)
-    if (pInt->Flags & RESTORE_BIOS_SCRATCH)
-	SetResetBIOSVars(pInt, FALSE);
-#endif
-}
-
-/* general software interrupt handler */
-CARD32
-getIntVect(xf86Int10InfoPtr pInt,int num)
-{
-    return MEM_RW(pInt, num << 2) + (MEM_RW(pInt, (num << 2) + 2) << 4);
-}
-
-void
-pushw(xf86Int10InfoPtr pInt, CARD16 val)
-{
-    X86_ESP -= 2;
-    MEM_WW(pInt, ((CARD32) X86_SS << 4) + X86_SP, val);
-}
-
-int
-run_bios_int(int num, xf86Int10InfoPtr pInt)
-{
-    CARD32 eflags;
-#ifndef _PC
-    /* check if bios vector is initialized */
-    if (MEM_RW(pInt, (num << 2) + 2) == (SYS_BIOS >> 4)) { /* SYS_BIOS_SEG ?*/
-
-	if (num == 21 && X86_AH == 0x4e) {
- 	    xf86DrvMsg(pInt->scrnIndex, X_NOTICE,
-		       "Failing Find-Matching-File on non-PC"
-			" (int 21, func 4e)\n");
- 	    X86_AX = 2;
- 	    SET_FLAG(F_CF);
- 	    return 1;
- 	} else {
-	    xf86DrvMsgVerb(pInt->scrnIndex, X_NOT_IMPLEMENTED, 2,
-			   "Ignoring int 0x%02x call\n", num);
-	    if (xf86GetVerbosity() > 3) {
-		dump_registers(pInt);
-		stack_trace(pInt);
-	    }
-	    return 1;
-	}
-    }
-#endif
-#ifdef PRINT_INT
-    ErrorF("calling card BIOS at: ");
-#endif
-    eflags = X86_EFLAGS;
-#if 0
-    eflags = eflags | IF_MASK;
-    X86_EFLAGS = X86_EFLAGS  & ~(VIF_MASK | TF_MASK | IF_MASK | NT_MASK);
-#endif
-    pushw(pInt, eflags);
-    pushw(pInt, X86_CS);
-    pushw(pInt, X86_IP);
-    X86_CS = MEM_RW(pInt, (num << 2) + 2);
-    X86_IP = MEM_RW(pInt,  num << 2);
-#ifdef PRINT_INT
-    ErrorF("0x%x:%lx\n", X86_CS, X86_EIP);
-#endif
-    return 1;
-}
-
-/* Debugging stuff */
-void
-dump_code(xf86Int10InfoPtr pInt)
-{
-    int i;
-    unsigned long lina = SEG_ADR((CARD32), X86_CS, IP);
-
-    xf86DrvMsgVerb(pInt->scrnIndex, X_INFO, 3, "code at 0x%8.8lx:\n", lina);
-    for (i=0; i<0x10; i++)
-	xf86ErrorFVerb(3, " %2.2x", MEM_RB(pInt, lina + i));
-    xf86ErrorFVerb(3, "\n");
-    for (; i<0x20; i++)
-	xf86ErrorFVerb(3, " %2.2x", MEM_RB(pInt, lina + i));
-    xf86ErrorFVerb(3, "\n");
-}
-
-void
-dump_registers(xf86Int10InfoPtr pInt)
-{
-    xf86DrvMsgVerb(pInt->scrnIndex, X_INFO, 3,
-	"EAX=0x%8.8lx, EBX=0x%8.8lx, ECX=0x%8.8lx, EDX=0x%8.8lx\n",
-	(unsigned long)X86_EAX, (unsigned long)X86_EBX,
-	(unsigned long)X86_ECX, (unsigned long)X86_EDX);
-    xf86DrvMsgVerb(pInt->scrnIndex, X_INFO, 3,
-	"ESP=0x%8.8lx, EBP=0x%8.8lx, ESI=0x%8.8lx, EDI=0x%8.8lx\n",
-	(unsigned long)X86_ESP, (unsigned long)X86_EBP,
-	(unsigned long)X86_ESI, (unsigned long)X86_EDI);
-    xf86DrvMsgVerb(pInt->scrnIndex, X_INFO, 3,
-	"CS=0x%4.4x, SS=0x%4.4x,"
-	" DS=0x%4.4x, ES=0x%4.4x, FS=0x%4.4x, GS=0x%4.4x\n",
-	X86_CS, X86_SS, X86_DS, X86_ES, X86_FS, X86_GS);
-    xf86DrvMsgVerb(pInt->scrnIndex, X_INFO, 3,
-	"EIP=0x%8.8lx, EFLAGS=0x%8.8lx\n",
-	(unsigned long)X86_EIP, (unsigned long)X86_EFLAGS);
-}
-
-void
-stack_trace(xf86Int10InfoPtr pInt)
-{
-    int i = 0;
-    unsigned long stack = SEG_ADR((CARD32), X86_SS, SP);
-    unsigned long tail  = (CARD32)((X86_SS << 4) + 0x1000);
-
-    if (stack >= tail) return;
-
-    xf86MsgVerb(X_INFO, 3, "stack at 0x%8.8lx:\n", stack);
-    for (; stack < tail; stack++) {
-	xf86ErrorFVerb(3, " %2.2x", MEM_RB(pInt, stack));
-	i = (i + 1) % 0x10;
-	if (!i)
-	    xf86ErrorFVerb(3, "\n");
-    }
-    if (i)
-	xf86ErrorFVerb(3, "\n");
-}
-
-int
-port_rep_inb(xf86Int10InfoPtr pInt,
-	     CARD16 port, CARD32 base, int d_f, CARD32 count)
-{
-    register int inc = d_f ? -1 : 1;
-    CARD32 dst = base;
-    if (PRINT_PORT && DEBUG_IO_TRACE())
-	ErrorF(" rep_insb(%#x) %ld bytes at %8.8lx %s\n",
-		port, count, base, d_f ? "up" : "down");
-    while (count--) {
-	MEM_WB(pInt, dst, x_inb(port));
-	dst += inc;
-    }
-    return dst - base;
-}
-
-int
-port_rep_inw(xf86Int10InfoPtr pInt,
-	     CARD16 port, CARD32 base, int d_f, CARD32 count)
-{
-    register int inc = d_f ? -2 : 2;
-    CARD32 dst = base;
-    if (PRINT_PORT && DEBUG_IO_TRACE())
-	ErrorF(" rep_insw(%#x) %ld bytes at %8.8lx %s\n",
-	     port, count, base, d_f ? "up" : "down");
-    while (count--) {
-	MEM_WW(pInt, dst, x_inw(port));
-	dst += inc;
-    }
-    return dst - base;
-}
-
-int
-port_rep_inl(xf86Int10InfoPtr pInt,
-	     CARD16 port, CARD32 base, int d_f, CARD32 count)
-{
-    register int inc = d_f ? -4 : 4;
-    CARD32 dst = base;
-    if (PRINT_PORT && DEBUG_IO_TRACE())
-	ErrorF(" rep_insl(%#x) %ld bytes at %8.8lx %s\n",
-	     port, count, base, d_f ? "up" : "down");
-    while (count--) {
-	MEM_WL(pInt, dst, x_inl(port));
-	dst += inc;
-    }
-    return dst - base;
-}
-
-int
-port_rep_outb(xf86Int10InfoPtr pInt,
-	      CARD16 port, CARD32 base, int d_f, CARD32 count)
-{
-    register int inc = d_f ? -1 : 1;
-    CARD32 dst = base;
-    if (PRINT_PORT && DEBUG_IO_TRACE())
-	ErrorF(" rep_outb(%#x) %ld bytes at %8.8lx %s\n",
-	     port, count, base, d_f ? "up" : "down");
-    while (count--) {
-	x_outb(port, MEM_RB(pInt, dst));
-	dst += inc;
-    }
-    return dst - base;
-}
-
-int
-port_rep_outw(xf86Int10InfoPtr pInt,
-	      CARD16 port, CARD32 base, int d_f, CARD32 count)
-{
-    register int inc = d_f ? -2 : 2;
-    CARD32 dst = base;
-    if (PRINT_PORT && DEBUG_IO_TRACE())
-	ErrorF(" rep_outw(%#x) %ld bytes at %8.8lx %s\n",
-	     port, count, base, d_f ? "up" : "down");
-    while (count--) {
-	x_outw(port, MEM_RW(pInt, dst));
-	dst += inc;
-    }
-    return dst - base;
-}
-
-int
-port_rep_outl(xf86Int10InfoPtr pInt,
-	      CARD16 port, CARD32 base, int d_f, CARD32 count)
-{
-    register int inc = d_f ? -4 : 4;
-    CARD32 dst = base;
-    if (PRINT_PORT && DEBUG_IO_TRACE())
-	ErrorF(" rep_outl(%#x) %ld bytes at %8.8lx %s\n",
-	     port, count, base, d_f ? "up" : "down");
-    while (count--) {
-	x_outl(port, MEM_RL(pInt, dst));
-	dst += inc;
-    }
-    return dst - base;
-}
-
-CARD8
-x_inb(CARD16 port)
-{
-    CARD8 val;
-
-    if (port == 0x40) {
-	Int10Current->inb40time++;
-	val = (CARD8)(Int10Current->inb40time >>
-		      ((Int10Current->inb40time & 1) << 3));
-	if (PRINT_PORT && DEBUG_IO_TRACE())
-	    ErrorF(" inb(%#x) = %2.2x\n", port, val);
-#ifdef __NOT_YET__
-    } else if (port < 0x0100) {		/* Don't interfere with mainboard */
-	val = 0;
-	xf86DrvMsgVerb(Int10Current->scrnIndex, X_NOT_IMPLEMENTED, 2,
-	    "inb 0x%4.4x\n", port);
-	if (xf86GetVerbosity() > 3) {
-	    dump_registers(Int10Current);
-	    stack_trace(Int10Current);
-	}
-#endif /* __NOT_YET__ */
-    } else if (!pciCfg1inb(port, &val)) {
-	val = inb(Int10Current->ioBase + port);
-	if (PRINT_PORT && DEBUG_IO_TRACE())
-	    ErrorF(" inb(%#x) = %2.2x\n", port, val);
-    }
-    return val;
-}
-
-CARD16
-x_inw(CARD16 port)
-{
-    CARD16 val;
-
-    if (port == 0x5c) {
-	struct timeval tv;
-
-	/*
-	 * Emulate a PC98's timer.  Typical resolution is 3.26 usec.
-	 * Approximate this by dividing by 3.
-	 */
-	X_GETTIMEOFDAY(&tv);
-	val = (CARD16)(tv.tv_usec / 3);
-    } else if (!pciCfg1inw(port, &val)) {
-	val = inw(Int10Current->ioBase + port);
-	if (PRINT_PORT && DEBUG_IO_TRACE())
-	    ErrorF(" inw(%#x) = %4.4x\n", port, val);
-    }
-    return val;
-}
-
-void
-x_outb(CARD16 port, CARD8 val)
-{
-    if ((port == 0x43) && (val == 0)) {
-	struct timeval tv;
-	/*
-	 * Emulate a PC's timer 0.  Such timers typically have a resolution of
-	 * some .838 usec per tick, but this can only provide 1 usec per tick.
-	 * (Not that this matters much, given inherent emulation delays.)  Use
-	 * the bottom bit as a byte select.  See inb(0x40) above.
-	 */
-	X_GETTIMEOFDAY(&tv);
-	Int10Current->inb40time = (CARD16)(tv.tv_usec | 1);
-	if (PRINT_PORT && DEBUG_IO_TRACE())
-	    ErrorF(" outb(%#x, %2.2x)\n", port, val);
-#ifdef __NOT_YET__
-    } else if (port < 0x0100) {		/* Don't interfere with mainboard */
-	xf86DrvMsgVerb(Int10Current->scrnIndex, X_NOT_IMPLEMENTED, 2,
-	    "outb 0x%4.4x,0x%2.2x\n", port, val);
-	if (xf86GetVerbosity() > 3) {
-	    dump_registers(Int10Current);
-	    stack_trace(Int10Current);
-	}
-#endif /* __NOT_YET__ */
-    } else if (!pciCfg1outb(port, val)) {
-	if (PRINT_PORT && DEBUG_IO_TRACE())
-	    ErrorF(" outb(%#x, %2.2x)\n", port, val);
-	outb(Int10Current->ioBase + port, val);
-    }
-}
-
-void
-x_outw(CARD16 port, CARD16 val)
-{
-
-    if (!pciCfg1outw(port, val)) {
-	if (PRINT_PORT && DEBUG_IO_TRACE())
-	    ErrorF(" outw(%#x, %4.4x)\n", port, val);
-	outw(Int10Current->ioBase + port, val);
-    }
-}
-
-CARD32
-x_inl(CARD16 port)
-{
-    CARD32 val;
-
-    if (!pciCfg1in(port, &val)) {
-	val = inl(Int10Current->ioBase + port);
-	if (PRINT_PORT && DEBUG_IO_TRACE())
-	    ErrorF(" inl(%#x) = %8.8lx\n", port, val);
-    }
-    return val;
-}
-
-void
-x_outl(CARD16 port, CARD32 val)
-{
-    if (!pciCfg1out(port, val)) {
-	if (PRINT_PORT && DEBUG_IO_TRACE())
-	    ErrorF(" outl(%#x, %8.8lx)\n", port, val);
-	outl(Int10Current->ioBase + port, val);
-    }
-}
-
-CARD8
-Mem_rb(CARD32 addr)
-{
-    return (*Int10Current->mem->rb)(Int10Current, addr);
-}
-
-CARD16
-Mem_rw(CARD32 addr)
-{
-    return (*Int10Current->mem->rw)(Int10Current, addr);
-}
-
-CARD32
-Mem_rl(CARD32 addr)
-{
-    return (*Int10Current->mem->rl)(Int10Current, addr);
-}
-
-void
-Mem_wb(CARD32 addr, CARD8 val)
-{
-    (*Int10Current->mem->wb)(Int10Current, addr, val);
-}
-
-void
-Mem_ww(CARD32 addr, CARD16 val)
-{
-    (*Int10Current->mem->ww)(Int10Current, addr, val);
-}
-
-void
-Mem_wl(CARD32 addr, CARD32 val)
-{
-    (*Int10Current->mem->wl)(Int10Current, addr, val);
-}
-
-static CARD32 PciCfg1Addr = 0;
-
-#define PCI_OFFSET(x) ((x) & 0x000000ff)
-#define PCI_TAG(x)    ((x) & 0x7fffff00)
-
-static struct pci_device*
-pci_device_for_cfg_address (CARD32 addr)
-{
-	struct pci_device *dev = NULL;
-	PCITAG tag = PCI_TAG(addr);
-	struct pci_slot_match slot_match = {
-		.domain = PCI_DOM_FROM_TAG(tag),
-		.bus = PCI_BUS_NO_DOMAIN(PCI_BUS_FROM_TAG(tag)),
-		.dev = PCI_DEV_FROM_TAG(tag),
-		.func = PCI_FUNC_FROM_TAG(tag),
-		.match_data = 0
-	};
-
-	struct pci_device_iterator *iter =
-	    pci_slot_match_iterator_create (&slot_match);
-
-	if (iter)
-		dev = pci_device_next(iter);
-
-	pci_iterator_destroy(iter);
-
-	return dev;
-}
-
-static int
-pciCfg1in(CARD16 addr, CARD32 *val)
-{
-    if (addr == 0xCF8) {
-	*val = PciCfg1Addr;
-	return 1;
-    }
-    if (addr == 0xCFC) {
-	pci_device_cfg_read_u32(pci_device_for_cfg_address(PciCfg1Addr),
-			val, PCI_OFFSET(PciCfg1Addr));
-	if (PRINT_PORT && DEBUG_IO_TRACE())
-	    ErrorF(" cfg_inl(%#lx) = %8.8lx\n", PciCfg1Addr, *val);
-	return 1;
-    }
-    return 0;
-}
-
-static int
-pciCfg1out(CARD16 addr, CARD32 val)
-{
-    if (addr == 0xCF8) {
-	PciCfg1Addr = val;
-	return 1;
-    }
-    if (addr == 0xCFC) {
-	if (PRINT_PORT && DEBUG_IO_TRACE())
-	    ErrorF(" cfg_outl(%#lx, %8.8lx)\n", PciCfg1Addr, val);
-	pci_device_cfg_write_u32(pci_device_for_cfg_address(PciCfg1Addr),
-			val, PCI_OFFSET(PciCfg1Addr));
-	return 1;
-    }
-    return 0;
-}
-
-static int
-pciCfg1inw(CARD16 addr, CARD16 *val)
-{
-    int shift;
-
-    if ((addr >= 0xCF8) && (addr <= 0xCFB)) {
-	shift = (addr - 0xCF8) * 8;
-	*val = (PciCfg1Addr >> shift) & 0xffff;
-	return 1;
-    }
-    if ((addr >= 0xCFC) && (addr <= 0xCFF)) {
-	const unsigned offset = addr - 0xCFC;
-
-	pci_device_cfg_read_u16(pci_device_for_cfg_address(PciCfg1Addr),
-			val, PCI_OFFSET(PciCfg1Addr) + offset);
-	if (PRINT_PORT && DEBUG_IO_TRACE())
-	    ErrorF(" cfg_inw(%#lx) = %4.4x\n", PciCfg1Addr + offset, *val);
-	return 1;
-    }
-    return 0;
-}
-
-static int
-pciCfg1outw(CARD16 addr, CARD16 val)
-{
-    int shift;
-
-    if ((addr >= 0xCF8) && (addr <= 0xCFB)) {
-	shift = (addr - 0xCF8) * 8;
-	PciCfg1Addr &= ~(0xffff << shift);
-	PciCfg1Addr |= ((CARD32) val) << shift;
-	return 1;
-    }
-    if ((addr >= 0xCFC) && (addr <= 0xCFF)) {
-	const unsigned offset = addr - 0xCFC;
-
-	if (PRINT_PORT && DEBUG_IO_TRACE())
-	    ErrorF(" cfg_outw(%#lx, %4.4x)\n", PciCfg1Addr + offset, val);
-	pci_device_cfg_write_u16(pci_device_for_cfg_address(PciCfg1Addr),
-			val, PCI_OFFSET(PciCfg1Addr) + offset);
-	return 1;
-    }
-    return 0;
-}
-
-static int
-pciCfg1inb(CARD16 addr, CARD8 *val)
-{
-    int shift;
-
-    if ((addr >= 0xCF8) && (addr <= 0xCFB)) {
-	shift = (addr - 0xCF8) * 8;
-	*val = (PciCfg1Addr >> shift) & 0xff;
-	return 1;
-    }
-    if ((addr >= 0xCFC) && (addr <= 0xCFF)) {
-	const unsigned offset = addr - 0xCFC;
-
-	pci_device_cfg_read_u8(pci_device_for_cfg_address(PciCfg1Addr),
-			val, PCI_OFFSET(PciCfg1Addr) + offset);
-	if (PRINT_PORT && DEBUG_IO_TRACE())
-	    ErrorF(" cfg_inb(%#lx) = %2.2x\n", PciCfg1Addr + offset, *val);
-	return 1;
-    }
-    return 0;
-}
-
-static int
-pciCfg1outb(CARD16 addr, CARD8 val)
-{
-    int shift;
-
-    if ((addr >= 0xCF8) && (addr <= 0xCFB)) {
-	shift = (addr - 0xCF8) * 8;
-	PciCfg1Addr &= ~(0xff << shift);
-	PciCfg1Addr |= ((CARD32) val) << shift;
-	return 1;
-    }
-    if ((addr >= 0xCFC) && (addr <= 0xCFF)) {
-	const unsigned offset = addr - 0xCFC;
-
-	if (PRINT_PORT && DEBUG_IO_TRACE())
-	    ErrorF(" cfg_outb(%#lx, %2.2x)\n", PciCfg1Addr + offset, val);
-	pci_device_cfg_write_u8(pci_device_for_cfg_address(PciCfg1Addr),
-			val, PCI_OFFSET(PciCfg1Addr) + offset);
-	return 1;
-    }
-    return 0;
-}
-
-CARD8
-bios_checksum(const CARD8 *start, int size)
-{
-    CARD8 sum = 0;
-
-    while (size-- > 0)
-	sum += *start++;
-    return sum;
-}
-
-/*
- * Lock/Unlock legacy VGA. Some Bioses try to be very clever and make
- * an attempt to detect a legacy ISA card. If they find one they might
- * act very strange: for example they might configure the card as a
- * monochrome card. This might cause some drivers to choke.
- * To avoid this we attempt legacy VGA by writing to all know VGA
- * disable registers before we call the BIOS initialization and
- * restore the original values afterwards. In beween we hold our
- * breath. To get to a (possibly exising) ISA card need to disable
- * our current PCI card.
- */
-/*
- * This is just for booting: we just want to catch pure
- * legacy vga therefore we don't worry about mmio etc.
- * This stuff should really go into vgaHW.c. However then
- * the driver would have to load the vga-module prior to
- * doing int10.
- */
-void
-LockLegacyVGA(xf86Int10InfoPtr pInt, legacyVGAPtr vga)
-{
-    vga->save_msr    = inb(pInt->ioBase + 0x03CC);
-    vga->save_vse    = inb(pInt->ioBase + 0x03C3);
-#ifndef __ia64__
-    vga->save_46e8   = inb(pInt->ioBase + 0x46E8);
-#endif
-    vga->save_pos102 = inb(pInt->ioBase + 0x0102);
-    outb(pInt->ioBase + 0x03C2, ~(CARD8)0x03 & vga->save_msr);
-    outb(pInt->ioBase + 0x03C3, ~(CARD8)0x01 & vga->save_vse);
-#ifndef __ia64__
-    outb(pInt->ioBase + 0x46E8, ~(CARD8)0x08 & vga->save_46e8);
-#endif
-    outb(pInt->ioBase + 0x0102, ~(CARD8)0x01 & vga->save_pos102);
-}
-
-void
-UnlockLegacyVGA(xf86Int10InfoPtr pInt, legacyVGAPtr vga)
-{
-    outb(pInt->ioBase + 0x0102, vga->save_pos102);
-#ifndef __ia64__
-    outb(pInt->ioBase + 0x46E8, vga->save_46e8);
-#endif
-    outb(pInt->ioBase + 0x03C3, vga->save_vse);
-    outb(pInt->ioBase + 0x03C2, vga->save_msr);
-}
-
-#if defined (_PC)
-static void
-SetResetBIOSVars(xf86Int10InfoPtr pInt, Bool set)
-{
-    int pagesize = getpagesize();
-    unsigned char* base = xf86MapVidMem(pInt->scrnIndex,
-					VIDMEM_MMIO, 0, pagesize);
-    int i;
-
-    if (set) {
-	for (i = BIOS_SCRATCH_OFF; i < BIOS_SCRATCH_END; i++)
-	    MEM_WW(pInt, i, *(base + i));
-    } else {
-	for (i = BIOS_SCRATCH_OFF; i < BIOS_SCRATCH_END; i++)
-	    *(base + i) = MEM_RW(pInt, i);
-    }
-    
-    xf86UnMapVidMem(pInt->scrnIndex,base,pagesize);
-}
-
-void
-xf86Int10SaveRestoreBIOSVars(xf86Int10InfoPtr pInt, Bool save)
-{
-    int pagesize = getpagesize();
-    unsigned char* base;
-    int i;
-
-    if (!xf86IsEntityPrimary(pInt->entityIndex)
-	|| (!save && !pInt->BIOSScratch))
-	return;
-    
-    base = xf86MapVidMem(pInt->scrnIndex, VIDMEM_MMIO, 0, pagesize);
-    base += BIOS_SCRATCH_OFF;
-    if (save) {
-	if ((pInt->BIOSScratch
-	     = xnfalloc(BIOS_SCRATCH_LEN)))
-	    for (i = 0; i < BIOS_SCRATCH_LEN; i++)
-		*(((char*)pInt->BIOSScratch + i)) = *(base + i);	
-    } else {
-	if (pInt->BIOSScratch) {
-	    for (i = 0; i < BIOS_SCRATCH_LEN; i++)
-		*(base + i) = *(pInt->BIOSScratch + i); 
-	    xfree(pInt->BIOSScratch);
-	    pInt->BIOSScratch = NULL;
-	}
-    }
-    
-    xf86UnMapVidMem(pInt->scrnIndex,base - BIOS_SCRATCH_OFF ,pagesize);
-}
-#endif
-
-xf86Int10InfoPtr
-xf86InitInt10(int entityIndex)
-{
-    return xf86ExtendedInitInt10(entityIndex, 0);
-}
+/*

+ *                   XFree86 int10 module

+ *   execute BIOS int 10h calls in x86 real mode environment

+ *                 Copyright 1999 Egbert Eich

+ *

+ *   Part of this code was inspired  by the VBIOS POSTing code in DOSEMU

+ *   developed by the "DOSEMU-Development-Team"

+ */

+

+/*

+ * To debug port accesses define PRINT_PORT to 1.

+ * Note! You also have to comment out ioperm()

+ * in xf86EnableIO(). Otherwise we won't trap

+ * on PIO.

+ */

+

+#ifdef HAVE_XORG_CONFIG_H

+#include <xorg-config.h>

+#endif

+

+#define PRINT_PORT 0

+

+#include <unistd.h>

+

+#include <X11/Xos.h>

+#include "xf86.h"

+#include "xf86_OSproc.h"

+#include "compiler.h"

+#define _INT10_PRIVATE

+#include "int10Defines.h"

+#include "xf86int10.h"

+#include "Pci.h"

+#ifdef _X86EMU

+#include "x86emu/x86emui.h"

+#else

+#define DEBUG_IO_TRACE() 0

+#endif

+#include <pciaccess.h>

+

+static int pciCfg1in(CARD16 addr, CARD32 *val);

+static int pciCfg1out(CARD16 addr, CARD32 val);

+static int pciCfg1inw(CARD16 addr, CARD16 *val);

+static int pciCfg1outw(CARD16 addr, CARD16 val);

+static int pciCfg1inb(CARD16 addr, CARD8 *val);

+static int pciCfg1outb(CARD16 addr, CARD8 val);

+#if defined (_PC)

+static void SetResetBIOSVars(xf86Int10InfoPtr pInt, Bool set);

+#endif

+

+#define REG pInt

+

+int

+setup_int(xf86Int10InfoPtr pInt)

+{

+    if (pInt != Int10Current) {

+	if (!MapCurrentInt10(pInt))

+	    return -1;

+	Int10Current = pInt;

+    }

+    X86_EAX = (CARD32) pInt->ax;

+    X86_EBX = (CARD32) pInt->bx;

+    X86_ECX = (CARD32) pInt->cx;

+    X86_EDX = (CARD32) pInt->dx;

+    X86_ESI = (CARD32) pInt->si;

+    X86_EDI = (CARD32) pInt->di;

+    X86_EBP = (CARD32) pInt->bp;

+    X86_ESP = 0x1000; X86_SS = pInt->stackseg >> 4;

+    X86_EIP = 0x0600; X86_CS = 0x0;	/* address of 'hlt' */

+    X86_DS = 0x40;			/* standard pc ds */

+    X86_ES = pInt->es;

+    X86_FS = 0;

+    X86_GS = 0;

+    X86_EFLAGS = X86_IF_MASK | X86_IOPL_MASK;

+#if defined (_PC)

+    if (pInt->Flags & SET_BIOS_SCRATCH)

+	SetResetBIOSVars(pInt, TRUE);

+#endif

+    return xf86BlockSIGIO();

+}

+

+void

+finish_int(xf86Int10InfoPtr pInt, int sig)

+{

+    xf86UnblockSIGIO(sig);

+    pInt->ax = (CARD32) X86_EAX;

+    pInt->bx = (CARD32) X86_EBX;

+    pInt->cx = (CARD32) X86_ECX;

+    pInt->dx = (CARD32) X86_EDX;

+    pInt->si = (CARD32) X86_ESI;

+    pInt->di = (CARD32) X86_EDI;

+    pInt->es = (CARD16) X86_ES;

+    pInt->bp = (CARD32) X86_EBP;

+    pInt->flags = (CARD32) X86_FLAGS;

+#if defined (_PC)

+    if (pInt->Flags & RESTORE_BIOS_SCRATCH)

+	SetResetBIOSVars(pInt, FALSE);

+#endif

+}

+

+/* general software interrupt handler */

+CARD32

+getIntVect(xf86Int10InfoPtr pInt,int num)

+{

+    return MEM_RW(pInt, num << 2) + (MEM_RW(pInt, (num << 2) + 2) << 4);

+}

+

+void

+pushw(xf86Int10InfoPtr pInt, CARD16 val)

+{

+    X86_ESP -= 2;

+    MEM_WW(pInt, ((CARD32) X86_SS << 4) + X86_SP, val);

+}

+

+int

+run_bios_int(int num, xf86Int10InfoPtr pInt)

+{

+    CARD32 eflags;

+#ifndef _PC

+    /* check if bios vector is initialized */

+    if (MEM_RW(pInt, (num << 2) + 2) == (SYS_BIOS >> 4)) { /* SYS_BIOS_SEG ?*/

+

+	if (num == 21 && X86_AH == 0x4e) {

+ 	    xf86DrvMsg(pInt->scrnIndex, X_NOTICE,

+		       "Failing Find-Matching-File on non-PC"

+			" (int 21, func 4e)\n");

+ 	    X86_AX = 2;

+ 	    SET_FLAG(F_CF);

+ 	    return 1;

+ 	} else {

+	    xf86DrvMsgVerb(pInt->scrnIndex, X_NOT_IMPLEMENTED, 2,

+			   "Ignoring int 0x%02x call\n", num);

+	    if (xf86GetVerbosity() > 3) {

+		dump_registers(pInt);

+		stack_trace(pInt);

+	    }

+	    return 1;

+	}

+    }

+#endif

+#ifdef PRINT_INT

+    ErrorF("calling card BIOS at: ");

+#endif

+    eflags = X86_EFLAGS;

+#if 0

+    eflags = eflags | IF_MASK;

+    X86_EFLAGS = X86_EFLAGS  & ~(VIF_MASK | TF_MASK | IF_MASK | NT_MASK);

+#endif

+    pushw(pInt, eflags);

+    pushw(pInt, X86_CS);

+    pushw(pInt, X86_IP);

+    X86_CS = MEM_RW(pInt, (num << 2) + 2);

+    X86_IP = MEM_RW(pInt,  num << 2);

+#ifdef PRINT_INT

+    ErrorF("0x%x:%lx\n", X86_CS, X86_EIP);

+#endif

+    return 1;

+}

+

+/* Debugging stuff */

+void

+dump_code(xf86Int10InfoPtr pInt)

+{

+    int i;

+    unsigned long lina = SEG_ADR((CARD32), X86_CS, IP);

+

+    xf86DrvMsgVerb(pInt->scrnIndex, X_INFO, 3, "code at 0x%8.8lx:\n", lina);

+    for (i=0; i<0x10; i++)

+	xf86ErrorFVerb(3, " %2.2x", MEM_RB(pInt, lina + i));

+    xf86ErrorFVerb(3, "\n");

+    for (; i<0x20; i++)

+	xf86ErrorFVerb(3, " %2.2x", MEM_RB(pInt, lina + i));

+    xf86ErrorFVerb(3, "\n");

+}

+

+void

+dump_registers(xf86Int10InfoPtr pInt)

+{

+    xf86DrvMsgVerb(pInt->scrnIndex, X_INFO, 3,

+	"EAX=0x%8.8lx, EBX=0x%8.8lx, ECX=0x%8.8lx, EDX=0x%8.8lx\n",

+	(unsigned long)X86_EAX, (unsigned long)X86_EBX,

+	(unsigned long)X86_ECX, (unsigned long)X86_EDX);

+    xf86DrvMsgVerb(pInt->scrnIndex, X_INFO, 3,

+	"ESP=0x%8.8lx, EBP=0x%8.8lx, ESI=0x%8.8lx, EDI=0x%8.8lx\n",

+	(unsigned long)X86_ESP, (unsigned long)X86_EBP,

+	(unsigned long)X86_ESI, (unsigned long)X86_EDI);

+    xf86DrvMsgVerb(pInt->scrnIndex, X_INFO, 3,

+	"CS=0x%4.4x, SS=0x%4.4x,"

+	" DS=0x%4.4x, ES=0x%4.4x, FS=0x%4.4x, GS=0x%4.4x\n",

+	X86_CS, X86_SS, X86_DS, X86_ES, X86_FS, X86_GS);

+    xf86DrvMsgVerb(pInt->scrnIndex, X_INFO, 3,

+	"EIP=0x%8.8lx, EFLAGS=0x%8.8lx\n",

+	(unsigned long)X86_EIP, (unsigned long)X86_EFLAGS);

+}

+

+void

+stack_trace(xf86Int10InfoPtr pInt)

+{

+    int i = 0;

+    unsigned long stack = SEG_ADR((CARD32), X86_SS, SP);

+    unsigned long tail  = (CARD32)((X86_SS << 4) + 0x1000);

+

+    if (stack >= tail) return;

+

+    xf86MsgVerb(X_INFO, 3, "stack at 0x%8.8lx:\n", stack);

+    for (; stack < tail; stack++) {

+	xf86ErrorFVerb(3, " %2.2x", MEM_RB(pInt, stack));

+	i = (i + 1) % 0x10;

+	if (!i)

+	    xf86ErrorFVerb(3, "\n");

+    }

+    if (i)

+	xf86ErrorFVerb(3, "\n");

+}

+

+int

+port_rep_inb(xf86Int10InfoPtr pInt,

+	     CARD16 port, CARD32 base, int d_f, CARD32 count)

+{

+    register int inc = d_f ? -1 : 1;

+    CARD32 dst = base;

+    if (PRINT_PORT && DEBUG_IO_TRACE())

+	ErrorF(" rep_insb(%#x) %ld bytes at %8.8lx %s\n",

+		port, count, base, d_f ? "up" : "down");

+    while (count--) {

+	MEM_WB(pInt, dst, x_inb(port));

+	dst += inc;

+    }

+    return dst - base;

+}

+

+int

+port_rep_inw(xf86Int10InfoPtr pInt,

+	     CARD16 port, CARD32 base, int d_f, CARD32 count)

+{

+    register int inc = d_f ? -2 : 2;

+    CARD32 dst = base;

+    if (PRINT_PORT && DEBUG_IO_TRACE())

+	ErrorF(" rep_insw(%#x) %ld bytes at %8.8lx %s\n",

+	     port, count, base, d_f ? "up" : "down");

+    while (count--) {

+	MEM_WW(pInt, dst, x_inw(port));

+	dst += inc;

+    }

+    return dst - base;

+}

+

+int

+port_rep_inl(xf86Int10InfoPtr pInt,

+	     CARD16 port, CARD32 base, int d_f, CARD32 count)

+{

+    register int inc = d_f ? -4 : 4;

+    CARD32 dst = base;

+    if (PRINT_PORT && DEBUG_IO_TRACE())

+	ErrorF(" rep_insl(%#x) %ld bytes at %8.8lx %s\n",

+	     port, count, base, d_f ? "up" : "down");

+    while (count--) {

+	MEM_WL(pInt, dst, x_inl(port));

+	dst += inc;

+    }

+    return dst - base;

+}

+

+int

+port_rep_outb(xf86Int10InfoPtr pInt,

+	      CARD16 port, CARD32 base, int d_f, CARD32 count)

+{

+    register int inc = d_f ? -1 : 1;

+    CARD32 dst = base;

+    if (PRINT_PORT && DEBUG_IO_TRACE())

+	ErrorF(" rep_outb(%#x) %ld bytes at %8.8lx %s\n",

+	     port, count, base, d_f ? "up" : "down");

+    while (count--) {

+	x_outb(port, MEM_RB(pInt, dst));

+	dst += inc;

+    }

+    return dst - base;

+}

+

+int

+port_rep_outw(xf86Int10InfoPtr pInt,

+	      CARD16 port, CARD32 base, int d_f, CARD32 count)

+{

+    register int inc = d_f ? -2 : 2;

+    CARD32 dst = base;

+    if (PRINT_PORT && DEBUG_IO_TRACE())

+	ErrorF(" rep_outw(%#x) %ld bytes at %8.8lx %s\n",

+	     port, count, base, d_f ? "up" : "down");

+    while (count--) {

+	x_outw(port, MEM_RW(pInt, dst));

+	dst += inc;

+    }

+    return dst - base;

+}

+

+int

+port_rep_outl(xf86Int10InfoPtr pInt,

+	      CARD16 port, CARD32 base, int d_f, CARD32 count)

+{

+    register int inc = d_f ? -4 : 4;

+    CARD32 dst = base;

+    if (PRINT_PORT && DEBUG_IO_TRACE())

+	ErrorF(" rep_outl(%#x) %ld bytes at %8.8lx %s\n",

+	     port, count, base, d_f ? "up" : "down");

+    while (count--) {

+	x_outl(port, MEM_RL(pInt, dst));

+	dst += inc;

+    }

+    return dst - base;

+}

+

+CARD8

+x_inb(CARD16 port)

+{

+    CARD8 val;

+

+    if (port == 0x40) {

+	Int10Current->inb40time++;

+	val = (CARD8)(Int10Current->inb40time >>

+		      ((Int10Current->inb40time & 1) << 3));

+	if (PRINT_PORT && DEBUG_IO_TRACE())

+	    ErrorF(" inb(%#x) = %2.2x\n", port, val);

+#ifdef __NOT_YET__

+    } else if (port < 0x0100) {		/* Don't interfere with mainboard */

+	val = 0;

+	xf86DrvMsgVerb(Int10Current->scrnIndex, X_NOT_IMPLEMENTED, 2,

+	    "inb 0x%4.4x\n", port);

+	if (xf86GetVerbosity() > 3) {

+	    dump_registers(Int10Current);

+	    stack_trace(Int10Current);

+	}

+#endif /* __NOT_YET__ */

+    } else if (!pciCfg1inb(port, &val)) {

+	val = inb(Int10Current->ioBase + port);

+	if (PRINT_PORT && DEBUG_IO_TRACE())

+	    ErrorF(" inb(%#x) = %2.2x\n", port, val);

+    }

+    return val;

+}

+

+CARD16

+x_inw(CARD16 port)

+{

+    CARD16 val;

+

+    if (port == 0x5c) {

+	struct timeval tv;

+

+	/*

+	 * Emulate a PC98's timer.  Typical resolution is 3.26 usec.

+	 * Approximate this by dividing by 3.

+	 */

+	X_GETTIMEOFDAY(&tv);

+	val = (CARD16)(tv.tv_usec / 3);

+    } else if (!pciCfg1inw(port, &val)) {

+	val = inw(Int10Current->ioBase + port);

+	if (PRINT_PORT && DEBUG_IO_TRACE())

+	    ErrorF(" inw(%#x) = %4.4x\n", port, val);

+    }

+    return val;

+}

+

+void

+x_outb(CARD16 port, CARD8 val)

+{

+    if ((port == 0x43) && (val == 0)) {

+	struct timeval tv;

+	/*

+	 * Emulate a PC's timer 0.  Such timers typically have a resolution of

+	 * some .838 usec per tick, but this can only provide 1 usec per tick.

+	 * (Not that this matters much, given inherent emulation delays.)  Use

+	 * the bottom bit as a byte select.  See inb(0x40) above.

+	 */

+	X_GETTIMEOFDAY(&tv);

+	Int10Current->inb40time = (CARD16)(tv.tv_usec | 1);

+	if (PRINT_PORT && DEBUG_IO_TRACE())

+	    ErrorF(" outb(%#x, %2.2x)\n", port, val);

+#ifdef __NOT_YET__

+    } else if (port < 0x0100) {		/* Don't interfere with mainboard */

+	xf86DrvMsgVerb(Int10Current->scrnIndex, X_NOT_IMPLEMENTED, 2,

+	    "outb 0x%4.4x,0x%2.2x\n", port, val);

+	if (xf86GetVerbosity() > 3) {

+	    dump_registers(Int10Current);

+	    stack_trace(Int10Current);

+	}

+#endif /* __NOT_YET__ */

+    } else if (!pciCfg1outb(port, val)) {

+	if (PRINT_PORT && DEBUG_IO_TRACE())

+	    ErrorF(" outb(%#x, %2.2x)\n", port, val);

+	outb(Int10Current->ioBase + port, val);

+    }

+}

+

+void

+x_outw(CARD16 port, CARD16 val)

+{

+

+    if (!pciCfg1outw(port, val)) {

+	if (PRINT_PORT && DEBUG_IO_TRACE())

+	    ErrorF(" outw(%#x, %4.4x)\n", port, val);

+	outw(Int10Current->ioBase + port, val);

+    }

+}

+

+CARD32

+x_inl(CARD16 port)

+{

+    CARD32 val;

+

+    if (!pciCfg1in(port, &val)) {

+	val = inl(Int10Current->ioBase + port);

+	if (PRINT_PORT && DEBUG_IO_TRACE())

+	    ErrorF(" inl(%#x) = %8.8lx\n", port, val);

+    }

+    return val;

+}

+

+void

+x_outl(CARD16 port, CARD32 val)

+{

+    if (!pciCfg1out(port, val)) {

+	if (PRINT_PORT && DEBUG_IO_TRACE())

+	    ErrorF(" outl(%#x, %8.8lx)\n", port, val);

+	outl(Int10Current->ioBase + port, val);

+    }

+}

+

+CARD8

+Mem_rb(CARD32 addr)

+{

+    return (*Int10Current->mem->rb)(Int10Current, addr);

+}

+

+CARD16

+Mem_rw(CARD32 addr)

+{

+    return (*Int10Current->mem->rw)(Int10Current, addr);

+}

+

+CARD32

+Mem_rl(CARD32 addr)

+{

+    return (*Int10Current->mem->rl)(Int10Current, addr);

+}

+

+void

+Mem_wb(CARD32 addr, CARD8 val)

+{

+    (*Int10Current->mem->wb)(Int10Current, addr, val);

+}

+

+void

+Mem_ww(CARD32 addr, CARD16 val)

+{

+    (*Int10Current->mem->ww)(Int10Current, addr, val);

+}

+

+void

+Mem_wl(CARD32 addr, CARD32 val)

+{

+    (*Int10Current->mem->wl)(Int10Current, addr, val);

+}

+

+static CARD32 PciCfg1Addr = 0;

+

+#define PCI_OFFSET(x) ((x) & 0x000000ff)

+#define PCI_TAG(x)    ((x) & 0x7fffff00)

+

+static struct pci_device*

+pci_device_for_cfg_address (CARD32 addr)

+{

+	struct pci_device *dev = NULL;

+	PCITAG tag = PCI_TAG(addr);

+	struct pci_slot_match slot_match = {

+		.domain = PCI_DOM_FROM_TAG(tag),

+		.bus = PCI_BUS_NO_DOMAIN(PCI_BUS_FROM_TAG(tag)),

+		.dev = PCI_DEV_FROM_TAG(tag),

+		.func = PCI_FUNC_FROM_TAG(tag),

+		.match_data = 0

+	};

+

+	struct pci_device_iterator *iter =

+	    pci_slot_match_iterator_create (&slot_match);

+

+	if (iter)

+		dev = pci_device_next(iter);

+

+	pci_iterator_destroy(iter);

+

+	return dev;

+}

+

+static int

+pciCfg1in(CARD16 addr, CARD32 *val)

+{

+    if (addr == 0xCF8) {

+	*val = PciCfg1Addr;

+	return 1;

+    }

+    if (addr == 0xCFC) {

+	pci_device_cfg_read_u32(pci_device_for_cfg_address(PciCfg1Addr),

+			val, PCI_OFFSET(PciCfg1Addr));

+	if (PRINT_PORT && DEBUG_IO_TRACE())

+	    ErrorF(" cfg_inl(%#lx) = %8.8lx\n", PciCfg1Addr, *val);

+	return 1;

+    }

+    return 0;

+}

+

+static int

+pciCfg1out(CARD16 addr, CARD32 val)

+{

+    if (addr == 0xCF8) {

+	PciCfg1Addr = val;

+	return 1;

+    }

+    if (addr == 0xCFC) {

+	if (PRINT_PORT && DEBUG_IO_TRACE())

+	    ErrorF(" cfg_outl(%#lx, %8.8lx)\n", PciCfg1Addr, val);

+	pci_device_cfg_write_u32(pci_device_for_cfg_address(PciCfg1Addr),

+			val, PCI_OFFSET(PciCfg1Addr));

+	return 1;

+    }

+    return 0;

+}

+

+static int

+pciCfg1inw(CARD16 addr, CARD16 *val)

+{

+    int shift;

+

+    if ((addr >= 0xCF8) && (addr <= 0xCFB)) {

+	shift = (addr - 0xCF8) * 8;

+	*val = (PciCfg1Addr >> shift) & 0xffff;

+	return 1;

+    }

+    if ((addr >= 0xCFC) && (addr <= 0xCFF)) {

+	const unsigned offset = addr - 0xCFC;

+

+	pci_device_cfg_read_u16(pci_device_for_cfg_address(PciCfg1Addr),

+			val, PCI_OFFSET(PciCfg1Addr) + offset);

+	if (PRINT_PORT && DEBUG_IO_TRACE())

+	    ErrorF(" cfg_inw(%#lx) = %4.4x\n", PciCfg1Addr + offset, *val);

+	return 1;

+    }

+    return 0;

+}

+

+static int

+pciCfg1outw(CARD16 addr, CARD16 val)

+{

+    int shift;

+

+    if ((addr >= 0xCF8) && (addr <= 0xCFB)) {

+	shift = (addr - 0xCF8) * 8;

+	PciCfg1Addr &= ~(0xffff << shift);

+	PciCfg1Addr |= ((CARD32) val) << shift;

+	return 1;

+    }

+    if ((addr >= 0xCFC) && (addr <= 0xCFF)) {

+	const unsigned offset = addr - 0xCFC;

+

+	if (PRINT_PORT && DEBUG_IO_TRACE())

+	    ErrorF(" cfg_outw(%#lx, %4.4x)\n", PciCfg1Addr + offset, val);

+	pci_device_cfg_write_u16(pci_device_for_cfg_address(PciCfg1Addr),

+			val, PCI_OFFSET(PciCfg1Addr) + offset);

+	return 1;

+    }

+    return 0;

+}

+

+static int

+pciCfg1inb(CARD16 addr, CARD8 *val)

+{

+    int shift;

+

+    if ((addr >= 0xCF8) && (addr <= 0xCFB)) {

+	shift = (addr - 0xCF8) * 8;

+	*val = (PciCfg1Addr >> shift) & 0xff;

+	return 1;

+    }

+    if ((addr >= 0xCFC) && (addr <= 0xCFF)) {

+	const unsigned offset = addr - 0xCFC;

+

+	pci_device_cfg_read_u8(pci_device_for_cfg_address(PciCfg1Addr),

+			val, PCI_OFFSET(PciCfg1Addr) + offset);

+	if (PRINT_PORT && DEBUG_IO_TRACE())

+	    ErrorF(" cfg_inb(%#lx) = %2.2x\n", PciCfg1Addr + offset, *val);

+	return 1;

+    }

+    return 0;

+}

+

+static int

+pciCfg1outb(CARD16 addr, CARD8 val)

+{

+    int shift;

+

+    if ((addr >= 0xCF8) && (addr <= 0xCFB)) {

+	shift = (addr - 0xCF8) * 8;

+	PciCfg1Addr &= ~(0xff << shift);

+	PciCfg1Addr |= ((CARD32) val) << shift;

+	return 1;

+    }

+    if ((addr >= 0xCFC) && (addr <= 0xCFF)) {

+	const unsigned offset = addr - 0xCFC;

+

+	if (PRINT_PORT && DEBUG_IO_TRACE())

+	    ErrorF(" cfg_outb(%#lx, %2.2x)\n", PciCfg1Addr + offset, val);

+	pci_device_cfg_write_u8(pci_device_for_cfg_address(PciCfg1Addr),

+			val, PCI_OFFSET(PciCfg1Addr) + offset);

+	return 1;

+    }

+    return 0;

+}

+

+CARD8

+bios_checksum(const CARD8 *start, int size)

+{

+    CARD8 sum = 0;

+

+    while (size-- > 0)

+	sum += *start++;

+    return sum;

+}

+

+/*

+ * Lock/Unlock legacy VGA. Some Bioses try to be very clever and make

+ * an attempt to detect a legacy ISA card. If they find one they might

+ * act very strange: for example they might configure the card as a

+ * monochrome card. This might cause some drivers to choke.

+ * To avoid this we attempt legacy VGA by writing to all know VGA

+ * disable registers before we call the BIOS initialization and

+ * restore the original values afterwards. In beween we hold our

+ * breath. To get to a (possibly exising) ISA card need to disable

+ * our current PCI card.

+ */

+/*

+ * This is just for booting: we just want to catch pure

+ * legacy vga therefore we don't worry about mmio etc.

+ * This stuff should really go into vgaHW.c. However then

+ * the driver would have to load the vga-module prior to

+ * doing int10.

+ */

+void

+LockLegacyVGA(xf86Int10InfoPtr pInt, legacyVGAPtr vga)

+{

+    vga->save_msr    = inb(pInt->ioBase + 0x03CC);

+    vga->save_vse    = inb(pInt->ioBase + 0x03C3);

+#ifndef __ia64__

+    vga->save_46e8   = inb(pInt->ioBase + 0x46E8);

+#endif

+    vga->save_pos102 = inb(pInt->ioBase + 0x0102);

+    outb(pInt->ioBase + 0x03C2, ~(CARD8)0x03 & vga->save_msr);

+    outb(pInt->ioBase + 0x03C3, ~(CARD8)0x01 & vga->save_vse);

+#ifndef __ia64__

+    outb(pInt->ioBase + 0x46E8, ~(CARD8)0x08 & vga->save_46e8);

+#endif

+    outb(pInt->ioBase + 0x0102, ~(CARD8)0x01 & vga->save_pos102);

+}

+

+void

+UnlockLegacyVGA(xf86Int10InfoPtr pInt, legacyVGAPtr vga)

+{

+    outb(pInt->ioBase + 0x0102, vga->save_pos102);

+#ifndef __ia64__

+    outb(pInt->ioBase + 0x46E8, vga->save_46e8);

+#endif

+    outb(pInt->ioBase + 0x03C3, vga->save_vse);

+    outb(pInt->ioBase + 0x03C2, vga->save_msr);

+}

+

+#if defined (_PC)

+static void

+SetResetBIOSVars(xf86Int10InfoPtr pInt, Bool set)

+{

+    int pagesize = getpagesize();

+    unsigned char* base = xf86MapVidMem(pInt->scrnIndex,

+					VIDMEM_MMIO, 0, pagesize);

+    int i;

+

+    if (set) {

+	for (i = BIOS_SCRATCH_OFF; i < BIOS_SCRATCH_END; i++)

+	    MEM_WW(pInt, i, *(base + i));

+    } else {

+	for (i = BIOS_SCRATCH_OFF; i < BIOS_SCRATCH_END; i++)

+	    *(base + i) = MEM_RW(pInt, i);

+    }

+    

+    xf86UnMapVidMem(pInt->scrnIndex,base,pagesize);

+}

+

+void

+xf86Int10SaveRestoreBIOSVars(xf86Int10InfoPtr pInt, Bool save)

+{

+    int pagesize = getpagesize();

+    unsigned char* base;

+    int i;

+

+    if (!xf86IsEntityPrimary(pInt->entityIndex)

+	|| (!save && !pInt->BIOSScratch))

+	return;

+    

+    base = xf86MapVidMem(pInt->scrnIndex, VIDMEM_MMIO, 0, pagesize);

+    base += BIOS_SCRATCH_OFF;

+    if (save) {

+	if ((pInt->BIOSScratch

+	     = xnfalloc(BIOS_SCRATCH_LEN)))

+	    for (i = 0; i < BIOS_SCRATCH_LEN; i++)

+		*(((char*)pInt->BIOSScratch + i)) = *(base + i);	

+    } else {

+	if (pInt->BIOSScratch) {

+	    for (i = 0; i < BIOS_SCRATCH_LEN; i++)

+		*(base + i) = *(pInt->BIOSScratch + i); 

+	    free(pInt->BIOSScratch);

+	    pInt->BIOSScratch = NULL;

+	}

+    }

+    

+    xf86UnMapVidMem(pInt->scrnIndex,base - BIOS_SCRATCH_OFF ,pagesize);

+}

+#endif

+

+xf86Int10InfoPtr

+xf86InitInt10(int entityIndex)

+{

+    return xf86ExtendedInitInt10(entityIndex, 0);

+}

diff --git a/xorg-server/hw/xfree86/int10/helper_mem.c b/xorg-server/hw/xfree86/int10/helper_mem.c
index 6f6ecc2b3..b95b56a93 100644
--- a/xorg-server/hw/xfree86/int10/helper_mem.c
+++ b/xorg-server/hw/xfree86/int10/helper_mem.c
@@ -1,330 +1,330 @@
-/*
- *                   XFree86 int10 module
- *   execute BIOS int 10h calls in x86 real mode environment
- *                 Copyright 1999 Egbert Eich
- */
-#ifdef HAVE_XORG_CONFIG_H
-#include <xorg-config.h>
-#endif
-
-#include <string.h>
-#include <stdlib.h>
-
-#include "xf86.h"
-#include "xf86_OSproc.h"
-#include "compiler.h"
-#include "xf86Pci.h"
-#define _INT10_PRIVATE
-#if 0
-#include "int10Defines.h"
-#endif
-#include "xf86int10.h"
-
-#define REG pInt
-
-typedef enum {
-    OPT_NOINT10,
-    OPT_INIT_PRIMARY,
-} INT10Opts;
-
-static const OptionInfoRec INT10Options[] = {
-    {OPT_NOINT10,       "NoINT10",      OPTV_BOOLEAN,   {0},    FALSE },
-    {OPT_INIT_PRIMARY,  "InitPrimary",  OPTV_BOOLEAN,   {0},    FALSE },   
-    { -1,		NULL,		OPTV_NONE,	{0},	FALSE },
-};
-
-#ifdef DEBUG
-void
-dprint(unsigned long start, unsigned long size)
-{
-    int i,j;
-    char *c = (char *)start;
-
-    for (j = 0; j < (size >> 4); j++) {
-	char *d = c;
-	ErrorF("\n0x%lx:  ",(unsigned long)c);
-	for (i = 0; i<16; i++)
-	    ErrorF("%2.2x ",(unsigned char) (*(c++)));
-	c = d;
-	for (i = 0; i<16; i++) {
-	    ErrorF("%c",((((CARD8)(*c)) > 32) && (((CARD8)(*c)) < 128)) ?
-		   (unsigned char) (*(c)): '.');
-	    c++;
-	}
-    }
-    ErrorF("\n");
-}
-#endif
-
-#ifndef _PC
-/*
- * here we are really paranoid about faking a "real"
- * BIOS. Most of this information was pulled from
- * dosemu.
- */
-void
-setup_int_vect(xf86Int10InfoPtr pInt)
-{
-    int i;
-
-    /* let the int vects point to the SYS_BIOS seg */
-    for (i = 0; i < 0x80; i++) {
-	MEM_WW(pInt, i << 2, 0);
-	MEM_WW(pInt, (i << 2) + 2, SYS_BIOS >> 4);
-    }
-
-    reset_int_vect(pInt);
-    /* font tables default location (int 1F) */
-    MEM_WW(pInt,0x1f<<2,0xfa6e);
-
-    /* int 11 default location (Get Equipment Configuration) */
-    MEM_WW(pInt, 0x11 << 2, 0xf84d);
-    /* int 12 default location (Get Conventional Memory Size) */
-    MEM_WW(pInt, 0x12 << 2, 0xf841);
-    /* int 15 default location (I/O System Extensions) */
-    MEM_WW(pInt, 0x15 << 2, 0xf859);
-    /* int 1A default location (RTC, PCI and others) */
-    MEM_WW(pInt, 0x1a << 2, 0xff6e);
-    /* int 05 default location (Bound Exceeded) */
-    MEM_WW(pInt, 0x05 << 2, 0xff54);
-    /* int 08 default location (Double Fault) */
-    MEM_WW(pInt, 0x08 << 2, 0xfea5);
-    /* int 13 default location (Disk) */
-    MEM_WW(pInt, 0x13 << 2, 0xec59);
-    /* int 0E default location (Page Fault) */
-    MEM_WW(pInt, 0x0e << 2, 0xef57);
-    /* int 17 default location (Parallel Port) */
-    MEM_WW(pInt, 0x17 << 2, 0xefd2);
-    /* fdd table default location (int 1e) */
-    MEM_WW(pInt, 0x1e << 2, 0xefc7);
-
-    /* Set Equipment flag to VGA */
-    i = MEM_RB(pInt, 0x0410) & 0xCF;
-    MEM_WB(pInt, 0x0410, i);
-    /* XXX Perhaps setup more of the BDA here.  See also int42(0x00). */
-}
-#endif
-
-int
-setup_system_bios(void *base_addr)
-{
-    char *base = (char *) base_addr;
-
-    /*
-     * we trap the "industry standard entry points" to the BIOS
-     * and all other locations by filling them with "hlt"
-     * TODO: implement hlt-handler for these
-     */
-    memset(base, 0xf4, 0x10000);
-
-    /* set bios date */
-    strcpy(base + 0x0FFF5, "06/11/99");
-    /* set up eisa ident string */
-    strcpy(base + 0x0FFD9, "PCI_ISA");
-    /* write system model id for IBM-AT */
-    *((unsigned char *)(base + 0x0FFFE)) = 0xfc;
-
-    return 1;
-}
-
-void
-reset_int_vect(xf86Int10InfoPtr pInt)
-{
-    /*
-     * This table is normally located at 0xF000:0xF0A4.  However, int 0x42,
-     * function 0 (Mode Set) expects it (or a copy) somewhere in the bottom
-     * 64kB.  Note that because this data doesn't survive POST, int 0x42 should
-     * only be used during EGA/VGA BIOS initialisation.
-     */
-    static const CARD8 VideoParms[] = {
-	/* Timing for modes 0x00 & 0x01 */
-	0x38, 0x28, 0x2d, 0x0a, 0x1f, 0x06, 0x19, 0x1c,
-	0x02, 0x07, 0x06, 0x07, 0x00, 0x00, 0x00, 0x00,
-	/* Timing for modes 0x02 & 0x03 */
-	0x71, 0x50, 0x5a, 0x0a, 0x1f, 0x06, 0x19, 0x1c,
-	0x02, 0x07, 0x06, 0x07, 0x00, 0x00, 0x00, 0x00,
-	/* Timing for modes 0x04, 0x05 & 0x06 */
-	0x38, 0x28, 0x2d, 0x0a, 0x7f, 0x06, 0x64, 0x70,
-	0x02, 0x01, 0x06, 0x07, 0x00, 0x00, 0x00, 0x00,
-	/* Timing for mode 0x07 */
-	0x61, 0x50, 0x52, 0x0f, 0x19, 0x06, 0x19, 0x19,
-	0x02, 0x0d, 0x0b, 0x0c, 0x00, 0x00, 0x00, 0x00,
-	/* Display page lengths in little endian order */
-	0x00, 0x08, /* Modes 0x00 and 0x01 */
-	0x00, 0x10, /* Modes 0x02 and 0x03 */
-	0x00, 0x40, /* Modes 0x04 and 0x05 */
-	0x00, 0x40, /* Modes 0x06 and 0x07 */
-	/* Number of columns for each mode */
-	40, 40, 80, 80, 40, 40, 80, 80,
-	/* CGA Mode register value for each mode */
-	0x2c, 0x28, 0x2d, 0x29, 0x2a, 0x2e, 0x1e, 0x29,
-	/* Padding */
-	0x00, 0x00, 0x00, 0x00
-	};
-    int i;
-
-    for (i = 0; i < sizeof(VideoParms); i++)
-	MEM_WB(pInt, i + (0x1000 - sizeof(VideoParms)), VideoParms[i]);
-    MEM_WW(pInt,  0x1d << 2, 0x1000 - sizeof(VideoParms));
-    MEM_WW(pInt, (0x1d << 2) + 2, 0);
-
-    MEM_WW(pInt,  0x10 << 2, 0xf065);
-    MEM_WW(pInt, (0x10 << 2) + 2, SYS_BIOS >> 4);
-    MEM_WW(pInt,  0x42 << 2, 0xf065);
-    MEM_WW(pInt, (0x42 << 2) + 2, SYS_BIOS >> 4);
-    MEM_WW(pInt,  0x6D << 2, 0xf065);
-    MEM_WW(pInt, (0x6D << 2) + 2, SYS_BIOS >> 4);
-}
-
-void
-set_return_trap(xf86Int10InfoPtr pInt)
-{
-    /*
-     * Here we set the exit condition:  We return when we encounter
-     * 'hlt' (=0xf4), which we locate at address 0x600 in x86 memory.
-     */
-    MEM_WB(pInt, 0x0600, 0xf4);
-
-    /*
-     * Allocate a segment for the stack
-     */
-    xf86Int10AllocPages(pInt, 1, &pInt->stackseg);
-}
-
-void *
-xf86HandleInt10Options(ScrnInfoPtr pScrn, int entityIndex)
-{
-    EntityInfoPtr pEnt = xf86GetEntityInfo(entityIndex);
-    OptionInfoPtr options = NULL;
-    
-    if (pEnt->device) {
-	pointer configOptions = NULL;
-
-	/* Check if xf86CollectOptions() has already been called */
-	if (((pEnt->index < 0) ||
-	    !pScrn ||
-	    !(configOptions = pScrn->options)) &&
-	    pEnt->device)
-	    configOptions = pEnt->device->options;
-
-	if (configOptions) {
-	    if (!(options = (OptionInfoPtr) xalloc(sizeof(INT10Options))))
-		return NULL;
-	     
-	    (void)memcpy(options, INT10Options, sizeof(INT10Options));
-	    xf86ProcessOptions(pScrn->scrnIndex, configOptions, options);
-	}
-    }
-    xfree(pEnt);
-
-    return options;
-}
-
-Bool
-int10skip(const void* options)
-{
-    Bool noint10 = FALSE;
-
-    if (!options) return FALSE;
-    
-    xf86GetOptValBool(options, OPT_NOINT10, &noint10);
-    return noint10;
-}
-
-Bool
-int10_check_bios(int scrnIndex, int codeSeg, const unsigned char* vbiosMem)
-{
-    int size;
-
-    if ((codeSeg & 0x1f) ||	/* Not 512-byte aligned otherwise */
-	((codeSeg << 4) < V_BIOS) ||
-	((codeSeg << 4) >= SYS_SIZE))
-	return FALSE;
-
-    if (xf86IsPc98())
-	return FALSE;
-
-    if ((*vbiosMem != 0x55) || (*(vbiosMem+1) != 0xAA) || !*(vbiosMem+2))
-	return FALSE;
-
-    size = *(vbiosMem + 2) * 512;
-
-    if ((size + (codeSeg << 4)) > SYS_SIZE)
-	return FALSE;
-
-    if (bios_checksum(vbiosMem, size))
-	xf86DrvMsg(scrnIndex, X_INFO, "Bad V_BIOS checksum\n");
-
-    return TRUE;
-}
-
-Bool
-initPrimary(const void* options)
-{
-    Bool initPrimary = FALSE;
-
-    if (!options) return FALSE;
-    
-    xf86GetOptValBool(options, OPT_INIT_PRIMARY, &initPrimary);
-    return initPrimary;
-}
-
-BusType
-xf86int10GetBiosLocationType(const xf86Int10InfoPtr pInt)
-{
-    BusType location_type;
-
-    EntityInfoPtr pEnt = xf86GetEntityInfo(pInt->entityIndex);
-    location_type = pEnt->location.type;
-    xfree(pEnt);
-
-    return location_type;
-}
-
-
-#define CHECK_V_SEGMENT_RANGE(x)   \
-    if (((x) << 4) < V_BIOS) { \
-	xf86DrvMsg(pInt->scrnIndex, X_ERROR, \
-		   "V_BIOS address 0x%lx out of range\n", \
-		   (unsigned long)(x) << 4); \
-	return FALSE; \
-    }
-
-Bool
-xf86int10GetBiosSegment(xf86Int10InfoPtr pInt, void *base)
-{
-    unsigned i;
-    int cs = ~0;
-    int segments[4];
-    const char * format;
-
-    segments[0] = MEM_RW(pInt, (0x10 << 2) + 2);
-    segments[1] = MEM_RW(pInt, (0x42 << 2) + 2);
-    segments[2] = V_BIOS >> 4;
-    segments[3] = ~0;
-
-    format = "No V_BIOS found\n";
-
-    for (i = 0; segments[i] != ~0; i++) {
-	unsigned char * vbiosMem;
-
-	cs = segments[i];
-
-	CHECK_V_SEGMENT_RANGE(cs);
-	vbiosMem = (unsigned char *)base + (cs << 4);
-	if (int10_check_bios(pInt->scrnIndex, cs, vbiosMem)) {
-	    break;
-	}
-    }
-
-    if (segments[i] == ~0) {
-	xf86DrvMsg(pInt->scrnIndex, X_ERROR, format, (unsigned long)cs << 4);
-	return FALSE;
-    }
-
-    xf86DrvMsg(pInt->scrnIndex, X_INFO, "Primary V_BIOS segment is: 0x%lx\n",
-	    (unsigned long)cs);
-
-    pInt->BIOSseg = cs;
-    return TRUE;
-}
+/*

+ *                   XFree86 int10 module

+ *   execute BIOS int 10h calls in x86 real mode environment

+ *                 Copyright 1999 Egbert Eich

+ */

+#ifdef HAVE_XORG_CONFIG_H

+#include <xorg-config.h>

+#endif

+

+#include <string.h>

+#include <stdlib.h>

+

+#include "xf86.h"

+#include "xf86_OSproc.h"

+#include "compiler.h"

+#include "xf86Pci.h"

+#define _INT10_PRIVATE

+#if 0

+#include "int10Defines.h"

+#endif

+#include "xf86int10.h"

+

+#define REG pInt

+

+typedef enum {

+    OPT_NOINT10,

+    OPT_INIT_PRIMARY,

+} INT10Opts;

+

+static const OptionInfoRec INT10Options[] = {

+    {OPT_NOINT10,       "NoINT10",      OPTV_BOOLEAN,   {0},    FALSE },

+    {OPT_INIT_PRIMARY,  "InitPrimary",  OPTV_BOOLEAN,   {0},    FALSE },   

+    { -1,		NULL,		OPTV_NONE,	{0},	FALSE },

+};

+

+#ifdef DEBUG

+void

+dprint(unsigned long start, unsigned long size)

+{

+    int i,j;

+    char *c = (char *)start;

+

+    for (j = 0; j < (size >> 4); j++) {

+	char *d = c;

+	ErrorF("\n0x%lx:  ",(unsigned long)c);

+	for (i = 0; i<16; i++)

+	    ErrorF("%2.2x ",(unsigned char) (*(c++)));

+	c = d;

+	for (i = 0; i<16; i++) {

+	    ErrorF("%c",((((CARD8)(*c)) > 32) && (((CARD8)(*c)) < 128)) ?

+		   (unsigned char) (*(c)): '.');

+	    c++;

+	}

+    }

+    ErrorF("\n");

+}

+#endif

+

+#ifndef _PC

+/*

+ * here we are really paranoid about faking a "real"

+ * BIOS. Most of this information was pulled from

+ * dosemu.

+ */

+void

+setup_int_vect(xf86Int10InfoPtr pInt)

+{

+    int i;

+

+    /* let the int vects point to the SYS_BIOS seg */

+    for (i = 0; i < 0x80; i++) {

+	MEM_WW(pInt, i << 2, 0);

+	MEM_WW(pInt, (i << 2) + 2, SYS_BIOS >> 4);

+    }

+

+    reset_int_vect(pInt);

+    /* font tables default location (int 1F) */

+    MEM_WW(pInt,0x1f<<2,0xfa6e);

+

+    /* int 11 default location (Get Equipment Configuration) */

+    MEM_WW(pInt, 0x11 << 2, 0xf84d);

+    /* int 12 default location (Get Conventional Memory Size) */

+    MEM_WW(pInt, 0x12 << 2, 0xf841);

+    /* int 15 default location (I/O System Extensions) */

+    MEM_WW(pInt, 0x15 << 2, 0xf859);

+    /* int 1A default location (RTC, PCI and others) */

+    MEM_WW(pInt, 0x1a << 2, 0xff6e);

+    /* int 05 default location (Bound Exceeded) */

+    MEM_WW(pInt, 0x05 << 2, 0xff54);

+    /* int 08 default location (Double Fault) */

+    MEM_WW(pInt, 0x08 << 2, 0xfea5);

+    /* int 13 default location (Disk) */

+    MEM_WW(pInt, 0x13 << 2, 0xec59);

+    /* int 0E default location (Page Fault) */

+    MEM_WW(pInt, 0x0e << 2, 0xef57);

+    /* int 17 default location (Parallel Port) */

+    MEM_WW(pInt, 0x17 << 2, 0xefd2);

+    /* fdd table default location (int 1e) */

+    MEM_WW(pInt, 0x1e << 2, 0xefc7);

+

+    /* Set Equipment flag to VGA */

+    i = MEM_RB(pInt, 0x0410) & 0xCF;

+    MEM_WB(pInt, 0x0410, i);

+    /* XXX Perhaps setup more of the BDA here.  See also int42(0x00). */

+}

+#endif

+

+int

+setup_system_bios(void *base_addr)

+{

+    char *base = (char *) base_addr;

+

+    /*

+     * we trap the "industry standard entry points" to the BIOS

+     * and all other locations by filling them with "hlt"

+     * TODO: implement hlt-handler for these

+     */

+    memset(base, 0xf4, 0x10000);

+

+    /* set bios date */

+    strcpy(base + 0x0FFF5, "06/11/99");

+    /* set up eisa ident string */

+    strcpy(base + 0x0FFD9, "PCI_ISA");

+    /* write system model id for IBM-AT */

+    *((unsigned char *)(base + 0x0FFFE)) = 0xfc;

+

+    return 1;

+}

+

+void

+reset_int_vect(xf86Int10InfoPtr pInt)

+{

+    /*

+     * This table is normally located at 0xF000:0xF0A4.  However, int 0x42,

+     * function 0 (Mode Set) expects it (or a copy) somewhere in the bottom

+     * 64kB.  Note that because this data doesn't survive POST, int 0x42 should

+     * only be used during EGA/VGA BIOS initialisation.

+     */

+    static const CARD8 VideoParms[] = {

+	/* Timing for modes 0x00 & 0x01 */

+	0x38, 0x28, 0x2d, 0x0a, 0x1f, 0x06, 0x19, 0x1c,

+	0x02, 0x07, 0x06, 0x07, 0x00, 0x00, 0x00, 0x00,

+	/* Timing for modes 0x02 & 0x03 */

+	0x71, 0x50, 0x5a, 0x0a, 0x1f, 0x06, 0x19, 0x1c,

+	0x02, 0x07, 0x06, 0x07, 0x00, 0x00, 0x00, 0x00,

+	/* Timing for modes 0x04, 0x05 & 0x06 */

+	0x38, 0x28, 0x2d, 0x0a, 0x7f, 0x06, 0x64, 0x70,

+	0x02, 0x01, 0x06, 0x07, 0x00, 0x00, 0x00, 0x00,

+	/* Timing for mode 0x07 */

+	0x61, 0x50, 0x52, 0x0f, 0x19, 0x06, 0x19, 0x19,

+	0x02, 0x0d, 0x0b, 0x0c, 0x00, 0x00, 0x00, 0x00,

+	/* Display page lengths in little endian order */

+	0x00, 0x08, /* Modes 0x00 and 0x01 */

+	0x00, 0x10, /* Modes 0x02 and 0x03 */

+	0x00, 0x40, /* Modes 0x04 and 0x05 */

+	0x00, 0x40, /* Modes 0x06 and 0x07 */

+	/* Number of columns for each mode */

+	40, 40, 80, 80, 40, 40, 80, 80,

+	/* CGA Mode register value for each mode */

+	0x2c, 0x28, 0x2d, 0x29, 0x2a, 0x2e, 0x1e, 0x29,

+	/* Padding */

+	0x00, 0x00, 0x00, 0x00

+	};

+    int i;

+

+    for (i = 0; i < sizeof(VideoParms); i++)

+	MEM_WB(pInt, i + (0x1000 - sizeof(VideoParms)), VideoParms[i]);

+    MEM_WW(pInt,  0x1d << 2, 0x1000 - sizeof(VideoParms));

+    MEM_WW(pInt, (0x1d << 2) + 2, 0);

+

+    MEM_WW(pInt,  0x10 << 2, 0xf065);

+    MEM_WW(pInt, (0x10 << 2) + 2, SYS_BIOS >> 4);

+    MEM_WW(pInt,  0x42 << 2, 0xf065);

+    MEM_WW(pInt, (0x42 << 2) + 2, SYS_BIOS >> 4);

+    MEM_WW(pInt,  0x6D << 2, 0xf065);

+    MEM_WW(pInt, (0x6D << 2) + 2, SYS_BIOS >> 4);

+}

+

+void

+set_return_trap(xf86Int10InfoPtr pInt)

+{

+    /*

+     * Here we set the exit condition:  We return when we encounter

+     * 'hlt' (=0xf4), which we locate at address 0x600 in x86 memory.

+     */

+    MEM_WB(pInt, 0x0600, 0xf4);

+

+    /*

+     * Allocate a segment for the stack

+     */

+    xf86Int10AllocPages(pInt, 1, &pInt->stackseg);

+}

+

+void *

+xf86HandleInt10Options(ScrnInfoPtr pScrn, int entityIndex)

+{

+    EntityInfoPtr pEnt = xf86GetEntityInfo(entityIndex);

+    OptionInfoPtr options = NULL;

+    

+    if (pEnt->device) {

+	pointer configOptions = NULL;

+

+	/* Check if xf86CollectOptions() has already been called */

+	if (((pEnt->index < 0) ||

+	    !pScrn ||

+	    !(configOptions = pScrn->options)) &&

+	    pEnt->device)

+	    configOptions = pEnt->device->options;

+

+	if (configOptions) {

+	    if (!(options = (OptionInfoPtr) malloc(sizeof(INT10Options))))

+		return NULL;

+	     

+	    (void)memcpy(options, INT10Options, sizeof(INT10Options));

+	    xf86ProcessOptions(pScrn->scrnIndex, configOptions, options);

+	}

+    }

+    free(pEnt);

+

+    return options;

+}

+

+Bool

+int10skip(const void* options)

+{

+    Bool noint10 = FALSE;

+

+    if (!options) return FALSE;

+    

+    xf86GetOptValBool(options, OPT_NOINT10, &noint10);

+    return noint10;

+}

+

+Bool

+int10_check_bios(int scrnIndex, int codeSeg, const unsigned char* vbiosMem)

+{

+    int size;

+

+    if ((codeSeg & 0x1f) ||	/* Not 512-byte aligned otherwise */

+	((codeSeg << 4) < V_BIOS) ||

+	((codeSeg << 4) >= SYS_SIZE))

+	return FALSE;

+

+    if (xf86IsPc98())

+	return FALSE;

+

+    if ((*vbiosMem != 0x55) || (*(vbiosMem+1) != 0xAA) || !*(vbiosMem+2))

+	return FALSE;

+

+    size = *(vbiosMem + 2) * 512;

+

+    if ((size + (codeSeg << 4)) > SYS_SIZE)

+	return FALSE;

+

+    if (bios_checksum(vbiosMem, size))

+	xf86DrvMsg(scrnIndex, X_INFO, "Bad V_BIOS checksum\n");

+

+    return TRUE;

+}

+

+Bool

+initPrimary(const void* options)

+{

+    Bool initPrimary = FALSE;

+

+    if (!options) return FALSE;

+    

+    xf86GetOptValBool(options, OPT_INIT_PRIMARY, &initPrimary);

+    return initPrimary;

+}

+

+BusType

+xf86int10GetBiosLocationType(const xf86Int10InfoPtr pInt)

+{

+    BusType location_type;

+

+    EntityInfoPtr pEnt = xf86GetEntityInfo(pInt->entityIndex);

+    location_type = pEnt->location.type;

+    free(pEnt);

+

+    return location_type;

+}

+

+

+#define CHECK_V_SEGMENT_RANGE(x)   \

+    if (((x) << 4) < V_BIOS) { \

+	xf86DrvMsg(pInt->scrnIndex, X_ERROR, \

+		   "V_BIOS address 0x%lx out of range\n", \

+		   (unsigned long)(x) << 4); \

+	return FALSE; \

+    }

+

+Bool

+xf86int10GetBiosSegment(xf86Int10InfoPtr pInt, void *base)

+{

+    unsigned i;

+    int cs = ~0;

+    int segments[4];

+    const char * format;

+

+    segments[0] = MEM_RW(pInt, (0x10 << 2) + 2);

+    segments[1] = MEM_RW(pInt, (0x42 << 2) + 2);

+    segments[2] = V_BIOS >> 4;

+    segments[3] = ~0;

+

+    format = "No V_BIOS found\n";

+

+    for (i = 0; segments[i] != ~0; i++) {

+	unsigned char * vbiosMem;

+

+	cs = segments[i];

+

+	CHECK_V_SEGMENT_RANGE(cs);

+	vbiosMem = (unsigned char *)base + (cs << 4);

+	if (int10_check_bios(pInt->scrnIndex, cs, vbiosMem)) {

+	    break;

+	}

+    }

+

+    if (segments[i] == ~0) {

+	xf86DrvMsg(pInt->scrnIndex, X_ERROR, format, (unsigned long)cs << 4);

+	return FALSE;

+    }

+

+    xf86DrvMsg(pInt->scrnIndex, X_INFO, "Primary V_BIOS segment is: 0x%lx\n",

+	    (unsigned long)cs);

+

+    pInt->BIOSseg = cs;

+    return TRUE;

+}