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authormarha <marha@users.sourceforge.net>2012-03-23 10:05:55 +0100
committermarha <marha@users.sourceforge.net>2012-03-23 10:05:55 +0100
commit0f834b91a4768673833ab4917e87d86c237bb1a6 (patch)
tree363489504ed4b2d360259b8de4c9e392918e5d02 /xorg-server/hw/xfree86/x86emu/ops2.c
parentfc72edebf875378459368c5383d9023730cbca54 (diff)
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libX11 xserver fontconfig mesa pixman xkbcomp xkeyboard-config git update
23 Mar 2012
Diffstat (limited to 'xorg-server/hw/xfree86/x86emu/ops2.c')
-rw-r--r--xorg-server/hw/xfree86/x86emu/ops2.c1877
1 files changed, 994 insertions, 883 deletions
diff --git a/xorg-server/hw/xfree86/x86emu/ops2.c b/xorg-server/hw/xfree86/x86emu/ops2.c
index 501d5fcb2..5ed2bf68d 100644
--- a/xorg-server/hw/xfree86/x86emu/ops2.c
+++ b/xorg-server/hw/xfree86/x86emu/ops2.c
@@ -55,14 +55,14 @@ op1 - Instruction op code
REMARKS:
Handles illegal opcodes.
****************************************************************************/
-static void x86emuOp2_illegal_op(
- u8 op2)
+static void
+x86emuOp2_illegal_op(u8 op2)
{
- START_OF_INSTR();
- DECODE_PRINTF("ILLEGAL EXTENDED X86 OPCODE\n");
- TRACE_REGS();
- printk("%04x:%04x: %02X ILLEGAL EXTENDED X86 OPCODE!\n",
- M.x86.R_CS, M.x86.R_IP-2,op2);
+ START_OF_INSTR();
+ DECODE_PRINTF("ILLEGAL EXTENDED X86 OPCODE\n");
+ TRACE_REGS();
+ printk("%04x:%04x: %02X ILLEGAL EXTENDED X86 OPCODE!\n",
+ M.x86.R_CS, M.x86.R_IP - 2, op2);
HALT_SYS();
END_OF_INSTR();
}
@@ -73,7 +73,8 @@ static void x86emuOp2_illegal_op(
REMARKS:
Handles opcode 0x0f,0x31
****************************************************************************/
-static void x86emuOp2_rdtsc(u8 X86EMU_UNUSED(op2))
+static void
+x86emuOp2_rdtsc(u8 X86EMU_UNUSED(op2))
{
#ifdef __HAS_LONG_LONG__
static u64 counter = 0;
@@ -107,7 +108,8 @@ static void x86emuOp2_rdtsc(u8 X86EMU_UNUSED(op2))
REMARKS:
Handles opcode 0x0f,0x80-0x8F
****************************************************************************/
-static void x86emuOp2_long_jump(u8 op2)
+static void
+x86emuOp2_long_jump(u8 op2)
{
s32 target;
const char *name = NULL;
@@ -116,81 +118,81 @@ static void x86emuOp2_long_jump(u8 op2)
/* conditional jump to word offset. */
START_OF_INSTR();
switch (op2) {
- case 0x80:
+ case 0x80:
name = "JO\t";
- cond = ACCESS_FLAG(F_OF);
+ cond = ACCESS_FLAG(F_OF);
break;
- case 0x81:
+ case 0x81:
name = "JNO\t";
cond = !ACCESS_FLAG(F_OF);
break;
- case 0x82:
+ case 0x82:
name = "JB\t";
cond = ACCESS_FLAG(F_CF);
break;
- case 0x83:
+ case 0x83:
name = "JNB\t";
cond = !ACCESS_FLAG(F_CF);
break;
- case 0x84:
+ case 0x84:
name = "JZ\t";
cond = ACCESS_FLAG(F_ZF);
break;
- case 0x85:
+ case 0x85:
name = "JNZ\t";
cond = !ACCESS_FLAG(F_ZF);
break;
- case 0x86:
+ case 0x86:
name = "JBE\t";
cond = ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF);
break;
- case 0x87:
+ case 0x87:
name = "JNBE\t";
cond = !(ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF));
break;
- case 0x88:
+ case 0x88:
name = "JS\t";
cond = ACCESS_FLAG(F_SF);
break;
- case 0x89:
+ case 0x89:
name = "JNS\t";
cond = !ACCESS_FLAG(F_SF);
break;
- case 0x8a:
+ case 0x8a:
name = "JP\t";
cond = ACCESS_FLAG(F_PF);
break;
- case 0x8b:
+ case 0x8b:
name = "JNP\t";
cond = !ACCESS_FLAG(F_PF);
break;
- case 0x8c:
+ case 0x8c:
name = "JL\t";
cond = xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF));
break;
- case 0x8d:
+ case 0x8d:
name = "JNL\t";
cond = !(xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)));
break;
- case 0x8e:
+ case 0x8e:
name = "JLE\t";
cond = (xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) ||
ACCESS_FLAG(F_ZF));
break;
- case 0x8f:
+ case 0x8f:
name = "JNLE\t";
cond = !(xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) ||
ACCESS_FLAG(F_ZF));
break;
}
DECODE_PRINTF(name);
- (void)name;
+ (void) name;
target = (s16) fetch_word_imm();
target += (s16) M.x86.R_IP;
DECODE_PRINTF2("%04x\n", target);
TRACE_AND_STEP();
if (cond)
- M.x86.R_IP = (u16)target;
+ M.x86.R_IP = (u16) target;
DECODE_CLEAR_SEGOVR();
END_OF_INSTR();
}
@@ -199,85 +201,86 @@ static void x86emuOp2_long_jump(u8 op2)
REMARKS:
Handles opcode 0x0f,0x90-0x9F
****************************************************************************/
-static void x86emuOp2_set_byte(u8 op2)
+static void
+x86emuOp2_set_byte(u8 op2)
{
int mod, rl, rh;
uint destoffset;
- u8 *destreg;
+ u8 *destreg;
const char *name = NULL;
int cond = 0;
START_OF_INSTR();
switch (op2) {
- case 0x90:
+ case 0x90:
name = "SETO\t";
- cond = ACCESS_FLAG(F_OF);
+ cond = ACCESS_FLAG(F_OF);
break;
- case 0x91:
+ case 0x91:
name = "SETNO\t";
cond = !ACCESS_FLAG(F_OF);
break;
- case 0x92:
+ case 0x92:
name = "SETB\t";
cond = ACCESS_FLAG(F_CF);
break;
- case 0x93:
+ case 0x93:
name = "SETNB\t";
cond = !ACCESS_FLAG(F_CF);
break;
- case 0x94:
+ case 0x94:
name = "SETZ\t";
cond = ACCESS_FLAG(F_ZF);
break;
- case 0x95:
+ case 0x95:
name = "SETNZ\t";
cond = !ACCESS_FLAG(F_ZF);
break;
- case 0x96:
+ case 0x96:
name = "SETBE\t";
cond = ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF);
break;
- case 0x97:
+ case 0x97:
name = "SETNBE\t";
cond = !(ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF));
break;
- case 0x98:
+ case 0x98:
name = "SETS\t";
cond = ACCESS_FLAG(F_SF);
break;
- case 0x99:
+ case 0x99:
name = "SETNS\t";
cond = !ACCESS_FLAG(F_SF);
break;
- case 0x9a:
+ case 0x9a:
name = "SETP\t";
cond = ACCESS_FLAG(F_PF);
break;
- case 0x9b:
+ case 0x9b:
name = "SETNP\t";
cond = !ACCESS_FLAG(F_PF);
break;
- case 0x9c:
+ case 0x9c:
name = "SETL\t";
cond = xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF));
break;
- case 0x9d:
+ case 0x9d:
name = "SETNL\t";
cond = xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF));
break;
- case 0x9e:
+ case 0x9e:
name = "SETLE\t";
cond = (xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) ||
ACCESS_FLAG(F_ZF));
break;
- case 0x9f:
+ case 0x9f:
name = "SETNLE\t";
cond = !(xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) ||
ACCESS_FLAG(F_ZF));
break;
}
DECODE_PRINTF(name);
- (void)name;
+ (void) name;
FETCH_DECODE_MODRM(mod, rh, rl);
switch (mod) {
case 0:
@@ -295,7 +298,7 @@ static void x86emuOp2_set_byte(u8 op2)
TRACE_AND_STEP();
store_data_byte(destoffset, cond ? 0x01 : 0x00);
break;
- case 3: /* register to register */
+ case 3: /* register to register */
destreg = DECODE_RM_BYTE_REGISTER(rl);
TRACE_AND_STEP();
*destreg = cond ? 0x01 : 0x00;
@@ -309,7 +312,8 @@ static void x86emuOp2_set_byte(u8 op2)
REMARKS:
Handles opcode 0x0f,0xa0
****************************************************************************/
-static void x86emuOp2_push_FS(u8 X86EMU_UNUSED(op2))
+static void
+x86emuOp2_push_FS(u8 X86EMU_UNUSED(op2))
{
START_OF_INSTR();
DECODE_PRINTF("PUSH\tFS\n");
@@ -323,7 +327,8 @@ static void x86emuOp2_push_FS(u8 X86EMU_UNUSED(op2))
REMARKS:
Handles opcode 0x0f,0xa1
****************************************************************************/
-static void x86emuOp2_pop_FS(u8 X86EMU_UNUSED(op2))
+static void
+x86emuOp2_pop_FS(u8 X86EMU_UNUSED(op2))
{
START_OF_INSTR();
DECODE_PRINTF("POP\tFS\n");
@@ -337,7 +342,8 @@ static void x86emuOp2_pop_FS(u8 X86EMU_UNUSED(op2))
REMARKS: CPUID takes EAX/ECX as inputs, writes EAX/EBX/ECX/EDX as output
Handles opcode 0x0f,0xa2
****************************************************************************/
-static void x86emuOp2_cpuid(u8 X86EMU_UNUSED(op2))
+static void
+x86emuOp2_cpuid(u8 X86EMU_UNUSED(op2))
{
START_OF_INSTR();
DECODE_PRINTF("CPUID\n");
@@ -351,11 +357,12 @@ static void x86emuOp2_cpuid(u8 X86EMU_UNUSED(op2))
REMARKS:
Handles opcode 0x0f,0xa3
****************************************************************************/
-static void x86emuOp2_bt_R(u8 X86EMU_UNUSED(op2))
+static void
+x86emuOp2_bt_R(u8 X86EMU_UNUSED(op2))
{
int mod, rl, rh;
uint srcoffset;
- int bit,disp;
+ int bit, disp;
START_OF_INSTR();
DECODE_PRINTF("BT\t");
@@ -371,10 +378,11 @@ static void x86emuOp2_bt_R(u8 X86EMU_UNUSED(op2))
shiftreg = DECODE_RM_LONG_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
- CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
- } else {
+ disp = (s16) * shiftreg >> 5;
+ srcval = fetch_data_long(srcoffset + disp);
+ CONDITIONAL_SET_FLAG(srcval & (0x1 << bit), F_CF);
+ }
+ else {
u16 srcval;
u16 *shiftreg;
@@ -383,9 +391,9 @@ static void x86emuOp2_bt_R(u8 X86EMU_UNUSED(op2))
shiftreg = DECODE_RM_WORD_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
+ disp = (s16) * shiftreg >> 4;
+ srcval = fetch_data_word(srcoffset + disp);
+ CONDITIONAL_SET_FLAG(srcval & (0x1 << bit), F_CF);
}
break;
case 1:
@@ -398,10 +406,11 @@ static void x86emuOp2_bt_R(u8 X86EMU_UNUSED(op2))
shiftreg = DECODE_RM_LONG_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
- CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
- } else {
+ disp = (s16) * shiftreg >> 5;
+ srcval = fetch_data_long(srcoffset + disp);
+ CONDITIONAL_SET_FLAG(srcval & (0x1 << bit), F_CF);
+ }
+ else {
u16 srcval;
u16 *shiftreg;
@@ -410,9 +419,9 @@ static void x86emuOp2_bt_R(u8 X86EMU_UNUSED(op2))
shiftreg = DECODE_RM_WORD_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
+ disp = (s16) * shiftreg >> 4;
+ srcval = fetch_data_word(srcoffset + disp);
+ CONDITIONAL_SET_FLAG(srcval & (0x1 << bit), F_CF);
}
break;
case 2:
@@ -425,10 +434,11 @@ static void x86emuOp2_bt_R(u8 X86EMU_UNUSED(op2))
shiftreg = DECODE_RM_LONG_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
- CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
- } else {
+ disp = (s16) * shiftreg >> 5;
+ srcval = fetch_data_long(srcoffset + disp);
+ CONDITIONAL_SET_FLAG(srcval & (0x1 << bit), F_CF);
+ }
+ else {
u16 srcval;
u16 *shiftreg;
@@ -437,30 +447,31 @@ static void x86emuOp2_bt_R(u8 X86EMU_UNUSED(op2))
shiftreg = DECODE_RM_WORD_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
+ disp = (s16) * shiftreg >> 4;
+ srcval = fetch_data_word(srcoffset + disp);
+ CONDITIONAL_SET_FLAG(srcval & (0x1 << bit), F_CF);
}
break;
- case 3: /* register to register */
+ case 3: /* register to register */
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg,*shiftreg;
+ u32 *srcreg, *shiftreg;
srcreg = DECODE_RM_LONG_REGISTER(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
- CONDITIONAL_SET_FLAG(*srcreg & (0x1 << bit),F_CF);
- } else {
- u16 *srcreg,*shiftreg;
+ CONDITIONAL_SET_FLAG(*srcreg & (0x1 << bit), F_CF);
+ }
+ else {
+ u16 *srcreg, *shiftreg;
srcreg = DECODE_RM_WORD_REGISTER(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0xF;
- CONDITIONAL_SET_FLAG(*srcreg & (0x1 << bit),F_CF);
+ CONDITIONAL_SET_FLAG(*srcreg & (0x1 << bit), F_CF);
}
break;
}
@@ -472,11 +483,12 @@ static void x86emuOp2_bt_R(u8 X86EMU_UNUSED(op2))
REMARKS:
Handles opcode 0x0f,0xa4
****************************************************************************/
-static void x86emuOp2_shld_IMM(u8 X86EMU_UNUSED(op2))
+static void
+x86emuOp2_shld_IMM(u8 X86EMU_UNUSED(op2))
{
int mod, rl, rh;
uint destoffset;
- u8 shift;
+ u8 shift;
START_OF_INSTR();
DECODE_PRINTF("SHLD\t");
@@ -495,9 +507,10 @@ static void x86emuOp2_shld_IMM(u8 X86EMU_UNUSED(op2))
DECODE_PRINTF2("%d\n", shift);
TRACE_AND_STEP();
destval = fetch_data_long(destoffset);
- destval = shld_long(destval,*shiftreg,shift);
+ destval = shld_long(destval, *shiftreg, shift);
store_data_long(destoffset, destval);
- } else {
+ }
+ else {
u16 destval;
u16 *shiftreg;
@@ -509,7 +522,7 @@ static void x86emuOp2_shld_IMM(u8 X86EMU_UNUSED(op2))
DECODE_PRINTF2("%d\n", shift);
TRACE_AND_STEP();
destval = fetch_data_word(destoffset);
- destval = shld_word(destval,*shiftreg,shift);
+ destval = shld_word(destval, *shiftreg, shift);
store_data_word(destoffset, destval);
}
break;
@@ -526,9 +539,10 @@ static void x86emuOp2_shld_IMM(u8 X86EMU_UNUSED(op2))
DECODE_PRINTF2("%d\n", shift);
TRACE_AND_STEP();
destval = fetch_data_long(destoffset);
- destval = shld_long(destval,*shiftreg,shift);
+ destval = shld_long(destval, *shiftreg, shift);
store_data_long(destoffset, destval);
- } else {
+ }
+ else {
u16 destval;
u16 *shiftreg;
@@ -540,7 +554,7 @@ static void x86emuOp2_shld_IMM(u8 X86EMU_UNUSED(op2))
DECODE_PRINTF2("%d\n", shift);
TRACE_AND_STEP();
destval = fetch_data_word(destoffset);
- destval = shld_word(destval,*shiftreg,shift);
+ destval = shld_word(destval, *shiftreg, shift);
store_data_word(destoffset, destval);
}
break;
@@ -557,9 +571,10 @@ static void x86emuOp2_shld_IMM(u8 X86EMU_UNUSED(op2))
DECODE_PRINTF2("%d\n", shift);
TRACE_AND_STEP();
destval = fetch_data_long(destoffset);
- destval = shld_long(destval,*shiftreg,shift);
+ destval = shld_long(destval, *shiftreg, shift);
store_data_long(destoffset, destval);
- } else {
+ }
+ else {
u16 destval;
u16 *shiftreg;
@@ -571,13 +586,13 @@ static void x86emuOp2_shld_IMM(u8 X86EMU_UNUSED(op2))
DECODE_PRINTF2("%d\n", shift);
TRACE_AND_STEP();
destval = fetch_data_word(destoffset);
- destval = shld_word(destval,*shiftreg,shift);
+ destval = shld_word(destval, *shiftreg, shift);
store_data_word(destoffset, destval);
}
break;
- case 3: /* register to register */
+ case 3: /* register to register */
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*shiftreg;
+ u32 *destreg, *shiftreg;
destreg = DECODE_RM_LONG_REGISTER(rl);
DECODE_PRINTF(",");
@@ -586,9 +601,10 @@ static void x86emuOp2_shld_IMM(u8 X86EMU_UNUSED(op2))
shift = fetch_byte_imm();
DECODE_PRINTF2("%d\n", shift);
TRACE_AND_STEP();
- *destreg = shld_long(*destreg,*shiftreg,shift);
- } else {
- u16 *destreg,*shiftreg;
+ *destreg = shld_long(*destreg, *shiftreg, shift);
+ }
+ else {
+ u16 *destreg, *shiftreg;
destreg = DECODE_RM_WORD_REGISTER(rl);
DECODE_PRINTF(",");
@@ -597,7 +613,7 @@ static void x86emuOp2_shld_IMM(u8 X86EMU_UNUSED(op2))
shift = fetch_byte_imm();
DECODE_PRINTF2("%d\n", shift);
TRACE_AND_STEP();
- *destreg = shld_word(*destreg,*shiftreg,shift);
+ *destreg = shld_word(*destreg, *shiftreg, shift);
}
break;
}
@@ -609,7 +625,8 @@ static void x86emuOp2_shld_IMM(u8 X86EMU_UNUSED(op2))
REMARKS:
Handles opcode 0x0f,0xa5
****************************************************************************/
-static void x86emuOp2_shld_CL(u8 X86EMU_UNUSED(op2))
+static void
+x86emuOp2_shld_CL(u8 X86EMU_UNUSED(op2))
{
int mod, rl, rh;
uint destoffset;
@@ -629,9 +646,10 @@ static void x86emuOp2_shld_CL(u8 X86EMU_UNUSED(op2))
DECODE_PRINTF(",CL\n");
TRACE_AND_STEP();
destval = fetch_data_long(destoffset);
- destval = shld_long(destval,*shiftreg,M.x86.R_CL);
+ destval = shld_long(destval, *shiftreg, M.x86.R_CL);
store_data_long(destoffset, destval);
- } else {
+ }
+ else {
u16 destval;
u16 *shiftreg;
@@ -641,7 +659,7 @@ static void x86emuOp2_shld_CL(u8 X86EMU_UNUSED(op2))
DECODE_PRINTF(",CL\n");
TRACE_AND_STEP();
destval = fetch_data_word(destoffset);
- destval = shld_word(destval,*shiftreg,M.x86.R_CL);
+ destval = shld_word(destval, *shiftreg, M.x86.R_CL);
store_data_word(destoffset, destval);
}
break;
@@ -656,9 +674,10 @@ static void x86emuOp2_shld_CL(u8 X86EMU_UNUSED(op2))
DECODE_PRINTF(",CL\n");
TRACE_AND_STEP();
destval = fetch_data_long(destoffset);
- destval = shld_long(destval,*shiftreg,M.x86.R_CL);
+ destval = shld_long(destval, *shiftreg, M.x86.R_CL);
store_data_long(destoffset, destval);
- } else {
+ }
+ else {
u16 destval;
u16 *shiftreg;
@@ -668,7 +687,7 @@ static void x86emuOp2_shld_CL(u8 X86EMU_UNUSED(op2))
DECODE_PRINTF(",CL\n");
TRACE_AND_STEP();
destval = fetch_data_word(destoffset);
- destval = shld_word(destval,*shiftreg,M.x86.R_CL);
+ destval = shld_word(destval, *shiftreg, M.x86.R_CL);
store_data_word(destoffset, destval);
}
break;
@@ -683,9 +702,10 @@ static void x86emuOp2_shld_CL(u8 X86EMU_UNUSED(op2))
DECODE_PRINTF(",CL\n");
TRACE_AND_STEP();
destval = fetch_data_long(destoffset);
- destval = shld_long(destval,*shiftreg,M.x86.R_CL);
+ destval = shld_long(destval, *shiftreg, M.x86.R_CL);
store_data_long(destoffset, destval);
- } else {
+ }
+ else {
u16 destval;
u16 *shiftreg;
@@ -695,29 +715,30 @@ static void x86emuOp2_shld_CL(u8 X86EMU_UNUSED(op2))
DECODE_PRINTF(",CL\n");
TRACE_AND_STEP();
destval = fetch_data_word(destoffset);
- destval = shld_word(destval,*shiftreg,M.x86.R_CL);
+ destval = shld_word(destval, *shiftreg, M.x86.R_CL);
store_data_word(destoffset, destval);
}
break;
- case 3: /* register to register */
+ case 3: /* register to register */
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*shiftreg;
+ u32 *destreg, *shiftreg;
destreg = DECODE_RM_LONG_REGISTER(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",CL\n");
TRACE_AND_STEP();
- *destreg = shld_long(*destreg,*shiftreg,M.x86.R_CL);
- } else {
- u16 *destreg,*shiftreg;
+ *destreg = shld_long(*destreg, *shiftreg, M.x86.R_CL);
+ }
+ else {
+ u16 *destreg, *shiftreg;
destreg = DECODE_RM_WORD_REGISTER(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",CL\n");
TRACE_AND_STEP();
- *destreg = shld_word(*destreg,*shiftreg,M.x86.R_CL);
+ *destreg = shld_word(*destreg, *shiftreg, M.x86.R_CL);
}
break;
}
@@ -729,7 +750,8 @@ static void x86emuOp2_shld_CL(u8 X86EMU_UNUSED(op2))
REMARKS:
Handles opcode 0x0f,0xa8
****************************************************************************/
-static void x86emuOp2_push_GS(u8 X86EMU_UNUSED(op2))
+static void
+x86emuOp2_push_GS(u8 X86EMU_UNUSED(op2))
{
START_OF_INSTR();
DECODE_PRINTF("PUSH\tGS\n");
@@ -743,7 +765,8 @@ static void x86emuOp2_push_GS(u8 X86EMU_UNUSED(op2))
REMARKS:
Handles opcode 0x0f,0xa9
****************************************************************************/
-static void x86emuOp2_pop_GS(u8 X86EMU_UNUSED(op2))
+static void
+x86emuOp2_pop_GS(u8 X86EMU_UNUSED(op2))
{
START_OF_INSTR();
DECODE_PRINTF("POP\tGS\n");
@@ -757,11 +780,12 @@ static void x86emuOp2_pop_GS(u8 X86EMU_UNUSED(op2))
REMARKS:
Handles opcode 0x0f,0xab
****************************************************************************/
-static void x86emuOp2_bts_R(u8 X86EMU_UNUSED(op2))
+static void
+x86emuOp2_bts_R(u8 X86EMU_UNUSED(op2))
{
int mod, rl, rh;
uint srcoffset;
- int bit,disp;
+ int bit, disp;
START_OF_INSTR();
DECODE_PRINTF("BTS\t");
@@ -769,7 +793,7 @@ static void x86emuOp2_bts_R(u8 X86EMU_UNUSED(op2))
switch (mod) {
case 0:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval,mask;
+ u32 srcval, mask;
u32 *shiftreg;
srcoffset = decode_rm00_address(rl);
@@ -777,13 +801,14 @@ static void x86emuOp2_bts_R(u8 X86EMU_UNUSED(op2))
shiftreg = DECODE_RM_LONG_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
+ disp = (s16) * shiftreg >> 5;
+ srcval = fetch_data_long(srcoffset + disp);
mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_long(srcoffset+disp, srcval | mask);
- } else {
- u16 srcval,mask;
+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
+ store_data_long(srcoffset + disp, srcval | mask);
+ }
+ else {
+ u16 srcval, mask;
u16 *shiftreg;
srcoffset = decode_rm00_address(rl);
@@ -791,16 +816,16 @@ static void x86emuOp2_bts_R(u8 X86EMU_UNUSED(op2))
shiftreg = DECODE_RM_WORD_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_word(srcoffset+disp, srcval | mask);
+ disp = (s16) * shiftreg >> 4;
+ srcval = fetch_data_word(srcoffset + disp);
+ mask = (u16) (0x1 << bit);
+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
+ store_data_word(srcoffset + disp, srcval | mask);
}
break;
case 1:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval,mask;
+ u32 srcval, mask;
u32 *shiftreg;
srcoffset = decode_rm01_address(rl);
@@ -808,13 +833,14 @@ static void x86emuOp2_bts_R(u8 X86EMU_UNUSED(op2))
shiftreg = DECODE_RM_LONG_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
+ disp = (s16) * shiftreg >> 5;
+ srcval = fetch_data_long(srcoffset + disp);
mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_long(srcoffset+disp, srcval | mask);
- } else {
- u16 srcval,mask;
+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
+ store_data_long(srcoffset + disp, srcval | mask);
+ }
+ else {
+ u16 srcval, mask;
u16 *shiftreg;
srcoffset = decode_rm01_address(rl);
@@ -822,16 +848,16 @@ static void x86emuOp2_bts_R(u8 X86EMU_UNUSED(op2))
shiftreg = DECODE_RM_WORD_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_word(srcoffset+disp, srcval | mask);
+ disp = (s16) * shiftreg >> 4;
+ srcval = fetch_data_word(srcoffset + disp);
+ mask = (u16) (0x1 << bit);
+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
+ store_data_word(srcoffset + disp, srcval | mask);
}
break;
case 2:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval,mask;
+ u32 srcval, mask;
u32 *shiftreg;
srcoffset = decode_rm10_address(rl);
@@ -839,51 +865,53 @@ static void x86emuOp2_bts_R(u8 X86EMU_UNUSED(op2))
shiftreg = DECODE_RM_LONG_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
+ disp = (s16) * shiftreg >> 5;
+ srcval = fetch_data_long(srcoffset + disp);
mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_long(srcoffset+disp, srcval | mask);
- } else {
- u16 srcval,mask;
+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
+ store_data_long(srcoffset + disp, srcval | mask);
+ }
+ else {
+ u16 srcval, mask;
u16 *shiftreg;
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_word(srcoffset+disp, srcval | mask);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg,*shiftreg;
- u32 mask;
-
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
- *srcreg |= mask;
- } else {
- u16 *srcreg,*shiftreg;
- u16 mask;
-
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
+ srcoffset = decode_rm10_address(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0xF;
+ disp = (s16) * shiftreg >> 4;
+ srcval = fetch_data_word(srcoffset + disp);
+ mask = (u16) (0x1 << bit);
+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
+ store_data_word(srcoffset + disp, srcval | mask);
+ }
+ break;
+ case 3: /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *srcreg, *shiftreg;
+ u32 mask;
+
+ srcreg = DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0x1F;
+ mask = (0x1 << bit);
+ CONDITIONAL_SET_FLAG(*srcreg & mask, F_CF);
+ *srcreg |= mask;
+ }
+ else {
+ u16 *srcreg, *shiftreg;
+ u16 mask;
+
+ srcreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0xF;
+ mask = (u16) (0x1 << bit);
+ CONDITIONAL_SET_FLAG(*srcreg & mask, F_CF);
*srcreg |= mask;
}
break;
@@ -896,11 +924,12 @@ static void x86emuOp2_bts_R(u8 X86EMU_UNUSED(op2))
REMARKS:
Handles opcode 0x0f,0xac
****************************************************************************/
-static void x86emuOp2_shrd_IMM(u8 X86EMU_UNUSED(op2))
+static void
+x86emuOp2_shrd_IMM(u8 X86EMU_UNUSED(op2))
{
int mod, rl, rh;
uint destoffset;
- u8 shift;
+ u8 shift;
START_OF_INSTR();
DECODE_PRINTF("SHLD\t");
@@ -919,9 +948,10 @@ static void x86emuOp2_shrd_IMM(u8 X86EMU_UNUSED(op2))
DECODE_PRINTF2("%d\n", shift);
TRACE_AND_STEP();
destval = fetch_data_long(destoffset);
- destval = shrd_long(destval,*shiftreg,shift);
+ destval = shrd_long(destval, *shiftreg, shift);
store_data_long(destoffset, destval);
- } else {
+ }
+ else {
u16 destval;
u16 *shiftreg;
@@ -933,7 +963,7 @@ static void x86emuOp2_shrd_IMM(u8 X86EMU_UNUSED(op2))
DECODE_PRINTF2("%d\n", shift);
TRACE_AND_STEP();
destval = fetch_data_word(destoffset);
- destval = shrd_word(destval,*shiftreg,shift);
+ destval = shrd_word(destval, *shiftreg, shift);
store_data_word(destoffset, destval);
}
break;
@@ -950,9 +980,10 @@ static void x86emuOp2_shrd_IMM(u8 X86EMU_UNUSED(op2))
DECODE_PRINTF2("%d\n", shift);
TRACE_AND_STEP();
destval = fetch_data_long(destoffset);
- destval = shrd_long(destval,*shiftreg,shift);
+ destval = shrd_long(destval, *shiftreg, shift);
store_data_long(destoffset, destval);
- } else {
+ }
+ else {
u16 destval;
u16 *shiftreg;
@@ -964,7 +995,7 @@ static void x86emuOp2_shrd_IMM(u8 X86EMU_UNUSED(op2))
DECODE_PRINTF2("%d\n", shift);
TRACE_AND_STEP();
destval = fetch_data_word(destoffset);
- destval = shrd_word(destval,*shiftreg,shift);
+ destval = shrd_word(destval, *shiftreg, shift);
store_data_word(destoffset, destval);
}
break;
@@ -981,9 +1012,10 @@ static void x86emuOp2_shrd_IMM(u8 X86EMU_UNUSED(op2))
DECODE_PRINTF2("%d\n", shift);
TRACE_AND_STEP();
destval = fetch_data_long(destoffset);
- destval = shrd_long(destval,*shiftreg,shift);
+ destval = shrd_long(destval, *shiftreg, shift);
store_data_long(destoffset, destval);
- } else {
+ }
+ else {
u16 destval;
u16 *shiftreg;
@@ -995,13 +1027,13 @@ static void x86emuOp2_shrd_IMM(u8 X86EMU_UNUSED(op2))
DECODE_PRINTF2("%d\n", shift);
TRACE_AND_STEP();
destval = fetch_data_word(destoffset);
- destval = shrd_word(destval,*shiftreg,shift);
+ destval = shrd_word(destval, *shiftreg, shift);
store_data_word(destoffset, destval);
}
break;
- case 3: /* register to register */
+ case 3: /* register to register */
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*shiftreg;
+ u32 *destreg, *shiftreg;
destreg = DECODE_RM_LONG_REGISTER(rl);
DECODE_PRINTF(",");
@@ -1010,9 +1042,10 @@ static void x86emuOp2_shrd_IMM(u8 X86EMU_UNUSED(op2))
shift = fetch_byte_imm();
DECODE_PRINTF2("%d\n", shift);
TRACE_AND_STEP();
- *destreg = shrd_long(*destreg,*shiftreg,shift);
- } else {
- u16 *destreg,*shiftreg;
+ *destreg = shrd_long(*destreg, *shiftreg, shift);
+ }
+ else {
+ u16 *destreg, *shiftreg;
destreg = DECODE_RM_WORD_REGISTER(rl);
DECODE_PRINTF(",");
@@ -1021,7 +1054,7 @@ static void x86emuOp2_shrd_IMM(u8 X86EMU_UNUSED(op2))
shift = fetch_byte_imm();
DECODE_PRINTF2("%d\n", shift);
TRACE_AND_STEP();
- *destreg = shrd_word(*destreg,*shiftreg,shift);
+ *destreg = shrd_word(*destreg, *shiftreg, shift);
}
break;
}
@@ -1033,7 +1066,8 @@ static void x86emuOp2_shrd_IMM(u8 X86EMU_UNUSED(op2))
REMARKS:
Handles opcode 0x0f,0xad
****************************************************************************/
-static void x86emuOp2_shrd_CL(u8 X86EMU_UNUSED(op2))
+static void
+x86emuOp2_shrd_CL(u8 X86EMU_UNUSED(op2))
{
int mod, rl, rh;
uint destoffset;
@@ -1053,9 +1087,10 @@ static void x86emuOp2_shrd_CL(u8 X86EMU_UNUSED(op2))
DECODE_PRINTF(",CL\n");
TRACE_AND_STEP();
destval = fetch_data_long(destoffset);
- destval = shrd_long(destval,*shiftreg,M.x86.R_CL);
+ destval = shrd_long(destval, *shiftreg, M.x86.R_CL);
store_data_long(destoffset, destval);
- } else {
+ }
+ else {
u16 destval;
u16 *shiftreg;
@@ -1065,7 +1100,7 @@ static void x86emuOp2_shrd_CL(u8 X86EMU_UNUSED(op2))
DECODE_PRINTF(",CL\n");
TRACE_AND_STEP();
destval = fetch_data_word(destoffset);
- destval = shrd_word(destval,*shiftreg,M.x86.R_CL);
+ destval = shrd_word(destval, *shiftreg, M.x86.R_CL);
store_data_word(destoffset, destval);
}
break;
@@ -1080,9 +1115,10 @@ static void x86emuOp2_shrd_CL(u8 X86EMU_UNUSED(op2))
DECODE_PRINTF(",CL\n");
TRACE_AND_STEP();
destval = fetch_data_long(destoffset);
- destval = shrd_long(destval,*shiftreg,M.x86.R_CL);
+ destval = shrd_long(destval, *shiftreg, M.x86.R_CL);
store_data_long(destoffset, destval);
- } else {
+ }
+ else {
u16 destval;
u16 *shiftreg;
@@ -1092,7 +1128,7 @@ static void x86emuOp2_shrd_CL(u8 X86EMU_UNUSED(op2))
DECODE_PRINTF(",CL\n");
TRACE_AND_STEP();
destval = fetch_data_word(destoffset);
- destval = shrd_word(destval,*shiftreg,M.x86.R_CL);
+ destval = shrd_word(destval, *shiftreg, M.x86.R_CL);
store_data_word(destoffset, destval);
}
break;
@@ -1107,9 +1143,10 @@ static void x86emuOp2_shrd_CL(u8 X86EMU_UNUSED(op2))
DECODE_PRINTF(",CL\n");
TRACE_AND_STEP();
destval = fetch_data_long(destoffset);
- destval = shrd_long(destval,*shiftreg,M.x86.R_CL);
+ destval = shrd_long(destval, *shiftreg, M.x86.R_CL);
store_data_long(destoffset, destval);
- } else {
+ }
+ else {
u16 destval;
u16 *shiftreg;
@@ -1119,29 +1156,30 @@ static void x86emuOp2_shrd_CL(u8 X86EMU_UNUSED(op2))
DECODE_PRINTF(",CL\n");
TRACE_AND_STEP();
destval = fetch_data_word(destoffset);
- destval = shrd_word(destval,*shiftreg,M.x86.R_CL);
+ destval = shrd_word(destval, *shiftreg, M.x86.R_CL);
store_data_word(destoffset, destval);
}
break;
- case 3: /* register to register */
+ case 3: /* register to register */
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*shiftreg;
+ u32 *destreg, *shiftreg;
destreg = DECODE_RM_LONG_REGISTER(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",CL\n");
TRACE_AND_STEP();
- *destreg = shrd_long(*destreg,*shiftreg,M.x86.R_CL);
- } else {
- u16 *destreg,*shiftreg;
+ *destreg = shrd_long(*destreg, *shiftreg, M.x86.R_CL);
+ }
+ else {
+ u16 *destreg, *shiftreg;
destreg = DECODE_RM_WORD_REGISTER(rl);
DECODE_PRINTF(",");
shiftreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",CL\n");
TRACE_AND_STEP();
- *destreg = shrd_word(*destreg,*shiftreg,M.x86.R_CL);
+ *destreg = shrd_word(*destreg, *shiftreg, M.x86.R_CL);
}
break;
}
@@ -1153,7 +1191,8 @@ static void x86emuOp2_shrd_CL(u8 X86EMU_UNUSED(op2))
REMARKS:
Handles opcode 0x0f,0xaf
****************************************************************************/
-static void x86emuOp2_imul_R_RM(u8 X86EMU_UNUSED(op2))
+static void
+x86emuOp2_imul_R_RM(u8 X86EMU_UNUSED(op2))
{
int mod, rl, rh;
uint srcoffset;
@@ -1166,23 +1205,25 @@ static void x86emuOp2_imul_R_RM(u8 X86EMU_UNUSED(op2))
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 *destreg;
u32 srcval;
- u32 res_lo,res_hi;
+ u32 res_lo, res_hi;
destreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm00_address(rl);
srcval = fetch_data_long(srcoffset);
TRACE_AND_STEP();
- imul_long_direct(&res_lo,&res_hi,(s32)*destreg,(s32)srcval);
+ imul_long_direct(&res_lo, &res_hi, (s32) * destreg, (s32) srcval);
if (res_hi != 0) {
SET_FLAG(F_CF);
SET_FLAG(F_OF);
- } else {
+ }
+ else {
CLEAR_FLAG(F_CF);
CLEAR_FLAG(F_OF);
}
- *destreg = (u32)res_lo;
- } else {
+ *destreg = (u32) res_lo;
+ }
+ else {
u16 *destreg;
u16 srcval;
u32 res;
@@ -1192,38 +1233,41 @@ static void x86emuOp2_imul_R_RM(u8 X86EMU_UNUSED(op2))
srcoffset = decode_rm00_address(rl);
srcval = fetch_data_word(srcoffset);
TRACE_AND_STEP();
- res = (s16)*destreg * (s16)srcval;
+ res = (s16) * destreg * (s16) srcval;
if (res > 0xFFFF) {
SET_FLAG(F_CF);
SET_FLAG(F_OF);
- } else {
+ }
+ else {
CLEAR_FLAG(F_CF);
CLEAR_FLAG(F_OF);
}
- *destreg = (u16)res;
+ *destreg = (u16) res;
}
break;
case 1:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 *destreg;
u32 srcval;
- u32 res_lo,res_hi;
+ u32 res_lo, res_hi;
destreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm01_address(rl);
srcval = fetch_data_long(srcoffset);
TRACE_AND_STEP();
- imul_long_direct(&res_lo,&res_hi,(s32)*destreg,(s32)srcval);
+ imul_long_direct(&res_lo, &res_hi, (s32) * destreg, (s32) srcval);
if (res_hi != 0) {
SET_FLAG(F_CF);
SET_FLAG(F_OF);
- } else {
+ }
+ else {
CLEAR_FLAG(F_CF);
CLEAR_FLAG(F_OF);
}
- *destreg = (u32)res_lo;
- } else {
+ *destreg = (u32) res_lo;
+ }
+ else {
u16 *destreg;
u16 srcval;
u32 res;
@@ -1233,38 +1277,41 @@ static void x86emuOp2_imul_R_RM(u8 X86EMU_UNUSED(op2))
srcoffset = decode_rm01_address(rl);
srcval = fetch_data_word(srcoffset);
TRACE_AND_STEP();
- res = (s16)*destreg * (s16)srcval;
+ res = (s16) * destreg * (s16) srcval;
if (res > 0xFFFF) {
SET_FLAG(F_CF);
SET_FLAG(F_OF);
- } else {
+ }
+ else {
CLEAR_FLAG(F_CF);
CLEAR_FLAG(F_OF);
}
- *destreg = (u16)res;
+ *destreg = (u16) res;
}
break;
case 2:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 *destreg;
u32 srcval;
- u32 res_lo,res_hi;
+ u32 res_lo, res_hi;
destreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm10_address(rl);
srcval = fetch_data_long(srcoffset);
TRACE_AND_STEP();
- imul_long_direct(&res_lo,&res_hi,(s32)*destreg,(s32)srcval);
+ imul_long_direct(&res_lo, &res_hi, (s32) * destreg, (s32) srcval);
if (res_hi != 0) {
SET_FLAG(F_CF);
SET_FLAG(F_OF);
- } else {
+ }
+ else {
CLEAR_FLAG(F_CF);
CLEAR_FLAG(F_OF);
}
- *destreg = (u32)res_lo;
- } else {
+ *destreg = (u32) res_lo;
+ }
+ else {
u16 *destreg;
u16 srcval;
u32 res;
@@ -1274,51 +1321,55 @@ static void x86emuOp2_imul_R_RM(u8 X86EMU_UNUSED(op2))
srcoffset = decode_rm10_address(rl);
srcval = fetch_data_word(srcoffset);
TRACE_AND_STEP();
- res = (s16)*destreg * (s16)srcval;
+ res = (s16) * destreg * (s16) srcval;
if (res > 0xFFFF) {
SET_FLAG(F_CF);
SET_FLAG(F_OF);
- } else {
+ }
+ else {
CLEAR_FLAG(F_CF);
CLEAR_FLAG(F_OF);
}
- *destreg = (u16)res;
+ *destreg = (u16) res;
}
break;
- case 3: /* register to register */
+ case 3: /* register to register */
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
- u32 res_lo,res_hi;
+ u32 *destreg, *srcreg;
+ u32 res_lo, res_hi;
destreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
srcreg = DECODE_RM_LONG_REGISTER(rl);
TRACE_AND_STEP();
- imul_long_direct(&res_lo,&res_hi,(s32)*destreg,(s32)*srcreg);
+ imul_long_direct(&res_lo, &res_hi, (s32) * destreg, (s32) * srcreg);
if (res_hi != 0) {
SET_FLAG(F_CF);
SET_FLAG(F_OF);
- } else {
+ }
+ else {
CLEAR_FLAG(F_CF);
CLEAR_FLAG(F_OF);
}
- *destreg = (u32)res_lo;
- } else {
- u16 *destreg,*srcreg;
+ *destreg = (u32) res_lo;
+ }
+ else {
+ u16 *destreg, *srcreg;
u32 res;
destreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",");
srcreg = DECODE_RM_WORD_REGISTER(rl);
- res = (s16)*destreg * (s16)*srcreg;
+ res = (s16) * destreg * (s16) * srcreg;
if (res > 0xFFFF) {
SET_FLAG(F_CF);
SET_FLAG(F_OF);
- } else {
+ }
+ else {
CLEAR_FLAG(F_CF);
CLEAR_FLAG(F_OF);
}
- *destreg = (u16)res;
+ *destreg = (u16) res;
}
break;
}
@@ -1330,9 +1381,10 @@ static void x86emuOp2_imul_R_RM(u8 X86EMU_UNUSED(op2))
REMARKS:
Handles opcode 0x0f,0xb2
****************************************************************************/
-static void x86emuOp2_lss_R_IMM(u8 X86EMU_UNUSED(op2))
+static void
+x86emuOp2_lss_R_IMM(u8 X86EMU_UNUSED(op2))
{
- int mod, rh, rl;
+ int mod, rh, rl;
u16 *dstreg;
uint srcoffset;
@@ -1367,7 +1419,7 @@ static void x86emuOp2_lss_R_IMM(u8 X86EMU_UNUSED(op2))
*dstreg = fetch_data_word(srcoffset);
M.x86.R_SS = fetch_data_word(srcoffset + 2);
break;
- case 3: /* register to register */
+ case 3: /* register to register */
/* UNDEFINED! */
TRACE_AND_STEP();
}
@@ -1379,148 +1431,154 @@ static void x86emuOp2_lss_R_IMM(u8 X86EMU_UNUSED(op2))
REMARKS:
Handles opcode 0x0f,0xb3
****************************************************************************/
-static void x86emuOp2_btr_R(u8 X86EMU_UNUSED(op2))
+static void
+x86emuOp2_btr_R(u8 X86EMU_UNUSED(op2))
{
- int mod, rl, rh;
- uint srcoffset;
- int bit,disp;
-
- START_OF_INSTR();
- DECODE_PRINTF("BTR\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval,mask;
- u32 *shiftreg;
-
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_long(srcoffset+disp, srcval & ~mask);
- } else {
- u16 srcval,mask;
- u16 *shiftreg;
-
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_word(srcoffset+disp, (u16)(srcval & ~mask));
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval,mask;
- u32 *shiftreg;
-
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_long(srcoffset+disp, srcval & ~mask);
- } else {
- u16 srcval,mask;
- u16 *shiftreg;
-
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_word(srcoffset+disp, (u16)(srcval & ~mask));
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval,mask;
- u32 *shiftreg;
-
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_long(srcoffset+disp, srcval & ~mask);
- } else {
- u16 srcval,mask;
- u16 *shiftreg;
-
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_word(srcoffset+disp, (u16)(srcval & ~mask));
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg,*shiftreg;
- u32 mask;
-
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
- *srcreg &= ~mask;
- } else {
- u16 *srcreg,*shiftreg;
- u16 mask;
-
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
- *srcreg &= ~mask;
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
+ int mod, rl, rh;
+ uint srcoffset;
+ int bit, disp;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("BTR\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ switch (mod) {
+ case 0:
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 srcval, mask;
+ u32 *shiftreg;
+
+ srcoffset = decode_rm00_address(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0x1F;
+ disp = (s16) * shiftreg >> 5;
+ srcval = fetch_data_long(srcoffset + disp);
+ mask = (0x1 << bit);
+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
+ store_data_long(srcoffset + disp, srcval & ~mask);
+ }
+ else {
+ u16 srcval, mask;
+ u16 *shiftreg;
+
+ srcoffset = decode_rm00_address(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0xF;
+ disp = (s16) * shiftreg >> 4;
+ srcval = fetch_data_word(srcoffset + disp);
+ mask = (u16) (0x1 << bit);
+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
+ store_data_word(srcoffset + disp, (u16) (srcval & ~mask));
+ }
+ break;
+ case 1:
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 srcval, mask;
+ u32 *shiftreg;
+
+ srcoffset = decode_rm01_address(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0x1F;
+ disp = (s16) * shiftreg >> 5;
+ srcval = fetch_data_long(srcoffset + disp);
+ mask = (0x1 << bit);
+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
+ store_data_long(srcoffset + disp, srcval & ~mask);
+ }
+ else {
+ u16 srcval, mask;
+ u16 *shiftreg;
+
+ srcoffset = decode_rm01_address(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0xF;
+ disp = (s16) * shiftreg >> 4;
+ srcval = fetch_data_word(srcoffset + disp);
+ mask = (u16) (0x1 << bit);
+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
+ store_data_word(srcoffset + disp, (u16) (srcval & ~mask));
+ }
+ break;
+ case 2:
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 srcval, mask;
+ u32 *shiftreg;
+
+ srcoffset = decode_rm10_address(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0x1F;
+ disp = (s16) * shiftreg >> 5;
+ srcval = fetch_data_long(srcoffset + disp);
+ mask = (0x1 << bit);
+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
+ store_data_long(srcoffset + disp, srcval & ~mask);
+ }
+ else {
+ u16 srcval, mask;
+ u16 *shiftreg;
+
+ srcoffset = decode_rm10_address(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0xF;
+ disp = (s16) * shiftreg >> 4;
+ srcval = fetch_data_word(srcoffset + disp);
+ mask = (u16) (0x1 << bit);
+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
+ store_data_word(srcoffset + disp, (u16) (srcval & ~mask));
+ }
+ break;
+ case 3: /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *srcreg, *shiftreg;
+ u32 mask;
+
+ srcreg = DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0x1F;
+ mask = (0x1 << bit);
+ CONDITIONAL_SET_FLAG(*srcreg & mask, F_CF);
+ *srcreg &= ~mask;
+ }
+ else {
+ u16 *srcreg, *shiftreg;
+ u16 mask;
+
+ srcreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0xF;
+ mask = (u16) (0x1 << bit);
+ CONDITIONAL_SET_FLAG(*srcreg & mask, F_CF);
+ *srcreg &= ~mask;
+ }
+ break;
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
}
/****************************************************************************
REMARKS:
Handles opcode 0x0f,0xb4
****************************************************************************/
-static void x86emuOp2_lfs_R_IMM(u8 X86EMU_UNUSED(op2))
+static void
+x86emuOp2_lfs_R_IMM(u8 X86EMU_UNUSED(op2))
{
- int mod, rh, rl;
+ int mod, rh, rl;
u16 *dstreg;
uint srcoffset;
@@ -1555,7 +1613,7 @@ static void x86emuOp2_lfs_R_IMM(u8 X86EMU_UNUSED(op2))
*dstreg = fetch_data_word(srcoffset);
M.x86.R_FS = fetch_data_word(srcoffset + 2);
break;
- case 3: /* register to register */
+ case 3: /* register to register */
/* UNDEFINED! */
TRACE_AND_STEP();
}
@@ -1567,9 +1625,10 @@ static void x86emuOp2_lfs_R_IMM(u8 X86EMU_UNUSED(op2))
REMARKS:
Handles opcode 0x0f,0xb5
****************************************************************************/
-static void x86emuOp2_lgs_R_IMM(u8 X86EMU_UNUSED(op2))
+static void
+x86emuOp2_lgs_R_IMM(u8 X86EMU_UNUSED(op2))
{
- int mod, rh, rl;
+ int mod, rh, rl;
u16 *dstreg;
uint srcoffset;
@@ -1604,7 +1663,7 @@ static void x86emuOp2_lgs_R_IMM(u8 X86EMU_UNUSED(op2))
*dstreg = fetch_data_word(srcoffset);
M.x86.R_GS = fetch_data_word(srcoffset + 2);
break;
- case 3: /* register to register */
+ case 3: /* register to register */
/* UNDEFINED! */
TRACE_AND_STEP();
}
@@ -1616,7 +1675,8 @@ static void x86emuOp2_lgs_R_IMM(u8 X86EMU_UNUSED(op2))
REMARKS:
Handles opcode 0x0f,0xb6
****************************************************************************/
-static void x86emuOp2_movzx_byte_R_RM(u8 X86EMU_UNUSED(op2))
+static void
+x86emuOp2_movzx_byte_R_RM(u8 X86EMU_UNUSED(op2))
{
int mod, rl, rh;
uint srcoffset;
@@ -1637,7 +1697,8 @@ static void x86emuOp2_movzx_byte_R_RM(u8 X86EMU_UNUSED(op2))
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*destreg = srcval;
- } else {
+ }
+ else {
u16 *destreg;
u16 srcval;
@@ -1662,7 +1723,8 @@ static void x86emuOp2_movzx_byte_R_RM(u8 X86EMU_UNUSED(op2))
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*destreg = srcval;
- } else {
+ }
+ else {
u16 *destreg;
u16 srcval;
@@ -1687,7 +1749,8 @@ static void x86emuOp2_movzx_byte_R_RM(u8 X86EMU_UNUSED(op2))
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*destreg = srcval;
- } else {
+ }
+ else {
u16 *destreg;
u16 srcval;
@@ -1700,10 +1763,10 @@ static void x86emuOp2_movzx_byte_R_RM(u8 X86EMU_UNUSED(op2))
*destreg = srcval;
}
break;
- case 3: /* register to register */
+ case 3: /* register to register */
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 *destreg;
- u8 *srcreg;
+ u8 *srcreg;
destreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
@@ -1711,9 +1774,10 @@ static void x86emuOp2_movzx_byte_R_RM(u8 X86EMU_UNUSED(op2))
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*destreg = *srcreg;
- } else {
+ }
+ else {
u16 *destreg;
- u8 *srcreg;
+ u8 *srcreg;
destreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",");
@@ -1732,7 +1796,8 @@ static void x86emuOp2_movzx_byte_R_RM(u8 X86EMU_UNUSED(op2))
REMARKS:
Handles opcode 0x0f,0xb7
****************************************************************************/
-static void x86emuOp2_movzx_word_R_RM(u8 X86EMU_UNUSED(op2))
+static void
+x86emuOp2_movzx_word_R_RM(u8 X86EMU_UNUSED(op2))
{
int mod, rl, rh;
uint srcoffset;
@@ -1771,7 +1836,7 @@ static void x86emuOp2_movzx_word_R_RM(u8 X86EMU_UNUSED(op2))
TRACE_AND_STEP();
*destreg = srcval;
break;
- case 3: /* register to register */
+ case 3: /* register to register */
destreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
srcreg = DECODE_RM_WORD_REGISTER(rl);
@@ -1788,7 +1853,8 @@ static void x86emuOp2_movzx_word_R_RM(u8 X86EMU_UNUSED(op2))
REMARKS:
Handles opcode 0x0f,0xba
****************************************************************************/
-static void x86emuOp2_btX_I(u8 X86EMU_UNUSED(op2))
+static void
+x86emuOp2_btX_I(u8 X86EMU_UNUSED(op2))
{
int mod, rl, rh;
uint srcoffset;
@@ -1798,23 +1864,23 @@ static void x86emuOp2_btX_I(u8 X86EMU_UNUSED(op2))
FETCH_DECODE_MODRM(mod, rh, rl);
switch (rh) {
case 4:
- DECODE_PRINTF("BT\t");
- break;
+ DECODE_PRINTF("BT\t");
+ break;
case 5:
- DECODE_PRINTF("BTS\t");
- break;
+ DECODE_PRINTF("BTS\t");
+ break;
case 6:
- DECODE_PRINTF("BTR\t");
- break;
+ DECODE_PRINTF("BTR\t");
+ break;
case 7:
- DECODE_PRINTF("BTC\t");
- break;
+ DECODE_PRINTF("BTC\t");
+ break;
default:
- DECODE_PRINTF("ILLEGAL EXTENDED X86 OPCODE\n");
- TRACE_REGS();
- printk("%04x:%04x: %02X%02X ILLEGAL EXTENDED X86 OPCODE EXTENSION!\n",
- M.x86.R_CS, M.x86.R_IP-3,op2, (mod<<6)|(rh<<3)|rl);
- HALT_SYS();
+ DECODE_PRINTF("ILLEGAL EXTENDED X86 OPCODE\n");
+ TRACE_REGS();
+ printk("%04x:%04x: %02X%02X ILLEGAL EXTENDED X86 OPCODE EXTENSION!\n",
+ M.x86.R_CS, M.x86.R_IP - 3, op2, (mod << 6) | (rh << 3) | rl);
+ HALT_SYS();
}
switch (mod) {
case 0:
@@ -1828,22 +1894,23 @@ static void x86emuOp2_btX_I(u8 X86EMU_UNUSED(op2))
TRACE_AND_STEP();
bit = shift & 0x1F;
srcval = fetch_data_long(srcoffset);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- switch (rh) {
- case 5:
- store_data_long(srcoffset, srcval | mask);
- break;
- case 6:
- store_data_long(srcoffset, srcval & ~mask);
- break;
- case 7:
- store_data_long(srcoffset, srcval ^ mask);
- break;
- default:
- break;
- }
- } else {
+ mask = (0x1 << bit);
+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
+ switch (rh) {
+ case 5:
+ store_data_long(srcoffset, srcval | mask);
+ break;
+ case 6:
+ store_data_long(srcoffset, srcval & ~mask);
+ break;
+ case 7:
+ store_data_long(srcoffset, srcval ^ mask);
+ break;
+ default:
+ break;
+ }
+ }
+ else {
u16 srcval, mask;
u8 shift;
@@ -1853,21 +1920,21 @@ static void x86emuOp2_btX_I(u8 X86EMU_UNUSED(op2))
TRACE_AND_STEP();
bit = shift & 0xF;
srcval = fetch_data_word(srcoffset);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- switch (rh) {
- case 5:
- store_data_word(srcoffset, srcval | mask);
- break;
- case 6:
- store_data_word(srcoffset, srcval & ~mask);
- break;
- case 7:
- store_data_word(srcoffset, srcval ^ mask);
- break;
- default:
- break;
- }
+ mask = (0x1 << bit);
+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
+ switch (rh) {
+ case 5:
+ store_data_word(srcoffset, srcval | mask);
+ break;
+ case 6:
+ store_data_word(srcoffset, srcval & ~mask);
+ break;
+ case 7:
+ store_data_word(srcoffset, srcval ^ mask);
+ break;
+ default:
+ break;
+ }
}
break;
case 1:
@@ -1881,22 +1948,23 @@ static void x86emuOp2_btX_I(u8 X86EMU_UNUSED(op2))
TRACE_AND_STEP();
bit = shift & 0x1F;
srcval = fetch_data_long(srcoffset);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- switch (rh) {
- case 5:
- store_data_long(srcoffset, srcval | mask);
- break;
- case 6:
- store_data_long(srcoffset, srcval & ~mask);
- break;
- case 7:
- store_data_long(srcoffset, srcval ^ mask);
- break;
- default:
- break;
- }
- } else {
+ mask = (0x1 << bit);
+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
+ switch (rh) {
+ case 5:
+ store_data_long(srcoffset, srcval | mask);
+ break;
+ case 6:
+ store_data_long(srcoffset, srcval & ~mask);
+ break;
+ case 7:
+ store_data_long(srcoffset, srcval ^ mask);
+ break;
+ default:
+ break;
+ }
+ }
+ else {
u16 srcval, mask;
u8 shift;
@@ -1906,21 +1974,21 @@ static void x86emuOp2_btX_I(u8 X86EMU_UNUSED(op2))
TRACE_AND_STEP();
bit = shift & 0xF;
srcval = fetch_data_word(srcoffset);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- switch (rh) {
- case 5:
- store_data_word(srcoffset, srcval | mask);
- break;
- case 6:
- store_data_word(srcoffset, srcval & ~mask);
- break;
- case 7:
- store_data_word(srcoffset, srcval ^ mask);
- break;
- default:
- break;
- }
+ mask = (0x1 << bit);
+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
+ switch (rh) {
+ case 5:
+ store_data_word(srcoffset, srcval | mask);
+ break;
+ case 6:
+ store_data_word(srcoffset, srcval & ~mask);
+ break;
+ case 7:
+ store_data_word(srcoffset, srcval ^ mask);
+ break;
+ default:
+ break;
+ }
}
break;
case 2:
@@ -1934,22 +2002,23 @@ static void x86emuOp2_btX_I(u8 X86EMU_UNUSED(op2))
TRACE_AND_STEP();
bit = shift & 0x1F;
srcval = fetch_data_long(srcoffset);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- switch (rh) {
- case 5:
- store_data_long(srcoffset, srcval | mask);
- break;
- case 6:
- store_data_long(srcoffset, srcval & ~mask);
- break;
- case 7:
- store_data_long(srcoffset, srcval ^ mask);
- break;
- default:
- break;
- }
- } else {
+ mask = (0x1 << bit);
+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
+ switch (rh) {
+ case 5:
+ store_data_long(srcoffset, srcval | mask);
+ break;
+ case 6:
+ store_data_long(srcoffset, srcval & ~mask);
+ break;
+ case 7:
+ store_data_long(srcoffset, srcval ^ mask);
+ break;
+ default:
+ break;
+ }
+ }
+ else {
u16 srcval, mask;
u8 shift;
@@ -1959,74 +2028,75 @@ static void x86emuOp2_btX_I(u8 X86EMU_UNUSED(op2))
TRACE_AND_STEP();
bit = shift & 0xF;
srcval = fetch_data_word(srcoffset);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- switch (rh) {
- case 5:
- store_data_word(srcoffset, srcval | mask);
- break;
- case 6:
- store_data_word(srcoffset, srcval & ~mask);
- break;
- case 7:
- store_data_word(srcoffset, srcval ^ mask);
- break;
- default:
- break;
- }
- }
- break;
- case 3: /* register to register */
+ mask = (0x1 << bit);
+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
+ switch (rh) {
+ case 5:
+ store_data_word(srcoffset, srcval | mask);
+ break;
+ case 6:
+ store_data_word(srcoffset, srcval & ~mask);
+ break;
+ case 7:
+ store_data_word(srcoffset, srcval ^ mask);
+ break;
+ default:
+ break;
+ }
+ }
+ break;
+ case 3: /* register to register */
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 *srcreg;
- u32 mask;
- u8 shift;
+ u32 mask;
+ u8 shift;
srcreg = DECODE_RM_LONG_REGISTER(rl);
DECODE_PRINTF(",");
shift = fetch_byte_imm();
TRACE_AND_STEP();
bit = shift & 0x1F;
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
- switch (rh) {
- case 5:
- *srcreg |= mask;
- break;
- case 6:
- *srcreg &= ~mask;
- break;
- case 7:
- *srcreg ^= mask;
- break;
- default:
- break;
- }
- } else {
+ mask = (0x1 << bit);
+ CONDITIONAL_SET_FLAG(*srcreg & mask, F_CF);
+ switch (rh) {
+ case 5:
+ *srcreg |= mask;
+ break;
+ case 6:
+ *srcreg &= ~mask;
+ break;
+ case 7:
+ *srcreg ^= mask;
+ break;
+ default:
+ break;
+ }
+ }
+ else {
u16 *srcreg;
- u16 mask;
- u8 shift;
+ u16 mask;
+ u8 shift;
srcreg = DECODE_RM_WORD_REGISTER(rl);
DECODE_PRINTF(",");
shift = fetch_byte_imm();
TRACE_AND_STEP();
bit = shift & 0xF;
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
- switch (rh) {
- case 5:
- *srcreg |= mask;
- break;
- case 6:
- *srcreg &= ~mask;
- break;
- case 7:
- *srcreg ^= mask;
- break;
- default:
- break;
- }
+ mask = (0x1 << bit);
+ CONDITIONAL_SET_FLAG(*srcreg & mask, F_CF);
+ switch (rh) {
+ case 5:
+ *srcreg |= mask;
+ break;
+ case 6:
+ *srcreg &= ~mask;
+ break;
+ case 7:
+ *srcreg ^= mask;
+ break;
+ default:
+ break;
+ }
}
break;
}
@@ -2038,11 +2108,12 @@ static void x86emuOp2_btX_I(u8 X86EMU_UNUSED(op2))
REMARKS:
Handles opcode 0x0f,0xbb
****************************************************************************/
-static void x86emuOp2_btc_R(u8 X86EMU_UNUSED(op2))
+static void
+x86emuOp2_btc_R(u8 X86EMU_UNUSED(op2))
{
int mod, rl, rh;
uint srcoffset;
- int bit,disp;
+ int bit, disp;
START_OF_INSTR();
DECODE_PRINTF("BTC\t");
@@ -2050,7 +2121,7 @@ static void x86emuOp2_btc_R(u8 X86EMU_UNUSED(op2))
switch (mod) {
case 0:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval,mask;
+ u32 srcval, mask;
u32 *shiftreg;
srcoffset = decode_rm00_address(rl);
@@ -2058,13 +2129,14 @@ static void x86emuOp2_btc_R(u8 X86EMU_UNUSED(op2))
shiftreg = DECODE_RM_LONG_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
+ disp = (s16) * shiftreg >> 5;
+ srcval = fetch_data_long(srcoffset + disp);
mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_long(srcoffset+disp, srcval ^ mask);
- } else {
- u16 srcval,mask;
+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
+ store_data_long(srcoffset + disp, srcval ^ mask);
+ }
+ else {
+ u16 srcval, mask;
u16 *shiftreg;
srcoffset = decode_rm00_address(rl);
@@ -2072,16 +2144,16 @@ static void x86emuOp2_btc_R(u8 X86EMU_UNUSED(op2))
shiftreg = DECODE_RM_WORD_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_word(srcoffset+disp, (u16)(srcval ^ mask));
+ disp = (s16) * shiftreg >> 4;
+ srcval = fetch_data_word(srcoffset + disp);
+ mask = (u16) (0x1 << bit);
+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
+ store_data_word(srcoffset + disp, (u16) (srcval ^ mask));
}
break;
case 1:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval,mask;
+ u32 srcval, mask;
u32 *shiftreg;
srcoffset = decode_rm01_address(rl);
@@ -2089,13 +2161,14 @@ static void x86emuOp2_btc_R(u8 X86EMU_UNUSED(op2))
shiftreg = DECODE_RM_LONG_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
+ disp = (s16) * shiftreg >> 5;
+ srcval = fetch_data_long(srcoffset + disp);
mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_long(srcoffset+disp, srcval ^ mask);
- } else {
- u16 srcval,mask;
+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
+ store_data_long(srcoffset + disp, srcval ^ mask);
+ }
+ else {
+ u16 srcval, mask;
u16 *shiftreg;
srcoffset = decode_rm01_address(rl);
@@ -2103,16 +2176,16 @@ static void x86emuOp2_btc_R(u8 X86EMU_UNUSED(op2))
shiftreg = DECODE_RM_WORD_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_word(srcoffset+disp, (u16)(srcval ^ mask));
+ disp = (s16) * shiftreg >> 4;
+ srcval = fetch_data_word(srcoffset + disp);
+ mask = (u16) (0x1 << bit);
+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
+ store_data_word(srcoffset + disp, (u16) (srcval ^ mask));
}
break;
case 2:
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval,mask;
+ u32 srcval, mask;
u32 *shiftreg;
srcoffset = decode_rm10_address(rl);
@@ -2120,13 +2193,14 @@ static void x86emuOp2_btc_R(u8 X86EMU_UNUSED(op2))
shiftreg = DECODE_RM_LONG_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
+ disp = (s16) * shiftreg >> 5;
+ srcval = fetch_data_long(srcoffset + disp);
mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_long(srcoffset+disp, srcval ^ mask);
- } else {
- u16 srcval,mask;
+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
+ store_data_long(srcoffset + disp, srcval ^ mask);
+ }
+ else {
+ u16 srcval, mask;
u16 *shiftreg;
srcoffset = decode_rm10_address(rl);
@@ -2134,16 +2208,16 @@ static void x86emuOp2_btc_R(u8 X86EMU_UNUSED(op2))
shiftreg = DECODE_RM_WORD_REGISTER(rh);
TRACE_AND_STEP();
bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_word(srcoffset+disp, (u16)(srcval ^ mask));
+ disp = (s16) * shiftreg >> 4;
+ srcval = fetch_data_word(srcoffset + disp);
+ mask = (u16) (0x1 << bit);
+ CONDITIONAL_SET_FLAG(srcval & mask, F_CF);
+ store_data_word(srcoffset + disp, (u16) (srcval ^ mask));
}
break;
- case 3: /* register to register */
+ case 3: /* register to register */
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg,*shiftreg;
+ u32 *srcreg, *shiftreg;
u32 mask;
srcreg = DECODE_RM_LONG_REGISTER(rl);
@@ -2152,19 +2226,20 @@ static void x86emuOp2_btc_R(u8 X86EMU_UNUSED(op2))
TRACE_AND_STEP();
bit = *shiftreg & 0x1F;
mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
- *srcreg ^= mask;
- } else {
- u16 *srcreg,*shiftreg;
- u16 mask;
-
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
+ CONDITIONAL_SET_FLAG(*srcreg & mask, F_CF);
+ *srcreg ^= mask;
+ }
+ else {
+ u16 *srcreg, *shiftreg;
+ u16 mask;
+
+ srcreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0xF;
+ mask = (u16) (0x1 << bit);
+ CONDITIONAL_SET_FLAG(*srcreg & mask, F_CF);
*srcreg ^= mask;
}
break;
@@ -2177,7 +2252,8 @@ static void x86emuOp2_btc_R(u8 X86EMU_UNUSED(op2))
REMARKS:
Handles opcode 0x0f,0xbc
****************************************************************************/
-static void x86emuOp2_bsf(u8 X86EMU_UNUSED(op2))
+static void
+x86emuOp2_bsf(u8 X86EMU_UNUSED(op2))
{
int mod, rl, rh;
uint srcoffset;
@@ -2185,105 +2261,117 @@ static void x86emuOp2_bsf(u8 X86EMU_UNUSED(op2))
START_OF_INSTR();
DECODE_PRINTF("BSF\t");
FETCH_DECODE_MODRM(mod, rh, rl);
- switch(mod) {
+ switch (mod) {
case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval, *dstreg;
-
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_long(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 0; *dstreg < 32; (*dstreg)++)
- if ((srcval >> *dstreg) & 1) break;
- } else {
- u16 srcval, *dstreg;
-
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_word(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 0; *dstreg < 16; (*dstreg)++)
- if ((srcval >> *dstreg) & 1) break;
- }
- break;
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 srcval, *dstreg;
+
+ srcoffset = decode_rm00_address(rl);
+ DECODE_PRINTF(",");
+ dstreg = DECODE_RM_LONG_REGISTER(rh);
+ TRACE_AND_STEP();
+ srcval = fetch_data_long(srcoffset);
+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
+ for (*dstreg = 0; *dstreg < 32; (*dstreg)++)
+ if ((srcval >> *dstreg) & 1)
+ break;
+ }
+ else {
+ u16 srcval, *dstreg;
+
+ srcoffset = decode_rm00_address(rl);
+ DECODE_PRINTF(",");
+ dstreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ srcval = fetch_data_word(srcoffset);
+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
+ for (*dstreg = 0; *dstreg < 16; (*dstreg)++)
+ if ((srcval >> *dstreg) & 1)
+ break;
+ }
+ break;
case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval, *dstreg;
-
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_long(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 0; *dstreg < 32; (*dstreg)++)
- if ((srcval >> *dstreg) & 1) break;
- } else {
- u16 srcval, *dstreg;
-
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_word(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 0; *dstreg < 16; (*dstreg)++)
- if ((srcval >> *dstreg) & 1) break;
- }
- break;
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 srcval, *dstreg;
+
+ srcoffset = decode_rm01_address(rl);
+ DECODE_PRINTF(",");
+ dstreg = DECODE_RM_LONG_REGISTER(rh);
+ TRACE_AND_STEP();
+ srcval = fetch_data_long(srcoffset);
+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
+ for (*dstreg = 0; *dstreg < 32; (*dstreg)++)
+ if ((srcval >> *dstreg) & 1)
+ break;
+ }
+ else {
+ u16 srcval, *dstreg;
+
+ srcoffset = decode_rm01_address(rl);
+ DECODE_PRINTF(",");
+ dstreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ srcval = fetch_data_word(srcoffset);
+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
+ for (*dstreg = 0; *dstreg < 16; (*dstreg)++)
+ if ((srcval >> *dstreg) & 1)
+ break;
+ }
+ break;
case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval, *dstreg;
-
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_long(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 0; *dstreg < 32; (*dstreg)++)
- if ((srcval >> *dstreg) & 1) break;
- } else {
- u16 srcval, *dstreg;
-
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_word(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 0; *dstreg < 16; (*dstreg)++)
- if ((srcval >> *dstreg) & 1) break;
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval, *dstreg;
-
- srcval = *DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 0; *dstreg < 32; (*dstreg)++)
- if ((srcval >> *dstreg) & 1) break;
- } else {
- u16 srcval, *dstreg;
-
- srcval = *DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 0; *dstreg < 16; (*dstreg)++)
- if ((srcval >> *dstreg) & 1) break;
- }
- break;
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 srcval, *dstreg;
+
+ srcoffset = decode_rm10_address(rl);
+ DECODE_PRINTF(",");
+ dstreg = DECODE_RM_LONG_REGISTER(rh);
+ TRACE_AND_STEP();
+ srcval = fetch_data_long(srcoffset);
+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
+ for (*dstreg = 0; *dstreg < 32; (*dstreg)++)
+ if ((srcval >> *dstreg) & 1)
+ break;
+ }
+ else {
+ u16 srcval, *dstreg;
+
+ srcoffset = decode_rm10_address(rl);
+ DECODE_PRINTF(",");
+ dstreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ srcval = fetch_data_word(srcoffset);
+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
+ for (*dstreg = 0; *dstreg < 16; (*dstreg)++)
+ if ((srcval >> *dstreg) & 1)
+ break;
+ }
+ break;
+ case 3: /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 srcval, *dstreg;
+
+ srcval = *DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF(",");
+ dstreg = DECODE_RM_LONG_REGISTER(rh);
+ TRACE_AND_STEP();
+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
+ for (*dstreg = 0; *dstreg < 32; (*dstreg)++)
+ if ((srcval >> *dstreg) & 1)
+ break;
+ }
+ else {
+ u16 srcval, *dstreg;
+
+ srcval = *DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF(",");
+ dstreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
+ for (*dstreg = 0; *dstreg < 16; (*dstreg)++)
+ if ((srcval >> *dstreg) & 1)
+ break;
+ }
+ break;
}
DECODE_CLEAR_SEGOVR();
END_OF_INSTR();
@@ -2293,7 +2381,8 @@ static void x86emuOp2_bsf(u8 X86EMU_UNUSED(op2))
REMARKS:
Handles opcode 0x0f,0xbd
****************************************************************************/
-static void x86emuOp2_bsr(u8 X86EMU_UNUSED(op2))
+static void
+x86emuOp2_bsr(u8 X86EMU_UNUSED(op2))
{
int mod, rl, rh;
uint srcoffset;
@@ -2301,105 +2390,117 @@ static void x86emuOp2_bsr(u8 X86EMU_UNUSED(op2))
START_OF_INSTR();
DECODE_PRINTF("BSR\t");
FETCH_DECODE_MODRM(mod, rh, rl);
- switch(mod) {
+ switch (mod) {
case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval, *dstreg;
-
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_long(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 31; *dstreg > 0; (*dstreg)--)
- if ((srcval >> *dstreg) & 1) break;
- } else {
- u16 srcval, *dstreg;
-
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_word(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 15; *dstreg > 0; (*dstreg)--)
- if ((srcval >> *dstreg) & 1) break;
- }
- break;
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 srcval, *dstreg;
+
+ srcoffset = decode_rm00_address(rl);
+ DECODE_PRINTF(",");
+ dstreg = DECODE_RM_LONG_REGISTER(rh);
+ TRACE_AND_STEP();
+ srcval = fetch_data_long(srcoffset);
+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
+ for (*dstreg = 31; *dstreg > 0; (*dstreg)--)
+ if ((srcval >> *dstreg) & 1)
+ break;
+ }
+ else {
+ u16 srcval, *dstreg;
+
+ srcoffset = decode_rm00_address(rl);
+ DECODE_PRINTF(",");
+ dstreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ srcval = fetch_data_word(srcoffset);
+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
+ for (*dstreg = 15; *dstreg > 0; (*dstreg)--)
+ if ((srcval >> *dstreg) & 1)
+ break;
+ }
+ break;
case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval, *dstreg;
-
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_long(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 31; *dstreg > 0; (*dstreg)--)
- if ((srcval >> *dstreg) & 1) break;
- } else {
- u16 srcval, *dstreg;
-
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_word(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 15; *dstreg > 0; (*dstreg)--)
- if ((srcval >> *dstreg) & 1) break;
- }
- break;
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 srcval, *dstreg;
+
+ srcoffset = decode_rm01_address(rl);
+ DECODE_PRINTF(",");
+ dstreg = DECODE_RM_LONG_REGISTER(rh);
+ TRACE_AND_STEP();
+ srcval = fetch_data_long(srcoffset);
+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
+ for (*dstreg = 31; *dstreg > 0; (*dstreg)--)
+ if ((srcval >> *dstreg) & 1)
+ break;
+ }
+ else {
+ u16 srcval, *dstreg;
+
+ srcoffset = decode_rm01_address(rl);
+ DECODE_PRINTF(",");
+ dstreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ srcval = fetch_data_word(srcoffset);
+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
+ for (*dstreg = 15; *dstreg > 0; (*dstreg)--)
+ if ((srcval >> *dstreg) & 1)
+ break;
+ }
+ break;
case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval, *dstreg;
-
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_long(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 31; *dstreg > 0; (*dstreg)--)
- if ((srcval >> *dstreg) & 1) break;
- } else {
- u16 srcval, *dstreg;
-
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_word(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 15; *dstreg > 0; (*dstreg)--)
- if ((srcval >> *dstreg) & 1) break;
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval, *dstreg;
-
- srcval = *DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 31; *dstreg > 0; (*dstreg)--)
- if ((srcval >> *dstreg) & 1) break;
- } else {
- u16 srcval, *dstreg;
-
- srcval = *DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 15; *dstreg > 0; (*dstreg)--)
- if ((srcval >> *dstreg) & 1) break;
- }
- break;
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 srcval, *dstreg;
+
+ srcoffset = decode_rm10_address(rl);
+ DECODE_PRINTF(",");
+ dstreg = DECODE_RM_LONG_REGISTER(rh);
+ TRACE_AND_STEP();
+ srcval = fetch_data_long(srcoffset);
+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
+ for (*dstreg = 31; *dstreg > 0; (*dstreg)--)
+ if ((srcval >> *dstreg) & 1)
+ break;
+ }
+ else {
+ u16 srcval, *dstreg;
+
+ srcoffset = decode_rm10_address(rl);
+ DECODE_PRINTF(",");
+ dstreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ srcval = fetch_data_word(srcoffset);
+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
+ for (*dstreg = 15; *dstreg > 0; (*dstreg)--)
+ if ((srcval >> *dstreg) & 1)
+ break;
+ }
+ break;
+ case 3: /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 srcval, *dstreg;
+
+ srcval = *DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF(",");
+ dstreg = DECODE_RM_LONG_REGISTER(rh);
+ TRACE_AND_STEP();
+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
+ for (*dstreg = 31; *dstreg > 0; (*dstreg)--)
+ if ((srcval >> *dstreg) & 1)
+ break;
+ }
+ else {
+ u16 srcval, *dstreg;
+
+ srcval = *DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF(",");
+ dstreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
+ for (*dstreg = 15; *dstreg > 0; (*dstreg)--)
+ if ((srcval >> *dstreg) & 1)
+ break;
+ }
+ break;
}
DECODE_CLEAR_SEGOVR();
END_OF_INSTR();
@@ -2409,7 +2510,8 @@ static void x86emuOp2_bsr(u8 X86EMU_UNUSED(op2))
REMARKS:
Handles opcode 0x0f,0xbe
****************************************************************************/
-static void x86emuOp2_movsx_byte_R_RM(u8 X86EMU_UNUSED(op2))
+static void
+x86emuOp2_movsx_byte_R_RM(u8 X86EMU_UNUSED(op2))
{
int mod, rl, rh;
uint srcoffset;
@@ -2426,18 +2528,19 @@ static void x86emuOp2_movsx_byte_R_RM(u8 X86EMU_UNUSED(op2))
destreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm00_address(rl);
- srcval = (s32)((s8)fetch_data_byte(srcoffset));
+ srcval = (s32) ((s8) fetch_data_byte(srcoffset));
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*destreg = srcval;
- } else {
+ }
+ else {
u16 *destreg;
u16 srcval;
destreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm00_address(rl);
- srcval = (s16)((s8)fetch_data_byte(srcoffset));
+ srcval = (s16) ((s8) fetch_data_byte(srcoffset));
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*destreg = srcval;
@@ -2451,18 +2554,19 @@ static void x86emuOp2_movsx_byte_R_RM(u8 X86EMU_UNUSED(op2))
destreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm01_address(rl);
- srcval = (s32)((s8)fetch_data_byte(srcoffset));
+ srcval = (s32) ((s8) fetch_data_byte(srcoffset));
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*destreg = srcval;
- } else {
+ }
+ else {
u16 *destreg;
u16 srcval;
destreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm01_address(rl);
- srcval = (s16)((s8)fetch_data_byte(srcoffset));
+ srcval = (s16) ((s8) fetch_data_byte(srcoffset));
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*destreg = srcval;
@@ -2476,44 +2580,46 @@ static void x86emuOp2_movsx_byte_R_RM(u8 X86EMU_UNUSED(op2))
destreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm10_address(rl);
- srcval = (s32)((s8)fetch_data_byte(srcoffset));
+ srcval = (s32) ((s8) fetch_data_byte(srcoffset));
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*destreg = srcval;
- } else {
+ }
+ else {
u16 *destreg;
u16 srcval;
destreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm10_address(rl);
- srcval = (s16)((s8)fetch_data_byte(srcoffset));
+ srcval = (s16) ((s8) fetch_data_byte(srcoffset));
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*destreg = srcval;
}
break;
- case 3: /* register to register */
+ case 3: /* register to register */
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 *destreg;
- u8 *srcreg;
+ u8 *srcreg;
destreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
srcreg = DECODE_RM_BYTE_REGISTER(rl);
DECODE_PRINTF("\n");
TRACE_AND_STEP();
- *destreg = (s32)((s8)*srcreg);
- } else {
+ *destreg = (s32) ((s8) * srcreg);
+ }
+ else {
u16 *destreg;
- u8 *srcreg;
+ u8 *srcreg;
destreg = DECODE_RM_WORD_REGISTER(rh);
DECODE_PRINTF(",");
srcreg = DECODE_RM_BYTE_REGISTER(rl);
DECODE_PRINTF("\n");
TRACE_AND_STEP();
- *destreg = (s16)((s8)*srcreg);
+ *destreg = (s16) ((s8) * srcreg);
}
break;
}
@@ -2525,7 +2631,8 @@ static void x86emuOp2_movsx_byte_R_RM(u8 X86EMU_UNUSED(op2))
REMARKS:
Handles opcode 0x0f,0xbf
****************************************************************************/
-static void x86emuOp2_movsx_word_R_RM(u8 X86EMU_UNUSED(op2))
+static void
+x86emuOp2_movsx_word_R_RM(u8 X86EMU_UNUSED(op2))
{
int mod, rl, rh;
uint srcoffset;
@@ -2541,7 +2648,7 @@ static void x86emuOp2_movsx_word_R_RM(u8 X86EMU_UNUSED(op2))
destreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm00_address(rl);
- srcval = (s32)((s16)fetch_data_word(srcoffset));
+ srcval = (s32) ((s16) fetch_data_word(srcoffset));
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*destreg = srcval;
@@ -2550,7 +2657,7 @@ static void x86emuOp2_movsx_word_R_RM(u8 X86EMU_UNUSED(op2))
destreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm01_address(rl);
- srcval = (s32)((s16)fetch_data_word(srcoffset));
+ srcval = (s32) ((s16) fetch_data_word(srcoffset));
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*destreg = srcval;
@@ -2559,18 +2666,18 @@ static void x86emuOp2_movsx_word_R_RM(u8 X86EMU_UNUSED(op2))
destreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
srcoffset = decode_rm10_address(rl);
- srcval = (s32)((s16)fetch_data_word(srcoffset));
+ srcval = (s32) ((s16) fetch_data_word(srcoffset));
DECODE_PRINTF("\n");
TRACE_AND_STEP();
*destreg = srcval;
break;
- case 3: /* register to register */
+ case 3: /* register to register */
destreg = DECODE_RM_LONG_REGISTER(rh);
DECODE_PRINTF(",");
srcreg = DECODE_RM_WORD_REGISTER(rl);
DECODE_PRINTF("\n");
TRACE_AND_STEP();
- *destreg = (s32)((s16)*srcreg);
+ *destreg = (s32) ((s16) * srcreg);
break;
}
DECODE_CLEAR_SEGOVR();
@@ -2578,40 +2685,41 @@ static void x86emuOp2_movsx_word_R_RM(u8 X86EMU_UNUSED(op2))
}
/* Handles opcodes 0xc8-0xcf */
-static void x86emuOp2_bswap(u8 X86EMU_UNUSED(op2))
+static void
+x86emuOp2_bswap(u8 X86EMU_UNUSED(op2))
{
START_OF_INSTR();
DECODE_PRINTF("BSWAP\n");
TRACE_AND_STEP();
switch (op2) {
- case 0xc8:
- M.x86.R_EAX = bswap_32(M.x86.R_EAX);
- break;
- case 0xc9:
- M.x86.R_ECX = bswap_32(M.x86.R_ECX);
- break;
- case 0xca:
- M.x86.R_EDX = bswap_32(M.x86.R_EDX);
- break;
- case 0xcb:
- M.x86.R_EBX = bswap_32(M.x86.R_EBX);
- break;
- case 0xcc:
- M.x86.R_ESP = bswap_32(M.x86.R_ESP);
- break;
- case 0xcd:
- M.x86.R_EBP = bswap_32(M.x86.R_EBP);
- break;
- case 0xce:
- M.x86.R_ESI = bswap_32(M.x86.R_ESI);
- break;
- case 0xcf:
- M.x86.R_EDI = bswap_32(M.x86.R_EDI);
- break;
- default:
- /* can't happen */
- break;
+ case 0xc8:
+ M.x86.R_EAX = bswap_32(M.x86.R_EAX);
+ break;
+ case 0xc9:
+ M.x86.R_ECX = bswap_32(M.x86.R_ECX);
+ break;
+ case 0xca:
+ M.x86.R_EDX = bswap_32(M.x86.R_EDX);
+ break;
+ case 0xcb:
+ M.x86.R_EBX = bswap_32(M.x86.R_EBX);
+ break;
+ case 0xcc:
+ M.x86.R_ESP = bswap_32(M.x86.R_ESP);
+ break;
+ case 0xcd:
+ M.x86.R_EBP = bswap_32(M.x86.R_EBP);
+ break;
+ case 0xce:
+ M.x86.R_ESI = bswap_32(M.x86.R_ESI);
+ break;
+ case 0xcf:
+ M.x86.R_EDI = bswap_32(M.x86.R_EDI);
+ break;
+ default:
+ /* can't happen */
+ break;
}
DECODE_CLEAR_SEGOVR();
@@ -2621,25 +2729,32 @@ static void x86emuOp2_bswap(u8 X86EMU_UNUSED(op2))
/***************************************************************************
* Double byte operation code table:
**************************************************************************/
-void (*x86emu_optab2[256])(u8) =
-{
-/* 0x00 */ x86emuOp2_illegal_op, /* Group F (ring 0 PM) */
-/* 0x01 */ x86emuOp2_illegal_op, /* Group G (ring 0 PM) */
-/* 0x02 */ x86emuOp2_illegal_op, /* lar (ring 0 PM) */
-/* 0x03 */ x86emuOp2_illegal_op, /* lsl (ring 0 PM) */
+void (*x86emu_optab2[256]) (u8) = {
+ /* 0x00 */ x86emuOp2_illegal_op,
+ /* Group F (ring 0 PM) */
+ /* 0x01 */ x86emuOp2_illegal_op,
+ /* Group G (ring 0 PM) */
+ /* 0x02 */ x86emuOp2_illegal_op,
+ /* lar (ring 0 PM) */
+ /* 0x03 */ x86emuOp2_illegal_op,
+ /* lsl (ring 0 PM) */
/* 0x04 */ x86emuOp2_illegal_op,
-/* 0x05 */ x86emuOp2_illegal_op, /* loadall (undocumented) */
-/* 0x06 */ x86emuOp2_illegal_op, /* clts (ring 0 PM) */
-/* 0x07 */ x86emuOp2_illegal_op, /* loadall (undocumented) */
-/* 0x08 */ x86emuOp2_illegal_op, /* invd (ring 0 PM) */
-/* 0x09 */ x86emuOp2_illegal_op, /* wbinvd (ring 0 PM) */
+ /* 0x05 */ x86emuOp2_illegal_op,
+ /* loadall (undocumented) */
+ /* 0x06 */ x86emuOp2_illegal_op,
+ /* clts (ring 0 PM) */
+ /* 0x07 */ x86emuOp2_illegal_op,
+ /* loadall (undocumented) */
+ /* 0x08 */ x86emuOp2_illegal_op,
+ /* invd (ring 0 PM) */
+ /* 0x09 */ x86emuOp2_illegal_op,
+ /* wbinvd (ring 0 PM) */
/* 0x0a */ x86emuOp2_illegal_op,
/* 0x0b */ x86emuOp2_illegal_op,
/* 0x0c */ x86emuOp2_illegal_op,
/* 0x0d */ x86emuOp2_illegal_op,
/* 0x0e */ x86emuOp2_illegal_op,
/* 0x0f */ x86emuOp2_illegal_op,
-
/* 0x10 */ x86emuOp2_illegal_op,
/* 0x11 */ x86emuOp2_illegal_op,
/* 0x12 */ x86emuOp2_illegal_op,
@@ -2656,14 +2771,19 @@ void (*x86emu_optab2[256])(u8) =
/* 0x1d */ x86emuOp2_illegal_op,
/* 0x1e */ x86emuOp2_illegal_op,
/* 0x1f */ x86emuOp2_illegal_op,
-
-/* 0x20 */ x86emuOp2_illegal_op, /* mov reg32,creg (ring 0 PM) */
-/* 0x21 */ x86emuOp2_illegal_op, /* mov reg32,dreg (ring 0 PM) */
-/* 0x22 */ x86emuOp2_illegal_op, /* mov creg,reg32 (ring 0 PM) */
-/* 0x23 */ x86emuOp2_illegal_op, /* mov dreg,reg32 (ring 0 PM) */
-/* 0x24 */ x86emuOp2_illegal_op, /* mov reg32,treg (ring 0 PM) */
+ /* 0x20 */ x86emuOp2_illegal_op,
+ /* mov reg32,creg (ring 0 PM) */
+ /* 0x21 */ x86emuOp2_illegal_op,
+ /* mov reg32,dreg (ring 0 PM) */
+ /* 0x22 */ x86emuOp2_illegal_op,
+ /* mov creg,reg32 (ring 0 PM) */
+ /* 0x23 */ x86emuOp2_illegal_op,
+ /* mov dreg,reg32 (ring 0 PM) */
+ /* 0x24 */ x86emuOp2_illegal_op,
+ /* mov reg32,treg (ring 0 PM) */
/* 0x25 */ x86emuOp2_illegal_op,
-/* 0x26 */ x86emuOp2_illegal_op, /* mov treg,reg32 (ring 0 PM) */
+ /* 0x26 */ x86emuOp2_illegal_op,
+ /* mov treg,reg32 (ring 0 PM) */
/* 0x27 */ x86emuOp2_illegal_op,
/* 0x28 */ x86emuOp2_illegal_op,
/* 0x29 */ x86emuOp2_illegal_op,
@@ -2673,7 +2793,6 @@ void (*x86emu_optab2[256])(u8) =
/* 0x2d */ x86emuOp2_illegal_op,
/* 0x2e */ x86emuOp2_illegal_op,
/* 0x2f */ x86emuOp2_illegal_op,
-
/* 0x30 */ x86emuOp2_illegal_op,
/* 0x31 */ x86emuOp2_rdtsc,
/* 0x32 */ x86emuOp2_illegal_op,
@@ -2690,7 +2809,6 @@ void (*x86emu_optab2[256])(u8) =
/* 0x3d */ x86emuOp2_illegal_op,
/* 0x3e */ x86emuOp2_illegal_op,
/* 0x3f */ x86emuOp2_illegal_op,
-
/* 0x40 */ x86emuOp2_illegal_op,
/* 0x41 */ x86emuOp2_illegal_op,
/* 0x42 */ x86emuOp2_illegal_op,
@@ -2707,7 +2825,6 @@ void (*x86emu_optab2[256])(u8) =
/* 0x4d */ x86emuOp2_illegal_op,
/* 0x4e */ x86emuOp2_illegal_op,
/* 0x4f */ x86emuOp2_illegal_op,
-
/* 0x50 */ x86emuOp2_illegal_op,
/* 0x51 */ x86emuOp2_illegal_op,
/* 0x52 */ x86emuOp2_illegal_op,
@@ -2724,7 +2841,6 @@ void (*x86emu_optab2[256])(u8) =
/* 0x5d */ x86emuOp2_illegal_op,
/* 0x5e */ x86emuOp2_illegal_op,
/* 0x5f */ x86emuOp2_illegal_op,
-
/* 0x60 */ x86emuOp2_illegal_op,
/* 0x61 */ x86emuOp2_illegal_op,
/* 0x62 */ x86emuOp2_illegal_op,
@@ -2741,7 +2857,6 @@ void (*x86emu_optab2[256])(u8) =
/* 0x6d */ x86emuOp2_illegal_op,
/* 0x6e */ x86emuOp2_illegal_op,
/* 0x6f */ x86emuOp2_illegal_op,
-
/* 0x70 */ x86emuOp2_illegal_op,
/* 0x71 */ x86emuOp2_illegal_op,
/* 0x72 */ x86emuOp2_illegal_op,
@@ -2758,7 +2873,6 @@ void (*x86emu_optab2[256])(u8) =
/* 0x7d */ x86emuOp2_illegal_op,
/* 0x7e */ x86emuOp2_illegal_op,
/* 0x7f */ x86emuOp2_illegal_op,
-
/* 0x80 */ x86emuOp2_long_jump,
/* 0x81 */ x86emuOp2_long_jump,
/* 0x82 */ x86emuOp2_long_jump,
@@ -2775,7 +2889,6 @@ void (*x86emu_optab2[256])(u8) =
/* 0x8d */ x86emuOp2_long_jump,
/* 0x8e */ x86emuOp2_long_jump,
/* 0x8f */ x86emuOp2_long_jump,
-
/* 0x90 */ x86emuOp2_set_byte,
/* 0x91 */ x86emuOp2_set_byte,
/* 0x92 */ x86emuOp2_set_byte,
@@ -2792,7 +2905,6 @@ void (*x86emu_optab2[256])(u8) =
/* 0x9d */ x86emuOp2_set_byte,
/* 0x9e */ x86emuOp2_set_byte,
/* 0x9f */ x86emuOp2_set_byte,
-
/* 0xa0 */ x86emuOp2_push_FS,
/* 0xa1 */ x86emuOp2_pop_FS,
/* 0xa2 */ x86emuOp2_cpuid,
@@ -2809,9 +2921,10 @@ void (*x86emu_optab2[256])(u8) =
/* 0xad */ x86emuOp2_shrd_CL,
/* 0xae */ x86emuOp2_illegal_op,
/* 0xaf */ x86emuOp2_imul_R_RM,
-
-/* 0xb0 */ x86emuOp2_illegal_op, /* TODO: cmpxchg */
-/* 0xb1 */ x86emuOp2_illegal_op, /* TODO: cmpxchg */
+ /* 0xb0 */ x86emuOp2_illegal_op,
+ /* TODO: cmpxchg */
+ /* 0xb1 */ x86emuOp2_illegal_op,
+ /* TODO: cmpxchg */
/* 0xb2 */ x86emuOp2_lss_R_IMM,
/* 0xb3 */ x86emuOp2_btr_R,
/* 0xb4 */ x86emuOp2_lfs_R_IMM,
@@ -2826,9 +2939,10 @@ void (*x86emu_optab2[256])(u8) =
/* 0xbd */ x86emuOp2_bsr,
/* 0xbe */ x86emuOp2_movsx_byte_R_RM,
/* 0xbf */ x86emuOp2_movsx_word_R_RM,
-
-/* 0xc0 */ x86emuOp2_illegal_op, /* TODO: xadd */
-/* 0xc1 */ x86emuOp2_illegal_op, /* TODO: xadd */
+ /* 0xc0 */ x86emuOp2_illegal_op,
+ /* TODO: xadd */
+ /* 0xc1 */ x86emuOp2_illegal_op,
+ /* TODO: xadd */
/* 0xc2 */ x86emuOp2_illegal_op,
/* 0xc3 */ x86emuOp2_illegal_op,
/* 0xc4 */ x86emuOp2_illegal_op,
@@ -2843,7 +2957,6 @@ void (*x86emu_optab2[256])(u8) =
/* 0xcd */ x86emuOp2_bswap,
/* 0xce */ x86emuOp2_bswap,
/* 0xcf */ x86emuOp2_bswap,
-
/* 0xd0 */ x86emuOp2_illegal_op,
/* 0xd1 */ x86emuOp2_illegal_op,
/* 0xd2 */ x86emuOp2_illegal_op,
@@ -2860,7 +2973,6 @@ void (*x86emu_optab2[256])(u8) =
/* 0xdd */ x86emuOp2_illegal_op,
/* 0xde */ x86emuOp2_illegal_op,
/* 0xdf */ x86emuOp2_illegal_op,
-
/* 0xe0 */ x86emuOp2_illegal_op,
/* 0xe1 */ x86emuOp2_illegal_op,
/* 0xe2 */ x86emuOp2_illegal_op,
@@ -2877,7 +2989,6 @@ void (*x86emu_optab2[256])(u8) =
/* 0xed */ x86emuOp2_illegal_op,
/* 0xee */ x86emuOp2_illegal_op,
/* 0xef */ x86emuOp2_illegal_op,
-
/* 0xf0 */ x86emuOp2_illegal_op,
/* 0xf1 */ x86emuOp2_illegal_op,
/* 0xf2 */ x86emuOp2_illegal_op,