xserver xkbcomp libxcb pixman git update 24/9/2010

21 files changed, 2707 insertions, 2390 deletions

diff --git a/xorg-server/hw/xfree86/common/compiler.h b/xorg-server/hw/xfree86/common/compiler.h
index ded71ee22..4cbe47c98 100644
--- a/xorg-server/hw/xfree86/common/compiler.h
+++ b/xorg-server/hw/xfree86/common/compiler.h
@@ -1,1376 +1,1786 @@
-/*
- * Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany.
- *
- * Permission to use, copy, modify, distribute, and sell this software and its
- * documentation for any purpose is hereby granted without fee, provided that
- * the above copyright notice appear in all copies and that both that
- * copyright notice and this permission notice appear in supporting
- * documentation, and that the name of Thomas Roell not be used in
- * advertising or publicity pertaining to distribution of the software without
- * specific, written prior permission.  Thomas Roell makes no representations
- * about the suitability of this software for any purpose.  It is provided
- * "as is" without express or implied warranty.
- *
- * THOMAS ROELL DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
- * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
- * EVENT SHALL THOMAS ROELL BE LIABLE FOR ANY SPECIAL, INDIRECT OR
- * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
- * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
- * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
- * PERFORMANCE OF THIS SOFTWARE.
- *
- */
-/*
- * Copyright (c) 1994-2003 by The XFree86 Project, Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Except as contained in this notice, the name of the copyright holder(s)
- * and author(s) shall not be used in advertising or otherwise to promote
- * the sale, use or other dealings in this Software without prior written
- * authorization from the copyright holder(s) and author(s).
- */
-
-#ifndef _COMPILER_H
-
-# define _COMPILER_H
-
-#if defined(__SUNPRO_C)
-# define DO_PROTOTYPES
-#endif
-
-/* Map Sun compiler platform defines to gcc-style used in the code */
-#if defined(__amd64) && !defined(__amd64__)
-# define __amd64__
-#endif
-#if defined(__i386) && !defined(__i386__)
-# define __i386__
-#endif
-#if defined(__sparc) && !defined(__sparc__)
-# define __sparc__
-#endif
-#if defined(__sparcv9) && !defined(__sparc64__)
-# define __sparc64__
-#endif
-
-#ifndef _X_EXPORT
-# include <X11/Xfuncproto.h>
-#endif
-
-# include <pixman.h> /* for uint*_t types */
-
-/* Allow drivers to use the GCC-supported __inline__ and/or __inline. */
-# ifndef __inline__
-#  if defined(__GNUC__)
-    /* gcc has __inline__ */
-#  elif defined(__HIGHC__)
-#   define __inline__ _Inline
-#  else
-#   define __inline__ /**/
-#  endif
-# endif /* __inline__ */
-# ifndef __inline
-#  if defined(__GNUC__)
-    /* gcc has __inline */
-#  elif defined(__HIGHC__)
-#   define __inline _Inline
-#  else
-#   define __inline /**/
-#  endif
-# endif /* __inline */
-
-/* Support gcc's __FUNCTION__ for people using other compilers */
-#if !defined(__GNUC__) && !defined(__FUNCTION__)
-# define __FUNCTION__ __func__ /* C99 */
-#endif
-
-# if defined(NO_INLINE) || defined(DO_PROTOTYPES)
-
-#  if !defined(__arm__)
-#   if !defined(__sparc__) && !defined(__sparc) && !defined(__arm32__) \
-      && !(defined(__alpha__) && defined(linux)) \
-      && !(defined(__ia64__) && defined(linux)) \
-
-extern _X_EXPORT void outb(unsigned short, unsigned char);
-extern _X_EXPORT void outw(unsigned short, unsigned short);
-extern _X_EXPORT void outl(unsigned short, unsigned int);
-extern _X_EXPORT unsigned int inb(unsigned short);
-extern _X_EXPORT unsigned int inw(unsigned short);
-extern _X_EXPORT unsigned int inl(unsigned short);
-
-#   else /* __sparc__,  __arm32__, __alpha__*/
-
-extern _X_EXPORT void outb(unsigned long, unsigned char);
-extern _X_EXPORT void outw(unsigned long, unsigned short);
-extern _X_EXPORT void outl(unsigned long, unsigned int);
-extern _X_EXPORT unsigned int inb(unsigned long);
-extern _X_EXPORT unsigned int inw(unsigned long);
-extern _X_EXPORT unsigned int inl(unsigned long);
-
-#   endif /* __sparc__,  __arm32__, __alpha__ */
-#  endif /* __arm__ */
-
-#  if defined(__powerpc__) && !defined(__OpenBSD__)
-extern unsigned long ldq_u(unsigned long *);
-extern unsigned long ldl_u(unsigned int *);
-extern unsigned long ldw_u(unsigned short *);
-extern void stq_u(unsigned long, unsigned long *);
-extern void stl_u(unsigned long, unsigned int *);
-extern void stw_u(unsigned long, unsigned short *);
-extern void mem_barrier(void);
-extern void write_mem_barrier(void);
-extern void stl_brx(unsigned long, volatile unsigned char *, int);
-extern void stw_brx(unsigned short, volatile unsigned char *, int);
-extern unsigned long ldl_brx(volatile unsigned char *, int);
-extern unsigned short ldw_brx(volatile unsigned char *, int);
-#  endif /* __powerpc__ && !__OpenBSD */
-
-# endif /* NO_INLINE || DO_PROTOTYPES */
-
-# ifndef NO_INLINE
-#  ifdef __GNUC__
-#   ifdef __i386__
-
-#    ifdef __SSE__
-#     define write_mem_barrier() __asm__ __volatile__ ("sfence" : : : "memory")
-#    else
-#     define write_mem_barrier() __asm__ __volatile__ ("lock; addl $0,0(%%esp)" : : : "memory")
-#    endif
-
-#    ifdef __SSE2__
-#     define mem_barrier() __asm__ __volatile__ ("mfence" : : : "memory")
-#    else
-#     define mem_barrier() __asm__ __volatile__ ("lock; addl $0,0(%%esp)" : : : "memory")
-#    endif
-
-#   elif defined __alpha__
-
-#    define mem_barrier() __asm__ __volatile__ ("mb" : : : "memory")
-#    define write_mem_barrier() __asm__ __volatile__ ("wmb" : : : "memory")
-
-#   elif defined __amd64__
-
-#    define mem_barrier() __asm__ __volatile__ ("mfence" : : : "memory")
-#    define write_mem_barrier() __asm__ __volatile__ ("sfence" : : : "memory")
-
-#   elif defined __ia64__
-
-#    ifndef __INTEL_COMPILER
-#     define mem_barrier()        __asm__ __volatile__ ("mf" : : : "memory")
-#     define write_mem_barrier()  __asm__ __volatile__ ("mf" : : : "memory")
-#    else
-#     include "ia64intrin.h"
-#     define mem_barrier() __mf()
-#     define write_mem_barrier() __mf()
-#    endif
-
-#   elif defined __mips__
-     /* Note: sync instruction requires MIPS II instruction set */
-#    define mem_barrier()		\
-	__asm__ __volatile__(		\
-		".set   push\n\t"	\
-		".set   noreorder\n\t"	\
-		".set   mips2\n\t"	\
-		"sync\n\t"		\
-		".set   pop"		\
-		: /* no output */	\
-		: /* no input */	\
-		: "memory")
-#    define write_mem_barrier() mem_barrier()
-
-#   elif defined __powerpc__
-
-#    if defined(linux) && defined(__powerpc64__)
-#     include <linux/version.h>
-#     if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 0)
-#      include <asm/memory.h>
-#     endif
-#    endif /* defined(linux) && defined(__powerpc64__) */
-
-#    ifndef eieio /* We deal with arch-specific eieio() routines above... */
-#     define eieio() __asm__ __volatile__ ("eieio" ::: "memory")
-#    endif /* eieio */
-#    define mem_barrier()	eieio()
-#    define write_mem_barrier()	eieio()
-
-#   elif defined __sparc__
-
-#    define barrier() __asm__ __volatile__ (".word 0x8143e00a" : : : "memory")
-#    define mem_barrier()         /* XXX: nop for now */
-#    define write_mem_barrier()   /* XXX: nop for now */
-#   endif
-#  endif /* __GNUC__ */
-# endif /* NO_INLINE */
-
-# ifndef mem_barrier
-#  define mem_barrier() /* NOP */
-# endif
-
-# ifndef write_mem_barrier
-#  define write_mem_barrier() /* NOP */
-# endif
-
-
-# ifndef NO_INLINE
-#  ifdef __GNUC__
-
-/* Define some packed structures to use with unaligned accesses */
-
-struct __una_u64 { uint64_t x __attribute__((packed)); };
-struct __una_u32 { uint32_t x __attribute__((packed)); };
-struct __una_u16 { uint16_t x __attribute__((packed)); };
-
-/* Elemental unaligned loads */
-
-static __inline__ uint64_t ldq_u(uint64_t *p)
-{
-	const struct __una_u64 *ptr = (const struct __una_u64 *) p;
-	return ptr->x;
-}
-
-static __inline__ uint32_t ldl_u(uint32_t *p)
-{
-	const struct __una_u32 *ptr = (const struct __una_u32 *) p;
-	return ptr->x;
-}
-
-static __inline__ uint16_t ldw_u(uint16_t *p)
-{
-	const struct __una_u16 *ptr = (const struct __una_u16 *) p;
-	return ptr->x;
-}
-
-/* Elemental unaligned stores */
-
-static __inline__ void stq_u(uint64_t val, uint64_t *p)
-{
-	struct __una_u64 *ptr = (struct __una_u64 *) p;
-	ptr->x = val;
-}
-
-static __inline__ void stl_u(uint32_t val, uint32_t *p)
-{
-	struct __una_u32 *ptr = (struct __una_u32 *) p;
-	ptr->x = val;
-}
-
-static __inline__ void stw_u(uint16_t val, uint16_t *p)
-{
-	struct __una_u16 *ptr = (struct __una_u16 *) p;
-	ptr->x = val;
-}
-#  else /* !__GNUC__ */
-
-#include <string.h> /* needed for memmove */
-
-static __inline__ uint64_t ldq_u(uint64_t *p)
-{
-	uint64_t ret;
-	memmove(&ret, p, sizeof(*p));
-	return ret;
-}
-
-static __inline__ uint32_t ldl_u(uint32_t *p)
-{
-	uint32_t ret;
-	memmove(&ret, p, sizeof(*p));
-	return ret;
-}
-
-static __inline__ uint16_t ldw_u(uint16_t *p)
-{
-	uint16_t ret;
-	memmove(&ret, p, sizeof(*p));
-	return ret;
-}
-
-static __inline__ void stq_u(uint64_t val, uint64_t *p)
-{
-	uint64_t tmp = val;
-	memmove(p, &tmp, sizeof(*p));
-}
-
-static __inline__ void stl_u(uint32_t val, uint32_t *p)
-{
-	uint32_t tmp = val;
-	memmove(p, &tmp, sizeof(*p));
-}
-
-static __inline__ void stw_u(uint16_t val, uint16_t *p)
-{
-	uint16_t tmp = val;
-	memmove(p, &tmp, sizeof(*p));
-}
-
-#  endif /* __GNUC__ */
-# endif /* NO_INLINE */
-
-# ifndef NO_INLINE
-#  ifdef __GNUC__
-#   if (defined(linux) || defined(__FreeBSD__) || defined(__NetBSD__) || defined(__OpenBSD__)) && (defined(__alpha__))
-
-#    ifdef linux
-/* for Linux on Alpha, we use the LIBC _inx/_outx routines */
-/* note that the appropriate setup via "ioperm" needs to be done */
-/*  *before* any inx/outx is done. */
-
-extern _X_EXPORT void _outb(unsigned char val, unsigned long port);
-extern _X_EXPORT void _outw(unsigned short val, unsigned long port);
-extern _X_EXPORT void _outl(unsigned int val, unsigned long port);
-extern _X_EXPORT unsigned int _inb(unsigned long port);
-extern _X_EXPORT unsigned int _inw(unsigned long port);
-extern _X_EXPORT unsigned int _inl(unsigned long port);
-
-static __inline__ void
-outb(unsigned long port, unsigned char val)
-{
-    _outb(val, port);
-}
-
-static __inline__ void
-outw(unsigned long port, unsigned short val)
-{
-    _outw(val, port);
-}
-
-static __inline__ void
-outl(unsigned long port, unsigned int val)
-{
-    _outl(val, port);
-}
-
-static __inline__ unsigned int
-inb(unsigned long port)
-{
-  return _inb(port);
-}
-
-static __inline__ unsigned int
-inw(unsigned long port)
-{
-  return _inw(port);
-}
-
-static __inline__ unsigned int
-inl(unsigned long port)
-{
-  return _inl(port);
-}
-
-#    endif /* linux */
-
-#    if (defined(__FreeBSD__) || defined(__OpenBSD__)) \
-      && !defined(DO_PROTOTYPES)
-
-/* for FreeBSD and OpenBSD on Alpha, we use the libio (resp. libalpha) */
-/*  inx/outx routines */
-/* note that the appropriate setup via "ioperm" needs to be done */
-/*  *before* any inx/outx is done. */
-
-extern _X_EXPORT void outb(unsigned int port, unsigned char val);
-extern _X_EXPORT void outw(unsigned int port, unsigned short val);
-extern _X_EXPORT void outl(unsigned int port, unsigned int val);
-extern _X_EXPORT unsigned char inb(unsigned int port);
-extern _X_EXPORT unsigned short inw(unsigned int port);
-extern _X_EXPORT unsigned int inl(unsigned int port);
-
-#    endif /* (__FreeBSD__ || __OpenBSD__ ) && !DO_PROTOTYPES */
-
-
-#if defined(__NetBSD__)
-#include <machine/pio.h>
-#endif /* __NetBSD__ */
-
-#   elif defined(linux) && defined(__ia64__) 
- 
-#    include <inttypes.h>
-
-#    include <sys/io.h>
-
-#    undef outb
-#    undef outw
-#    undef outl
-#    undef inb
-#    undef inw
-#    undef inl
-extern _X_EXPORT void outb(unsigned long port, unsigned char val);
-extern _X_EXPORT void outw(unsigned long port, unsigned short val);
-extern _X_EXPORT void outl(unsigned long port, unsigned int val);
-extern _X_EXPORT unsigned int inb(unsigned long port);
-extern _X_EXPORT unsigned int inw(unsigned long port);
-extern _X_EXPORT unsigned int inl(unsigned long port);
- 
-#   elif (defined(linux) || defined(__FreeBSD__)) && defined(__amd64__)
- 
-#    include <inttypes.h>
-
-static __inline__ void
-outb(unsigned short port, unsigned char val)
-{
-   __asm__ __volatile__("outb %0,%1" : :"a" (val), "d" (port));
-}
-
-
-static __inline__ void
-outw(unsigned short port, unsigned short val)
-{
-   __asm__ __volatile__("outw %0,%1" : :"a" (val), "d" (port));
-}
-
-static __inline__ void
-outl(unsigned short port, unsigned int val)
-{
-   __asm__ __volatile__("outl %0,%1" : :"a" (val), "d" (port));
-}
-
-static __inline__ unsigned int
-inb(unsigned short port)
-{
-   unsigned char ret;
-   __asm__ __volatile__("inb %1,%0" :
-       "=a" (ret) :
-       "d" (port));
-   return ret;
-}
-
-static __inline__ unsigned int
-inw(unsigned short port)
-{
-   unsigned short ret;
-   __asm__ __volatile__("inw %1,%0" :
-       "=a" (ret) :
-       "d" (port));
-   return ret;
-}
-
-static __inline__ unsigned int
-inl(unsigned short port)
-{
-   unsigned int ret;
-   __asm__ __volatile__("inl %1,%0" :
-       "=a" (ret) :
-       "d" (port));
-   return ret;
-}
-
-#   elif (defined(linux) || defined(sun) || defined(__OpenBSD__) || defined(__FreeBSD__)) && defined(__sparc__)
-
-#     ifndef ASI_PL
-#      define ASI_PL 0x88
-#     endif
-
-static __inline__ void
-outb(unsigned long port, unsigned char val)
-{
-	__asm__ __volatile__("stba %0, [%1] %2"
-			     : /* No outputs */
-			     : "r" (val), "r" (port), "i" (ASI_PL));
-	barrier();
-}
-
-static __inline__ void
-outw(unsigned long port, unsigned short val)
-{
-	__asm__ __volatile__("stha %0, [%1] %2"
-			     : /* No outputs */
-			     : "r" (val), "r" (port), "i" (ASI_PL));
-	barrier();
-}
-
-static __inline__ void
-outl(unsigned long port, unsigned int val)
-{
-	__asm__ __volatile__("sta %0, [%1] %2"
-			     : /* No outputs */
-			     : "r" (val), "r" (port), "i" (ASI_PL));
-	barrier();
-}
-
-static __inline__ unsigned int
-inb(unsigned long port)
-{
-	unsigned int ret;
-	__asm__ __volatile__("lduba [%1] %2, %0"
-			     : "=r" (ret)
-			     : "r" (port), "i" (ASI_PL));
-	return ret;
-}
-
-static __inline__ unsigned int
-inw(unsigned long port)
-{
-	unsigned int ret;
-	__asm__ __volatile__("lduha [%1] %2, %0"
-			     : "=r" (ret)
-			     : "r" (port), "i" (ASI_PL));
-	return ret;
-}
-
-static __inline__ unsigned int
-inl(unsigned long port)
-{
-	unsigned int ret;
-	__asm__ __volatile__("lda [%1] %2, %0"
-			     : "=r" (ret)
-			     : "r" (port), "i" (ASI_PL));
-	return ret;
-}
-
-static __inline__ unsigned char
-xf86ReadMmio8(__volatile__ void *base, const unsigned long offset)
-{
-	unsigned long addr = ((unsigned long)base) + offset;
-	unsigned char ret;
-
-	__asm__ __volatile__("lduba [%1] %2, %0"
-			     : "=r" (ret)
-			     : "r" (addr), "i" (ASI_PL));
-	return ret;
-}
-
-static __inline__ unsigned short
-xf86ReadMmio16Be(__volatile__ void *base, const unsigned long offset)
-{
-	unsigned long addr = ((unsigned long)base) + offset;
-	unsigned short ret;
-
-	__asm__ __volatile__("lduh [%1], %0"
-			     : "=r" (ret)
-			     : "r" (addr));
-	return ret;
-}
-
-static __inline__ unsigned short
-xf86ReadMmio16Le(__volatile__ void *base, const unsigned long offset)
-{
-	unsigned long addr = ((unsigned long)base) + offset;
-	unsigned short ret;
-
-	__asm__ __volatile__("lduha [%1] %2, %0"
-			     : "=r" (ret)
-			     : "r" (addr), "i" (ASI_PL));
-	return ret;
-}
-
-static __inline__ unsigned int
-xf86ReadMmio32Be(__volatile__ void *base, const unsigned long offset)
-{
-	unsigned long addr = ((unsigned long)base) + offset;
-	unsigned int ret;
-
-	__asm__ __volatile__("ld [%1], %0"
-			     : "=r" (ret)
-			     : "r" (addr));
-	return ret;
-}
-
-static __inline__ unsigned int
-xf86ReadMmio32Le(__volatile__ void *base, const unsigned long offset)
-{
-	unsigned long addr = ((unsigned long)base) + offset;
-	unsigned int ret;
-
-	__asm__ __volatile__("lda [%1] %2, %0"
-			     : "=r" (ret)
-			     : "r" (addr), "i" (ASI_PL));
-	return ret;
-}
-
-static __inline__ void
-xf86WriteMmio8(__volatile__ void *base, const unsigned long offset,
-	       const unsigned int val)
-{
-	unsigned long addr = ((unsigned long)base) + offset;
-
-	__asm__ __volatile__("stba %0, [%1] %2"
-			     : /* No outputs */
-			     : "r" (val), "r" (addr), "i" (ASI_PL));
-	barrier();
-}
-
-static __inline__ void
-xf86WriteMmio16Be(__volatile__ void *base, const unsigned long offset,
-		  const unsigned int val)
-{
-	unsigned long addr = ((unsigned long)base) + offset;
-
-	__asm__ __volatile__("sth %0, [%1]"
-			     : /* No outputs */
-			     : "r" (val), "r" (addr));
-	barrier();
-}
-
-static __inline__ void
-xf86WriteMmio16Le(__volatile__ void *base, const unsigned long offset,
-		  const unsigned int val)
-{
-	unsigned long addr = ((unsigned long)base) + offset;
-
-	__asm__ __volatile__("stha %0, [%1] %2"
-			     : /* No outputs */
-			     : "r" (val), "r" (addr), "i" (ASI_PL));
-	barrier();
-}
-
-static __inline__ void
-xf86WriteMmio32Be(__volatile__ void *base, const unsigned long offset,
-		  const unsigned int val)
-{
-	unsigned long addr = ((unsigned long)base) + offset;
-
-	__asm__ __volatile__("st %0, [%1]"
-			     : /* No outputs */
-			     : "r" (val), "r" (addr));
-	barrier();
-}
-
-static __inline__ void
-xf86WriteMmio32Le(__volatile__ void *base, const unsigned long offset,
-		  const unsigned int val)
-{
-	unsigned long addr = ((unsigned long)base) + offset;
-
-	__asm__ __volatile__("sta %0, [%1] %2"
-			     : /* No outputs */
-			     : "r" (val), "r" (addr), "i" (ASI_PL));
-	barrier();
-}
-
-static __inline__ void
-xf86WriteMmio8NB(__volatile__ void *base, const unsigned long offset,
-		 const unsigned int val)
-{
-	unsigned long addr = ((unsigned long)base) + offset;
-
-	__asm__ __volatile__("stba %0, [%1] %2"
-			     : /* No outputs */
-			     : "r" (val), "r" (addr), "i" (ASI_PL));
-}
-
-static __inline__ void
-xf86WriteMmio16BeNB(__volatile__ void *base, const unsigned long offset,
-		    const unsigned int val)
-{
-	unsigned long addr = ((unsigned long)base) + offset;
-
-	__asm__ __volatile__("sth %0, [%1]"
-			     : /* No outputs */
-			     : "r" (val), "r" (addr));
-}
-
-static __inline__ void
-xf86WriteMmio16LeNB(__volatile__ void *base, const unsigned long offset,
-		    const unsigned int val)
-{
-	unsigned long addr = ((unsigned long)base) + offset;
-
-	__asm__ __volatile__("stha %0, [%1] %2"
-			     : /* No outputs */
-			     : "r" (val), "r" (addr), "i" (ASI_PL));
-}
-
-static __inline__ void
-xf86WriteMmio32BeNB(__volatile__ void *base, const unsigned long offset,
-		    const unsigned int val)
-{
-	unsigned long addr = ((unsigned long)base) + offset;
-
-	__asm__ __volatile__("st %0, [%1]"
-			     : /* No outputs */
-			     : "r" (val), "r" (addr));
-}
-
-static __inline__ void
-xf86WriteMmio32LeNB(__volatile__ void *base, const unsigned long offset,
-		    const unsigned int val)
-{
-	unsigned long addr = ((unsigned long)base) + offset;
-
-	__asm__ __volatile__("sta %0, [%1] %2"
-			     : /* No outputs */
-			     : "r" (val), "r" (addr), "i" (ASI_PL));
-}
-
-#   elif defined(__mips__) || (defined(__arm32__) && !defined(__linux__))
-#    ifdef __arm32__
-#     define PORT_SIZE long
-#    else
-#     define PORT_SIZE short
-#    endif
-
-_X_EXPORT unsigned int IOPortBase;  /* Memory mapped I/O port area */
-
-static __inline__ void
-outb(unsigned PORT_SIZE port, unsigned char val)
-{
-	*(volatile unsigned char*)(((unsigned PORT_SIZE)(port))+IOPortBase) = val;
-}
-
-static __inline__ void
-outw(unsigned PORT_SIZE port, unsigned short val)
-{
-	*(volatile unsigned short*)(((unsigned PORT_SIZE)(port))+IOPortBase) = val;
-}
-
-static __inline__ void
-outl(unsigned PORT_SIZE port, unsigned int val)
-{
-	*(volatile unsigned int*)(((unsigned PORT_SIZE)(port))+IOPortBase) = val;
-}
-
-static __inline__ unsigned int
-inb(unsigned PORT_SIZE port)
-{
-	return *(volatile unsigned char*)(((unsigned PORT_SIZE)(port))+IOPortBase);
-}
-
-static __inline__ unsigned int
-inw(unsigned PORT_SIZE port)
-{
-	return *(volatile unsigned short*)(((unsigned PORT_SIZE)(port))+IOPortBase);
-}
-
-static __inline__ unsigned int
-inl(unsigned PORT_SIZE port)
-{
-	return *(volatile unsigned int*)(((unsigned PORT_SIZE)(port))+IOPortBase);
-}
-
-
-#    if defined(__mips__)
-#     ifdef linux	/* don't mess with other OSs */
-#       if X_BYTE_ORDER == X_BIG_ENDIAN
-static __inline__ unsigned int
-xf86ReadMmio32Be(__volatile__ void *base, const unsigned long offset)
-{
-	unsigned long addr = ((unsigned long)base) + offset;
-	unsigned int ret;
-
-	__asm__ __volatile__("lw %0, 0(%1)"
-			     : "=r" (ret)
-			     : "r" (addr));
-	return ret;
-}
-
-static __inline__ void
-xf86WriteMmio32Be(__volatile__ void *base, const unsigned long offset,
-		  const unsigned int val)
-{
-	unsigned long addr = ((unsigned long)base) + offset;
-
-	__asm__ __volatile__("sw %0, 0(%1)"
-			     : /* No outputs */
-			     : "r" (val), "r" (addr));
-}
-#      endif
-#     endif /* !linux */
-#    endif /* __mips__ */
-
-#   elif (defined(linux) || defined(__OpenBSD__) || defined(__NetBSD__) || defined(__FreeBSD__)) && defined(__powerpc__)
-
-#    ifndef MAP_FAILED
-#     define MAP_FAILED ((void *)-1)
-#    endif
-
-extern _X_EXPORT volatile unsigned char *ioBase;
-
-static __inline__ unsigned char
-xf86ReadMmio8(__volatile__ void *base, const unsigned long offset)
-{
-        register unsigned char val;
-        __asm__ __volatile__(
-                        "lbzx %0,%1,%2\n\t"
-                        "eieio"
-                        : "=r" (val)
-                        : "b" (base), "r" (offset),
-                        "m" (*((volatile unsigned char *)base+offset)));
-        return val;
-}
-
-static __inline__ unsigned short
-xf86ReadMmio16Be(__volatile__ void *base, const unsigned long offset)
-{
-        register unsigned short val;
-        __asm__ __volatile__(
-                        "lhzx %0,%1,%2\n\t"
-                        "eieio"
-                        : "=r" (val)
-                        : "b" (base), "r" (offset),
-                        "m" (*((volatile unsigned char *)base+offset)));
-        return val;
-}
-
-static __inline__ unsigned short
-xf86ReadMmio16Le(__volatile__ void *base, const unsigned long offset)
-{
-        register unsigned short val;
-        __asm__ __volatile__(
-                        "lhbrx %0,%1,%2\n\t"
-                        "eieio"
-                        : "=r" (val)
-                        : "b" (base), "r" (offset),
-                        "m" (*((volatile unsigned char *)base+offset)));
-        return val;
-}
-
-static __inline__ unsigned int
-xf86ReadMmio32Be(__volatile__ void *base, const unsigned long offset)
-{
-        register unsigned int val;
-        __asm__ __volatile__(
-                        "lwzx %0,%1,%2\n\t"
-                        "eieio"
-                        : "=r" (val)
-                        : "b" (base), "r" (offset),
-                        "m" (*((volatile unsigned char *)base+offset)));
-        return val;
-}
-
-static __inline__ unsigned int
-xf86ReadMmio32Le(__volatile__ void *base, const unsigned long offset)
-{
-        register unsigned int val;
-        __asm__ __volatile__(
-                        "lwbrx %0,%1,%2\n\t"
-                        "eieio"
-                        : "=r" (val)
-                        : "b" (base), "r" (offset),
-                        "m" (*((volatile unsigned char *)base+offset)));
-        return val;
-}
-
-static __inline__ void
-xf86WriteMmioNB8(__volatile__ void *base, const unsigned long offset,
-		 const unsigned char val)
-{
-        __asm__ __volatile__(
-                        "stbx %1,%2,%3\n\t"
-                        : "=m" (*((volatile unsigned char *)base+offset))
-                        : "r" (val), "b" (base), "r" (offset));
-}
-
-static __inline__ void
-xf86WriteMmioNB16Le(__volatile__ void *base, const unsigned long offset,
-		    const unsigned short val)
-{
-        __asm__ __volatile__(
-                        "sthbrx %1,%2,%3\n\t"
-                        : "=m" (*((volatile unsigned char *)base+offset))
-                        : "r" (val), "b" (base), "r" (offset));
-}
-
-static __inline__ void
-xf86WriteMmioNB16Be(__volatile__ void *base, const unsigned long offset,
-		    const unsigned short val)
-{
-        __asm__ __volatile__(
-                        "sthx %1,%2,%3\n\t"
-                        : "=m" (*((volatile unsigned char *)base+offset))
-                        : "r" (val), "b" (base), "r" (offset));
-}
-
-static __inline__ void
-xf86WriteMmioNB32Le(__volatile__ void *base, const unsigned long offset,
-		    const unsigned int val)
-{
-        __asm__ __volatile__(
-                        "stwbrx %1,%2,%3\n\t"
-                        : "=m" (*((volatile unsigned char *)base+offset))
-                        : "r" (val), "b" (base), "r" (offset));
-}
-
-static __inline__ void
-xf86WriteMmioNB32Be(__volatile__ void *base, const unsigned long offset,
-		    const unsigned int val)
-{
-        __asm__ __volatile__(
-                        "stwx %1,%2,%3\n\t"
-                        : "=m" (*((volatile unsigned char *)base+offset))
-                        : "r" (val), "b" (base), "r" (offset));
-}
-
-static __inline__ void
-xf86WriteMmio8(__volatile__ void *base, const unsigned long offset,
-               const unsigned char val)
-{
-        xf86WriteMmioNB8(base, offset, val);
-        eieio();
-}
-
-static __inline__ void
-xf86WriteMmio16Le(__volatile__ void *base, const unsigned long offset,
-                  const unsigned short val)
-{
-        xf86WriteMmioNB16Le(base, offset, val);
-        eieio();
-}
-
-static __inline__ void
-xf86WriteMmio16Be(__volatile__ void *base, const unsigned long offset,
-                  const unsigned short val)
-{
-        xf86WriteMmioNB16Be(base, offset, val);
-        eieio();
-}
-
-static __inline__ void
-xf86WriteMmio32Le(__volatile__ void *base, const unsigned long offset,
-                  const unsigned int val)
-{
-        xf86WriteMmioNB32Le(base, offset, val);
-        eieio();
-}
-
-static __inline__ void
-xf86WriteMmio32Be(__volatile__ void *base, const unsigned long offset,
-                  const unsigned int val)
-{
-        xf86WriteMmioNB32Be(base, offset, val);
-        eieio();
-}
-
-
-static __inline__ void
-outb(unsigned short port, unsigned char value)
-{
-        if(ioBase == MAP_FAILED) return;
-        xf86WriteMmio8((void *)ioBase, port, value);
-}
-
-static __inline__ void
-outw(unsigned short port, unsigned short value)
-{
-        if(ioBase == MAP_FAILED) return;
-        xf86WriteMmio16Le((void *)ioBase, port, value);
-}
-
-static __inline__ void
-outl(unsigned short port, unsigned int value)
-{
-        if(ioBase == MAP_FAILED) return;
-        xf86WriteMmio32Le((void *)ioBase, port, value);
-}
-
-static __inline__ unsigned int
-inb(unsigned short port)
-{
-        if(ioBase == MAP_FAILED) return 0;
-        return xf86ReadMmio8((void *)ioBase, port);
-}
-
-static __inline__ unsigned int
-inw(unsigned short port)
-{
-        if(ioBase == MAP_FAILED) return 0;
-        return xf86ReadMmio16Le((void *)ioBase, port);
-}
-
-static __inline__ unsigned int
-inl(unsigned short port)
-{
-        if(ioBase == MAP_FAILED) return 0;
-        return xf86ReadMmio32Le((void *)ioBase, port);
-}
-
-#elif defined(__arm__) && defined(__linux__)
-
-/* for Linux on ARM, we use the LIBC inx/outx routines */
-/* note that the appropriate setup via "ioperm" needs to be done */
-/*  *before* any inx/outx is done. */
-
-#include <sys/io.h>
-
-static __inline__ void
-xf_outb(unsigned short port, unsigned char val)
-{
-    outb(val, port);
-}
-
-static __inline__ void
-xf_outw(unsigned short port, unsigned short val)
-{
-    outw(val, port);
-}
-
-static __inline__ void
-xf_outl(unsigned short port, unsigned int val)
-{
-    outl(val, port);
-}
-
-#define outb xf_outb
-#define outw xf_outw
-#define outl xf_outl
-
-#   else /* ix86 */
-
-#    if !defined(__SUNPRO_C)
-#    if !defined(FAKEIT) && !defined(__mc68000__) && !defined(__arm__) && !defined(__sh__) && !defined(__hppa__) && !defined(__s390__) && !defined(__m32r__)
-#     ifdef GCCUSESGAS
-
-/*
- * If gcc uses gas rather than the native assembler, the syntax of these
- * inlines has to be different.		DHD
- */
-
-static __inline__ void
-outb(unsigned short port, unsigned char val)
-{
-   __asm__ __volatile__("outb %0,%1" : :"a" (val), "d" (port));
-}
-
-
-static __inline__ void
-outw(unsigned short port, unsigned short val)
-{
-   __asm__ __volatile__("outw %0,%1" : :"a" (val), "d" (port));
-}
-
-static __inline__ void
-outl(unsigned short port, unsigned int val)
-{
-   __asm__ __volatile__("outl %0,%1" : :"a" (val), "d" (port));
-}
-
-static __inline__ unsigned int
-inb(unsigned short port)
-{
-   unsigned char ret;
-   __asm__ __volatile__("inb %1,%0" :
-       "=a" (ret) :
-       "d" (port));
-   return ret;
-}
-
-static __inline__ unsigned int
-inw(unsigned short port)
-{
-   unsigned short ret;
-   __asm__ __volatile__("inw %1,%0" :
-       "=a" (ret) :
-       "d" (port));
-   return ret;
-}
-
-static __inline__ unsigned int
-inl(unsigned short port)
-{
-   unsigned int ret;
-   __asm__ __volatile__("inl %1,%0" :
-       "=a" (ret) :
-       "d" (port));
-   return ret;
-}
-
-#     else	/* GCCUSESGAS */
-
-static __inline__ void
-outb(unsigned short port, unsigned char val)
-{
-  __asm__ __volatile__("out%B0 (%1)" : :"a" (val), "d" (port));
-}
-
-static __inline__ void
-outw(unsigned short port, unsigned short val)
-{
-  __asm__ __volatile__("out%W0 (%1)" : :"a" (val), "d" (port));
-}
-
-static __inline__ void
-outl(unsigned short port, unsigned int val)
-{
-  __asm__ __volatile__("out%L0 (%1)" : :"a" (val), "d" (port));
-}
-
-static __inline__ unsigned int
-inb(unsigned short port)
-{
-  unsigned char ret;
-  __asm__ __volatile__("in%B0 (%1)" :
-		   "=a" (ret) :
-		   "d" (port));
-  return ret;
-}
-
-static __inline__ unsigned int
-inw(unsigned short port)
-{
-  unsigned short ret;
-  __asm__ __volatile__("in%W0 (%1)" :
-		   "=a" (ret) :
-		   "d" (port));
-  return ret;
-}
-
-static __inline__ unsigned int
-inl(unsigned short port)
-{
-  unsigned int ret;
-  __asm__ __volatile__("in%L0 (%1)" :
-                   "=a" (ret) :
-                   "d" (port));
-  return ret;
-}
-
-#     endif /* GCCUSESGAS */
-
-#    else /* !defined(FAKEIT) && !defined(__mc68000__)  && !defined(__arm__) && !defined(__sh__) && !defined(__hppa__) && !defined(__m32r__) */
-
-static __inline__ void
-outb(unsigned short port, unsigned char val)
-{
-}
-
-static __inline__ void
-outw(unsigned short port, unsigned short val)
-{
-}
-
-static __inline__ void
-outl(unsigned short port, unsigned int val)
-{
-}
-
-static __inline__ unsigned int
-inb(unsigned short port)
-{
-  return 0;
-}
-
-static __inline__ unsigned int
-inw(unsigned short port)
-{
-  return 0;
-}
-
-static __inline__ unsigned int
-inl(unsigned short port)
-{
-  return 0;
-}
-
-#    endif /* FAKEIT */
-#    endif /* __SUNPRO_C */
-
-#   endif /* ix86 */
-
-#  else /* !GNUC */
-#    if defined(__STDC__) && (__STDC__ == 1)
-#     ifndef asm
-#      define asm __asm
-#     endif
-#    endif
-#    ifndef SCO325
-#     if defined(__UNIXWARE__)
-#     /* avoid including <sys/types.h> for <sys/inline.h> on UnixWare */
-#      define ushort unsigned short
-#      define ushort_t unsigned short
-#      define ulong unsigned long
-#      define ulong_t unsigned long
-#      define uint_t unsigned int
-#      define uchar_t unsigned char
-#     endif /* __UNIXWARE__ */
-#     if !defined(__SUNPRO_C)
-#      include <sys/inline.h>
-#     endif
-#    else
-#     include "scoasm.h"
-#    endif
-#    if !defined(__HIGHC__) && !defined(__SUNPRO_C) || \
-	defined(__USLC__)
-#     pragma asm partial_optimization outl
-#     pragma asm partial_optimization outw
-#     pragma asm partial_optimization outb
-#     pragma asm partial_optimization inl
-#     pragma asm partial_optimization inw
-#     pragma asm partial_optimization inb
-#    endif
-#  endif /* __GNUC__ */
-
-# endif /* NO_INLINE */
-
-# ifdef __alpha__
-/* entry points for Mmio memory access routines */
-extern _X_EXPORT int (*xf86ReadMmio8)(void *, unsigned long);
-extern _X_EXPORT int (*xf86ReadMmio16)(void *, unsigned long);
-#  ifndef STANDALONE_MMIO
-extern _X_EXPORT int (*xf86ReadMmio32)(void *, unsigned long);
-#  else
-/* Some DRI 3D drivers need MMIO_IN32. */
-static __inline__ int
-xf86ReadMmio32(void *Base, unsigned long Offset)
-{
-	mem_barrier();
-	return *(volatile unsigned int*)((unsigned long)Base+(Offset));
-}
-#  endif
-extern _X_EXPORT void (*xf86WriteMmio8)(int, void *, unsigned long);
-extern _X_EXPORT void (*xf86WriteMmio16)(int, void *, unsigned long);
-extern _X_EXPORT void (*xf86WriteMmio32)(int, void *, unsigned long);
-extern _X_EXPORT void (*xf86WriteMmioNB8)(int, void *, unsigned long);
-extern _X_EXPORT void (*xf86WriteMmioNB16)(int, void *, unsigned long);
-extern _X_EXPORT void (*xf86WriteMmioNB32)(int, void *, unsigned long);
-extern _X_EXPORT void xf86SlowBCopyFromBus(unsigned char *, unsigned char *, int);
-extern _X_EXPORT void xf86SlowBCopyToBus(unsigned char *, unsigned char *, int);
-
-/* Some macros to hide the system dependencies for MMIO accesses */
-/* Changed to kill noise generated by gcc's -Wcast-align */
-#  define MMIO_IN8(base, offset) (*xf86ReadMmio8)(base, offset)
-#  define MMIO_IN16(base, offset) (*xf86ReadMmio16)(base, offset)
-#  ifndef STANDALONE_MMIO
-#   define MMIO_IN32(base, offset) (*xf86ReadMmio32)(base, offset)
-#  else
-#   define MMIO_IN32(base, offset) xf86ReadMmio32(base, offset)
-#  endif
-
-#  define MMIO_OUT32(base, offset, val) \
-    do { \
-	write_mem_barrier(); \
-	*(volatile CARD32 *)(void *)(((CARD8*)(base)) + (offset)) = (val); \
-    } while (0)
-#  define MMIO_ONB32(base, offset, val) \
-	*(volatile CARD32 *)(void *)(((CARD8*)(base)) + (offset)) = (val)
-
-#  define MMIO_OUT8(base, offset, val) \
-    (*xf86WriteMmio8)((CARD8)(val), base, offset)
-#  define MMIO_OUT16(base, offset, val) \
-    (*xf86WriteMmio16)((CARD16)(val), base, offset)
-#  define MMIO_ONB8(base, offset, val) \
-    (*xf86WriteMmioNB8)((CARD8)(val), base, offset)
-#  define MMIO_ONB16(base, offset, val) \
-    (*xf86WriteMmioNB16)((CARD16)(val), base, offset)
-#  define MMIO_MOVE32(base, offset, val) \
-    MMIO_OUT32(base, offset, val)
-
-# elif defined(__powerpc__)  
- /* 
-  * we provide byteswapping and no byteswapping functions here
-  * with byteswapping as default, 
-  * drivers that don't need byteswapping should define PPC_MMIO_IS_BE 
-  */
-#  define MMIO_IN8(base, offset) xf86ReadMmio8(base, offset)
-#  define MMIO_OUT8(base, offset, val) \
-    xf86WriteMmio8(base, offset, (CARD8)(val))
-#  define MMIO_ONB8(base, offset, val) \
-    xf86WriteMmioNB8(base, offset, (CARD8)(val))
-
-#  if defined(PPC_MMIO_IS_BE) /* No byteswapping */
-#   define MMIO_IN16(base, offset) xf86ReadMmio16Be(base, offset)
-#   define MMIO_IN32(base, offset) xf86ReadMmio32Be(base, offset)
-#   define MMIO_OUT16(base, offset, val) \
-    xf86WriteMmio16Be(base, offset, (CARD16)(val))
-#   define MMIO_OUT32(base, offset, val) \
-    xf86WriteMmio32Be(base, offset, (CARD32)(val))
-#   define MMIO_ONB16(base, offset, val) \
-    xf86WriteMmioNB16Be(base, offset, (CARD16)(val))
-#   define MMIO_ONB32(base, offset, val) \
-    xf86WriteMmioNB32Be(base, offset, (CARD32)(val))
-#  else /* byteswapping is the default */
-#   define MMIO_IN16(base, offset) xf86ReadMmio16Le(base, offset)
-#   define MMIO_IN32(base, offset) xf86ReadMmio32Le(base, offset)
-#   define MMIO_OUT16(base, offset, val) \
-     xf86WriteMmio16Le(base, offset, (CARD16)(val))
-#   define MMIO_OUT32(base, offset, val) \
-     xf86WriteMmio32Le(base, offset, (CARD32)(val))
-#   define MMIO_ONB16(base, offset, val) \
-     xf86WriteMmioNB16Le(base, offset, (CARD16)(val))
-#   define MMIO_ONB32(base, offset, val) \
-     xf86WriteMmioNB32Le(base, offset, (CARD32)(val))
-#  endif
-
-#  define MMIO_MOVE32(base, offset, val) \
-       xf86WriteMmio32Be(base, offset, (CARD32)(val))
-
-# elif defined(__sparc__) || defined(sparc) || defined(__sparc)
- /*
-  * Like powerpc, we provide byteswapping and no byteswapping functions
-  * here with byteswapping as default, drivers that don't need byteswapping
-  * should define SPARC_MMIO_IS_BE (perhaps create a generic macro so that we
-  * do not need to use PPC_MMIO_IS_BE and the sparc one in all the same places
-  * of drivers?).
-  */
-#  define MMIO_IN8(base, offset) xf86ReadMmio8(base, offset)
-#  define MMIO_OUT8(base, offset, val) \
-    xf86WriteMmio8(base, offset, (CARD8)(val))
-#  define MMIO_ONB8(base, offset, val) \
-    xf86WriteMmio8NB(base, offset, (CARD8)(val))
-
-#  if defined(SPARC_MMIO_IS_BE) /* No byteswapping */
-#   define MMIO_IN16(base, offset) xf86ReadMmio16Be(base, offset)
-#   define MMIO_IN32(base, offset) xf86ReadMmio32Be(base, offset)
-#   define MMIO_OUT16(base, offset, val) \
-     xf86WriteMmio16Be(base, offset, (CARD16)(val))
-#   define MMIO_OUT32(base, offset, val) \
-     xf86WriteMmio32Be(base, offset, (CARD32)(val))
-#   define MMIO_ONB16(base, offset, val) \
-     xf86WriteMmio16BeNB(base, offset, (CARD16)(val))
-#   define MMIO_ONB32(base, offset, val) \
-     xf86WriteMmio32BeNB(base, offset, (CARD32)(val))
-#  else /* byteswapping is the default */
-#   define MMIO_IN16(base, offset) xf86ReadMmio16Le(base, offset)
-#   define MMIO_IN32(base, offset) xf86ReadMmio32Le(base, offset)
-#   define MMIO_OUT16(base, offset, val) \
-     xf86WriteMmio16Le(base, offset, (CARD16)(val))
-#   define MMIO_OUT32(base, offset, val) \
-     xf86WriteMmio32Le(base, offset, (CARD32)(val))
-#   define MMIO_ONB16(base, offset, val) \
-     xf86WriteMmio16LeNB(base, offset, (CARD16)(val))
-#   define MMIO_ONB32(base, offset, val) \
-     xf86WriteMmio32LeNB(base, offset, (CARD32)(val))
-#  endif
-
-#  define MMIO_MOVE32(base, offset, val) \
-       xf86WriteMmio32Be(base, offset, (CARD32)(val))
-
-# else /* !__alpha__ && !__powerpc__ && !__sparc__ */
-
-#  define MMIO_IN8(base, offset) \
-	*(volatile CARD8 *)(((CARD8*)(base)) + (offset))
-#  define MMIO_IN16(base, offset) \
-	*(volatile CARD16 *)(void *)(((CARD8*)(base)) + (offset))
-#  define MMIO_IN32(base, offset) \
-	*(volatile CARD32 *)(void *)(((CARD8*)(base)) + (offset))
-#  define MMIO_OUT8(base, offset, val) \
-	*(volatile CARD8 *)(((CARD8*)(base)) + (offset)) = (val)
-#  define MMIO_OUT16(base, offset, val) \
-	*(volatile CARD16 *)(void *)(((CARD8*)(base)) + (offset)) = (val)
-#  define MMIO_OUT32(base, offset, val) \
-	*(volatile CARD32 *)(void *)(((CARD8*)(base)) + (offset)) = (val)
-#  define MMIO_ONB8(base, offset, val) MMIO_OUT8(base, offset, val) 
-#  define MMIO_ONB16(base, offset, val) MMIO_OUT16(base, offset, val) 
-#  define MMIO_ONB32(base, offset, val) MMIO_OUT32(base, offset, val) 
-
-#  define MMIO_MOVE32(base, offset, val) MMIO_OUT32(base, offset, val)
-
-# endif /* __alpha__ */
-
-/*
- * With Intel, the version in os-support/misc/SlowBcopy.s is used.
- * This avoids port I/O during the copy (which causes problems with
- * some hardware).
- */
-# ifdef __alpha__
-#  define slowbcopy_tobus(src,dst,count) xf86SlowBCopyToBus(src,dst,count)
-#  define slowbcopy_frombus(src,dst,count) xf86SlowBCopyFromBus(src,dst,count)
-# else /* __alpha__ */
-#  define slowbcopy_tobus(src,dst,count) xf86SlowBcopy(src,dst,count)
-#  define slowbcopy_frombus(src,dst,count) xf86SlowBcopy(src,dst,count)
-# endif /* __alpha__ */
-
-#endif /* _COMPILER_H */
+/*

+ * Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany.

+ *

+ * Permission to use, copy, modify, distribute, and sell this software and its

+ * documentation for any purpose is hereby granted without fee, provided that

+ * the above copyright notice appear in all copies and that both that

+ * copyright notice and this permission notice appear in supporting

+ * documentation, and that the name of Thomas Roell not be used in

+ * advertising or publicity pertaining to distribution of the software without

+ * specific, written prior permission.  Thomas Roell makes no representations

+ * about the suitability of this software for any purpose.  It is provided

+ * "as is" without express or implied warranty.

+ *

+ * THOMAS ROELL DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,

+ * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO

+ * EVENT SHALL THOMAS ROELL BE LIABLE FOR ANY SPECIAL, INDIRECT OR

+ * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,

+ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER

+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR

+ * PERFORMANCE OF THIS SOFTWARE.

+ *

+ */

+/*

+ * Copyright (c) 1994-2003 by The XFree86 Project, Inc.

+ *

+ * Permission is hereby granted, free of charge, to any person obtaining a

+ * copy of this software and associated documentation files (the "Software"),

+ * to deal in the Software without restriction, including without limitation

+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,

+ * and/or sell copies of the Software, and to permit persons to whom the

+ * Software is furnished to do so, subject to the following conditions:

+ *

+ * The above copyright notice and this permission notice shall be included in

+ * all copies or substantial portions of the Software.

+ *

+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL

+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR

+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,

+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

+ * OTHER DEALINGS IN THE SOFTWARE.

+ *

+ * Except as contained in this notice, the name of the copyright holder(s)

+ * and author(s) shall not be used in advertising or otherwise to promote

+ * the sale, use or other dealings in this Software without prior written

+ * authorization from the copyright holder(s) and author(s).

+ */

+

+#ifndef _COMPILER_H

+

+# define _COMPILER_H

+

+#if defined(__SUNPRO_C)

+# define DO_PROTOTYPES

+#endif

+

+/* Map Sun compiler platform defines to gcc-style used in the code */

+#if defined(__amd64) && !defined(__amd64__)

+# define __amd64__

+#endif

+#if defined(__i386) && !defined(__i386__)

+# define __i386__

+#endif

+#if defined(__sparc) && !defined(__sparc__)

+# define __sparc__

+#endif

+#if defined(__sparcv9) && !defined(__sparc64__)

+# define __sparc64__

+#endif

+

+#ifndef _X_EXPORT

+# include <X11/Xfuncproto.h>

+#endif

+

+# include <pixman.h> /* for uint*_t types */

+

+/* Allow drivers to use the GCC-supported __inline__ and/or __inline. */

+# ifndef __inline__

+#  if defined(__GNUC__)

+    /* gcc has __inline__ */

+#  elif defined(__HIGHC__)

+#   define __inline__ _Inline

+#  else

+#   define __inline__ /**/

+#  endif

+# endif /* __inline__ */

+# ifndef __inline

+#  if defined(__GNUC__)

+    /* gcc has __inline */

+#  elif defined(__HIGHC__)

+#   define __inline _Inline

+#  else

+#   define __inline /**/

+#  endif

+# endif /* __inline */

+

+/* Support gcc's __FUNCTION__ for people using other compilers */

+#if !defined(__GNUC__) && !defined(__FUNCTION__)

+# define __FUNCTION__ __func__ /* C99 */

+#endif

+

+# if defined(NO_INLINE) || defined(DO_PROTOTYPES)

+

+#  if !defined(__arm__)

+#   if !defined(__sparc__) && !defined(__sparc) && !defined(__arm32__) && !defined(__nds32__) \

+      && !(defined(__alpha__) && defined(linux)) \

+      && !(defined(__ia64__) && defined(linux)) \

+

+extern _X_EXPORT void outb(unsigned short, unsigned char);

+extern _X_EXPORT void outw(unsigned short, unsigned short);

+extern _X_EXPORT void outl(unsigned short, unsigned int);

+extern _X_EXPORT unsigned int inb(unsigned short);

+extern _X_EXPORT unsigned int inw(unsigned short);

+extern _X_EXPORT unsigned int inl(unsigned short);

+

+#   else /* __sparc__,  __arm32__, __alpha__, __nds32__ */

+

+extern _X_EXPORT void outb(unsigned long, unsigned char);

+extern _X_EXPORT void outw(unsigned long, unsigned short);

+extern _X_EXPORT void outl(unsigned long, unsigned int);

+extern _X_EXPORT unsigned int inb(unsigned long);

+extern _X_EXPORT unsigned int inw(unsigned long);

+extern _X_EXPORT unsigned int inl(unsigned long);

+

+#   endif /* __sparc__,  __arm32__, __alpha__, __nds32__ */

+#  endif /* __arm__ */

+

+#  if defined(__powerpc__) && !defined(__OpenBSD__)

+extern unsigned long ldq_u(unsigned long *);

+extern unsigned long ldl_u(unsigned int *);

+extern unsigned long ldw_u(unsigned short *);

+extern void stq_u(unsigned long, unsigned long *);

+extern void stl_u(unsigned long, unsigned int *);

+extern void stw_u(unsigned long, unsigned short *);

+extern void mem_barrier(void);

+extern void write_mem_barrier(void);

+extern void stl_brx(unsigned long, volatile unsigned char *, int);

+extern void stw_brx(unsigned short, volatile unsigned char *, int);

+extern unsigned long ldl_brx(volatile unsigned char *, int);

+extern unsigned short ldw_brx(volatile unsigned char *, int);

+#  endif /* __powerpc__ && !__OpenBSD */

+

+# endif /* NO_INLINE || DO_PROTOTYPES */

+

+# ifndef NO_INLINE

+#  ifdef __GNUC__

+#   ifdef __i386__

+

+#    ifdef __SSE__

+#     define write_mem_barrier() __asm__ __volatile__ ("sfence" : : : "memory")

+#    else

+#     define write_mem_barrier() __asm__ __volatile__ ("lock; addl $0,0(%%esp)" : : : "memory")

+#    endif

+

+#    ifdef __SSE2__

+#     define mem_barrier() __asm__ __volatile__ ("mfence" : : : "memory")

+#    else

+#     define mem_barrier() __asm__ __volatile__ ("lock; addl $0,0(%%esp)" : : : "memory")

+#    endif

+

+#   elif defined __alpha__

+

+#    define mem_barrier() __asm__ __volatile__ ("mb" : : : "memory")

+#    define write_mem_barrier() __asm__ __volatile__ ("wmb" : : : "memory")

+

+#   elif defined __amd64__

+

+#    define mem_barrier() __asm__ __volatile__ ("mfence" : : : "memory")

+#    define write_mem_barrier() __asm__ __volatile__ ("sfence" : : : "memory")

+

+#   elif defined __ia64__

+

+#    ifndef __INTEL_COMPILER

+#     define mem_barrier()        __asm__ __volatile__ ("mf" : : : "memory")

+#     define write_mem_barrier()  __asm__ __volatile__ ("mf" : : : "memory")

+#    else

+#     include "ia64intrin.h"

+#     define mem_barrier() __mf()

+#     define write_mem_barrier() __mf()

+#    endif

+

+#   elif defined __mips__

+     /* Note: sync instruction requires MIPS II instruction set */

+#    define mem_barrier()		\

+	__asm__ __volatile__(		\

+		".set   push\n\t"	\

+		".set   noreorder\n\t"	\

+		".set   mips2\n\t"	\

+		"sync\n\t"		\

+		".set   pop"		\

+		: /* no output */	\

+		: /* no input */	\

+		: "memory")

+#    define write_mem_barrier() mem_barrier()

+

+#   elif defined __powerpc__

+

+#    if defined(linux) && defined(__powerpc64__)

+#     include <linux/version.h>

+#     if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 0)

+#      include <asm/memory.h>

+#     endif

+#    endif /* defined(linux) && defined(__powerpc64__) */

+

+#    ifndef eieio /* We deal with arch-specific eieio() routines above... */

+#     define eieio() __asm__ __volatile__ ("eieio" ::: "memory")

+#    endif /* eieio */

+#    define mem_barrier()	eieio()

+#    define write_mem_barrier()	eieio()

+

+#   elif defined __sparc__

+

+#    define barrier() __asm__ __volatile__ (".word 0x8143e00a" : : : "memory")

+#    define mem_barrier()         /* XXX: nop for now */

+#    define write_mem_barrier()   /* XXX: nop for now */

+#   endif

+#  endif /* __GNUC__ */

+# endif /* NO_INLINE */

+

+# ifndef mem_barrier

+#  define mem_barrier() /* NOP */

+# endif

+

+# ifndef write_mem_barrier

+#  define write_mem_barrier() /* NOP */

+# endif

+

+

+# ifndef NO_INLINE

+#  ifdef __GNUC__

+

+/* Define some packed structures to use with unaligned accesses */

+

+struct __una_u64 { uint64_t x __attribute__((packed)); };

+struct __una_u32 { uint32_t x __attribute__((packed)); };

+struct __una_u16 { uint16_t x __attribute__((packed)); };

+

+/* Elemental unaligned loads */

+

+static __inline__ uint64_t ldq_u(uint64_t *p)

+{

+	const struct __una_u64 *ptr = (const struct __una_u64 *) p;

+	return ptr->x;

+}

+

+static __inline__ uint32_t ldl_u(uint32_t *p)

+{

+	const struct __una_u32 *ptr = (const struct __una_u32 *) p;

+	return ptr->x;

+}

+

+static __inline__ uint16_t ldw_u(uint16_t *p)

+{

+	const struct __una_u16 *ptr = (const struct __una_u16 *) p;

+	return ptr->x;

+}

+

+/* Elemental unaligned stores */

+

+static __inline__ void stq_u(uint64_t val, uint64_t *p)

+{

+	struct __una_u64 *ptr = (struct __una_u64 *) p;

+	ptr->x = val;

+}

+

+static __inline__ void stl_u(uint32_t val, uint32_t *p)

+{

+	struct __una_u32 *ptr = (struct __una_u32 *) p;

+	ptr->x = val;

+}

+

+static __inline__ void stw_u(uint16_t val, uint16_t *p)

+{

+	struct __una_u16 *ptr = (struct __una_u16 *) p;

+	ptr->x = val;

+}

+#  else /* !__GNUC__ */

+

+#include <string.h> /* needed for memmove */

+

+static __inline__ uint64_t ldq_u(uint64_t *p)

+{

+	uint64_t ret;

+	memmove(&ret, p, sizeof(*p));

+	return ret;

+}

+

+static __inline__ uint32_t ldl_u(uint32_t *p)

+{

+	uint32_t ret;

+	memmove(&ret, p, sizeof(*p));

+	return ret;

+}

+

+static __inline__ uint16_t ldw_u(uint16_t *p)

+{

+	uint16_t ret;

+	memmove(&ret, p, sizeof(*p));

+	return ret;

+}

+

+static __inline__ void stq_u(uint64_t val, uint64_t *p)

+{

+	uint64_t tmp = val;

+	memmove(p, &tmp, sizeof(*p));

+}

+

+static __inline__ void stl_u(uint32_t val, uint32_t *p)

+{

+	uint32_t tmp = val;

+	memmove(p, &tmp, sizeof(*p));

+}

+

+static __inline__ void stw_u(uint16_t val, uint16_t *p)

+{

+	uint16_t tmp = val;

+	memmove(p, &tmp, sizeof(*p));

+}

+

+#  endif /* __GNUC__ */

+# endif /* NO_INLINE */

+

+# ifndef NO_INLINE

+#  ifdef __GNUC__

+#   if (defined(linux) || defined(__FreeBSD__) || defined(__NetBSD__) || defined(__OpenBSD__)) && (defined(__alpha__))

+

+#    ifdef linux

+/* for Linux on Alpha, we use the LIBC _inx/_outx routines */

+/* note that the appropriate setup via "ioperm" needs to be done */

+/*  *before* any inx/outx is done. */

+

+extern _X_EXPORT void _outb(unsigned char val, unsigned long port);

+extern _X_EXPORT void _outw(unsigned short val, unsigned long port);

+extern _X_EXPORT void _outl(unsigned int val, unsigned long port);

+extern _X_EXPORT unsigned int _inb(unsigned long port);

+extern _X_EXPORT unsigned int _inw(unsigned long port);

+extern _X_EXPORT unsigned int _inl(unsigned long port);

+

+static __inline__ void

+outb(unsigned long port, unsigned char val)

+{

+    _outb(val, port);

+}

+

+static __inline__ void

+outw(unsigned long port, unsigned short val)

+{

+    _outw(val, port);

+}

+

+static __inline__ void

+outl(unsigned long port, unsigned int val)

+{

+    _outl(val, port);

+}

+

+static __inline__ unsigned int

+inb(unsigned long port)

+{

+  return _inb(port);

+}

+

+static __inline__ unsigned int

+inw(unsigned long port)

+{

+  return _inw(port);

+}

+

+static __inline__ unsigned int

+inl(unsigned long port)

+{

+  return _inl(port);

+}

+

+#    endif /* linux */

+

+#    if (defined(__FreeBSD__) || defined(__OpenBSD__)) \

+      && !defined(DO_PROTOTYPES)

+

+/* for FreeBSD and OpenBSD on Alpha, we use the libio (resp. libalpha) */

+/*  inx/outx routines */

+/* note that the appropriate setup via "ioperm" needs to be done */

+/*  *before* any inx/outx is done. */

+

+extern _X_EXPORT void outb(unsigned int port, unsigned char val);

+extern _X_EXPORT void outw(unsigned int port, unsigned short val);

+extern _X_EXPORT void outl(unsigned int port, unsigned int val);

+extern _X_EXPORT unsigned char inb(unsigned int port);

+extern _X_EXPORT unsigned short inw(unsigned int port);

+extern _X_EXPORT unsigned int inl(unsigned int port);

+

+#    endif /* (__FreeBSD__ || __OpenBSD__ ) && !DO_PROTOTYPES */

+

+

+#if defined(__NetBSD__)

+#include <machine/pio.h>

+#endif /* __NetBSD__ */

+

+#   elif defined(linux) && defined(__ia64__) 

+ 

+#    include <inttypes.h>

+

+#    include <sys/io.h>

+

+#    undef outb

+#    undef outw

+#    undef outl

+#    undef inb

+#    undef inw

+#    undef inl

+extern _X_EXPORT void outb(unsigned long port, unsigned char val);

+extern _X_EXPORT void outw(unsigned long port, unsigned short val);

+extern _X_EXPORT void outl(unsigned long port, unsigned int val);

+extern _X_EXPORT unsigned int inb(unsigned long port);

+extern _X_EXPORT unsigned int inw(unsigned long port);

+extern _X_EXPORT unsigned int inl(unsigned long port);

+ 

+#   elif (defined(linux) || defined(__FreeBSD__)) && defined(__amd64__)

+ 

+#    include <inttypes.h>

+

+static __inline__ void

+outb(unsigned short port, unsigned char val)

+{

+   __asm__ __volatile__("outb %0,%1" : :"a" (val), "d" (port));

+}

+

+

+static __inline__ void

+outw(unsigned short port, unsigned short val)

+{

+   __asm__ __volatile__("outw %0,%1" : :"a" (val), "d" (port));

+}

+

+static __inline__ void

+outl(unsigned short port, unsigned int val)

+{

+   __asm__ __volatile__("outl %0,%1" : :"a" (val), "d" (port));

+}

+

+static __inline__ unsigned int

+inb(unsigned short port)

+{

+   unsigned char ret;

+   __asm__ __volatile__("inb %1,%0" :

+       "=a" (ret) :

+       "d" (port));

+   return ret;

+}

+

+static __inline__ unsigned int

+inw(unsigned short port)

+{

+   unsigned short ret;

+   __asm__ __volatile__("inw %1,%0" :

+       "=a" (ret) :

+       "d" (port));

+   return ret;

+}

+

+static __inline__ unsigned int

+inl(unsigned short port)

+{

+   unsigned int ret;

+   __asm__ __volatile__("inl %1,%0" :

+       "=a" (ret) :

+       "d" (port));

+   return ret;

+}

+

+#   elif (defined(linux) || defined(sun) || defined(__OpenBSD__) || defined(__FreeBSD__)) && defined(__sparc__)

+

+#     ifndef ASI_PL

+#      define ASI_PL 0x88

+#     endif

+

+static __inline__ void

+outb(unsigned long port, unsigned char val)

+{

+	__asm__ __volatile__("stba %0, [%1] %2"

+			     : /* No outputs */

+			     : "r" (val), "r" (port), "i" (ASI_PL));

+	barrier();

+}

+

+static __inline__ void

+outw(unsigned long port, unsigned short val)

+{

+	__asm__ __volatile__("stha %0, [%1] %2"

+			     : /* No outputs */

+			     : "r" (val), "r" (port), "i" (ASI_PL));

+	barrier();

+}

+

+static __inline__ void

+outl(unsigned long port, unsigned int val)

+{

+	__asm__ __volatile__("sta %0, [%1] %2"

+			     : /* No outputs */

+			     : "r" (val), "r" (port), "i" (ASI_PL));

+	barrier();

+}

+

+static __inline__ unsigned int

+inb(unsigned long port)

+{

+	unsigned int ret;

+	__asm__ __volatile__("lduba [%1] %2, %0"

+			     : "=r" (ret)

+			     : "r" (port), "i" (ASI_PL));

+	return ret;

+}

+

+static __inline__ unsigned int

+inw(unsigned long port)

+{

+	unsigned int ret;

+	__asm__ __volatile__("lduha [%1] %2, %0"

+			     : "=r" (ret)

+			     : "r" (port), "i" (ASI_PL));

+	return ret;

+}

+

+static __inline__ unsigned int

+inl(unsigned long port)

+{

+	unsigned int ret;

+	__asm__ __volatile__("lda [%1] %2, %0"

+			     : "=r" (ret)

+			     : "r" (port), "i" (ASI_PL));

+	return ret;

+}

+

+static __inline__ unsigned char

+xf86ReadMmio8(__volatile__ void *base, const unsigned long offset)

+{

+	unsigned long addr = ((unsigned long)base) + offset;

+	unsigned char ret;

+

+	__asm__ __volatile__("lduba [%1] %2, %0"

+			     : "=r" (ret)

+			     : "r" (addr), "i" (ASI_PL));

+	return ret;

+}

+

+static __inline__ unsigned short

+xf86ReadMmio16Be(__volatile__ void *base, const unsigned long offset)

+{

+	unsigned long addr = ((unsigned long)base) + offset;

+	unsigned short ret;

+

+	__asm__ __volatile__("lduh [%1], %0"

+			     : "=r" (ret)

+			     : "r" (addr));

+	return ret;

+}

+

+static __inline__ unsigned short

+xf86ReadMmio16Le(__volatile__ void *base, const unsigned long offset)

+{

+	unsigned long addr = ((unsigned long)base) + offset;

+	unsigned short ret;

+

+	__asm__ __volatile__("lduha [%1] %2, %0"

+			     : "=r" (ret)

+			     : "r" (addr), "i" (ASI_PL));

+	return ret;

+}

+

+static __inline__ unsigned int

+xf86ReadMmio32Be(__volatile__ void *base, const unsigned long offset)

+{

+	unsigned long addr = ((unsigned long)base) + offset;

+	unsigned int ret;

+

+	__asm__ __volatile__("ld [%1], %0"

+			     : "=r" (ret)

+			     : "r" (addr));

+	return ret;

+}

+

+static __inline__ unsigned int

+xf86ReadMmio32Le(__volatile__ void *base, const unsigned long offset)

+{

+	unsigned long addr = ((unsigned long)base) + offset;

+	unsigned int ret;

+

+	__asm__ __volatile__("lda [%1] %2, %0"

+			     : "=r" (ret)

+			     : "r" (addr), "i" (ASI_PL));

+	return ret;

+}

+

+static __inline__ void

+xf86WriteMmio8(__volatile__ void *base, const unsigned long offset,

+	       const unsigned int val)

+{

+	unsigned long addr = ((unsigned long)base) + offset;

+

+	__asm__ __volatile__("stba %0, [%1] %2"

+			     : /* No outputs */

+			     : "r" (val), "r" (addr), "i" (ASI_PL));

+	barrier();

+}

+

+static __inline__ void

+xf86WriteMmio16Be(__volatile__ void *base, const unsigned long offset,

+		  const unsigned int val)

+{

+	unsigned long addr = ((unsigned long)base) + offset;

+

+	__asm__ __volatile__("sth %0, [%1]"

+			     : /* No outputs */

+			     : "r" (val), "r" (addr));

+	barrier();

+}

+

+static __inline__ void

+xf86WriteMmio16Le(__volatile__ void *base, const unsigned long offset,

+		  const unsigned int val)

+{

+	unsigned long addr = ((unsigned long)base) + offset;

+

+	__asm__ __volatile__("stha %0, [%1] %2"

+			     : /* No outputs */

+			     : "r" (val), "r" (addr), "i" (ASI_PL));

+	barrier();

+}

+

+static __inline__ void

+xf86WriteMmio32Be(__volatile__ void *base, const unsigned long offset,

+		  const unsigned int val)

+{

+	unsigned long addr = ((unsigned long)base) + offset;

+

+	__asm__ __volatile__("st %0, [%1]"

+			     : /* No outputs */

+			     : "r" (val), "r" (addr));

+	barrier();

+}

+

+static __inline__ void

+xf86WriteMmio32Le(__volatile__ void *base, const unsigned long offset,

+		  const unsigned int val)

+{

+	unsigned long addr = ((unsigned long)base) + offset;

+

+	__asm__ __volatile__("sta %0, [%1] %2"

+			     : /* No outputs */

+			     : "r" (val), "r" (addr), "i" (ASI_PL));

+	barrier();

+}

+

+static __inline__ void

+xf86WriteMmio8NB(__volatile__ void *base, const unsigned long offset,

+		 const unsigned int val)

+{

+	unsigned long addr = ((unsigned long)base) + offset;

+

+	__asm__ __volatile__("stba %0, [%1] %2"

+			     : /* No outputs */

+			     : "r" (val), "r" (addr), "i" (ASI_PL));

+}

+

+static __inline__ void

+xf86WriteMmio16BeNB(__volatile__ void *base, const unsigned long offset,

+		    const unsigned int val)

+{

+	unsigned long addr = ((unsigned long)base) + offset;

+

+	__asm__ __volatile__("sth %0, [%1]"

+			     : /* No outputs */

+			     : "r" (val), "r" (addr));

+}

+

+static __inline__ void

+xf86WriteMmio16LeNB(__volatile__ void *base, const unsigned long offset,

+		    const unsigned int val)

+{

+	unsigned long addr = ((unsigned long)base) + offset;

+

+	__asm__ __volatile__("stha %0, [%1] %2"

+			     : /* No outputs */

+			     : "r" (val), "r" (addr), "i" (ASI_PL));

+}

+

+static __inline__ void

+xf86WriteMmio32BeNB(__volatile__ void *base, const unsigned long offset,

+		    const unsigned int val)

+{

+	unsigned long addr = ((unsigned long)base) + offset;

+

+	__asm__ __volatile__("st %0, [%1]"

+			     : /* No outputs */

+			     : "r" (val), "r" (addr));

+}

+

+static __inline__ void

+xf86WriteMmio32LeNB(__volatile__ void *base, const unsigned long offset,

+		    const unsigned int val)

+{

+	unsigned long addr = ((unsigned long)base) + offset;

+

+	__asm__ __volatile__("sta %0, [%1] %2"

+			     : /* No outputs */

+			     : "r" (val), "r" (addr), "i" (ASI_PL));

+}

+

+#   elif defined(__mips__) || (defined(__arm32__) && !defined(__linux__))

+#    ifdef __arm32__

+#     define PORT_SIZE long

+#    else

+#     define PORT_SIZE short

+#    endif

+

+_X_EXPORT unsigned int IOPortBase;  /* Memory mapped I/O port area */

+

+static __inline__ void

+outb(unsigned PORT_SIZE port, unsigned char val)

+{

+	*(volatile unsigned char*)(((unsigned PORT_SIZE)(port))+IOPortBase) = val;

+}

+

+static __inline__ void

+outw(unsigned PORT_SIZE port, unsigned short val)

+{

+	*(volatile unsigned short*)(((unsigned PORT_SIZE)(port))+IOPortBase) = val;

+}

+

+static __inline__ void

+outl(unsigned PORT_SIZE port, unsigned int val)

+{

+	*(volatile unsigned int*)(((unsigned PORT_SIZE)(port))+IOPortBase) = val;

+}

+

+static __inline__ unsigned int

+inb(unsigned PORT_SIZE port)

+{

+	return *(volatile unsigned char*)(((unsigned PORT_SIZE)(port))+IOPortBase);

+}

+

+static __inline__ unsigned int

+inw(unsigned PORT_SIZE port)

+{

+	return *(volatile unsigned short*)(((unsigned PORT_SIZE)(port))+IOPortBase);

+}

+

+static __inline__ unsigned int

+inl(unsigned PORT_SIZE port)

+{

+	return *(volatile unsigned int*)(((unsigned PORT_SIZE)(port))+IOPortBase);

+}

+

+

+#    if defined(__mips__)

+#     ifdef linux	/* don't mess with other OSs */

+#       if X_BYTE_ORDER == X_BIG_ENDIAN

+static __inline__ unsigned int

+xf86ReadMmio32Be(__volatile__ void *base, const unsigned long offset)

+{

+	unsigned long addr = ((unsigned long)base) + offset;

+	unsigned int ret;

+

+	__asm__ __volatile__("lw %0, 0(%1)"

+			     : "=r" (ret)

+			     : "r" (addr));

+	return ret;

+}

+

+static __inline__ void

+xf86WriteMmio32Be(__volatile__ void *base, const unsigned long offset,

+		  const unsigned int val)

+{

+	unsigned long addr = ((unsigned long)base) + offset;

+

+	__asm__ __volatile__("sw %0, 0(%1)"

+			     : /* No outputs */

+			     : "r" (val), "r" (addr));

+}

+#      endif

+#     endif /* !linux */

+#    endif /* __mips__ */

+

+#   elif (defined(linux) || defined(__OpenBSD__) || defined(__NetBSD__) || defined(__FreeBSD__)) && defined(__powerpc__)

+

+#    ifndef MAP_FAILED

+#     define MAP_FAILED ((void *)-1)

+#    endif

+

+extern _X_EXPORT volatile unsigned char *ioBase;

+

+static __inline__ unsigned char

+xf86ReadMmio8(__volatile__ void *base, const unsigned long offset)

+{

+        register unsigned char val;

+        __asm__ __volatile__(

+                        "lbzx %0,%1,%2\n\t"

+                        "eieio"

+                        : "=r" (val)

+                        : "b" (base), "r" (offset),

+                        "m" (*((volatile unsigned char *)base+offset)));

+        return val;

+}

+

+static __inline__ unsigned short

+xf86ReadMmio16Be(__volatile__ void *base, const unsigned long offset)

+{

+        register unsigned short val;

+        __asm__ __volatile__(

+                        "lhzx %0,%1,%2\n\t"

+                        "eieio"

+                        : "=r" (val)

+                        : "b" (base), "r" (offset),

+                        "m" (*((volatile unsigned char *)base+offset)));

+        return val;

+}

+

+static __inline__ unsigned short

+xf86ReadMmio16Le(__volatile__ void *base, const unsigned long offset)

+{

+        register unsigned short val;

+        __asm__ __volatile__(

+                        "lhbrx %0,%1,%2\n\t"

+                        "eieio"

+                        : "=r" (val)

+                        : "b" (base), "r" (offset),

+                        "m" (*((volatile unsigned char *)base+offset)));

+        return val;

+}

+

+static __inline__ unsigned int

+xf86ReadMmio32Be(__volatile__ void *base, const unsigned long offset)

+{

+        register unsigned int val;

+        __asm__ __volatile__(

+                        "lwzx %0,%1,%2\n\t"

+                        "eieio"

+                        : "=r" (val)

+                        : "b" (base), "r" (offset),

+                        "m" (*((volatile unsigned char *)base+offset)));

+        return val;

+}

+

+static __inline__ unsigned int

+xf86ReadMmio32Le(__volatile__ void *base, const unsigned long offset)

+{

+        register unsigned int val;

+        __asm__ __volatile__(

+                        "lwbrx %0,%1,%2\n\t"

+                        "eieio"

+                        : "=r" (val)

+                        : "b" (base), "r" (offset),

+                        "m" (*((volatile unsigned char *)base+offset)));

+        return val;

+}

+

+static __inline__ void

+xf86WriteMmioNB8(__volatile__ void *base, const unsigned long offset,

+		 const unsigned char val)

+{

+        __asm__ __volatile__(

+                        "stbx %1,%2,%3\n\t"

+                        : "=m" (*((volatile unsigned char *)base+offset))

+                        : "r" (val), "b" (base), "r" (offset));

+}

+

+static __inline__ void

+xf86WriteMmioNB16Le(__volatile__ void *base, const unsigned long offset,

+		    const unsigned short val)

+{

+        __asm__ __volatile__(

+                        "sthbrx %1,%2,%3\n\t"

+                        : "=m" (*((volatile unsigned char *)base+offset))

+                        : "r" (val), "b" (base), "r" (offset));

+}

+

+static __inline__ void

+xf86WriteMmioNB16Be(__volatile__ void *base, const unsigned long offset,

+		    const unsigned short val)

+{

+        __asm__ __volatile__(

+                        "sthx %1,%2,%3\n\t"

+                        : "=m" (*((volatile unsigned char *)base+offset))

+                        : "r" (val), "b" (base), "r" (offset));

+}

+

+static __inline__ void

+xf86WriteMmioNB32Le(__volatile__ void *base, const unsigned long offset,

+		    const unsigned int val)

+{

+        __asm__ __volatile__(

+                        "stwbrx %1,%2,%3\n\t"

+                        : "=m" (*((volatile unsigned char *)base+offset))

+                        : "r" (val), "b" (base), "r" (offset));

+}

+

+static __inline__ void

+xf86WriteMmioNB32Be(__volatile__ void *base, const unsigned long offset,

+		    const unsigned int val)

+{

+        __asm__ __volatile__(

+                        "stwx %1,%2,%3\n\t"

+                        : "=m" (*((volatile unsigned char *)base+offset))

+                        : "r" (val), "b" (base), "r" (offset));

+}

+

+static __inline__ void

+xf86WriteMmio8(__volatile__ void *base, const unsigned long offset,

+               const unsigned char val)

+{

+        xf86WriteMmioNB8(base, offset, val);

+        eieio();

+}

+

+static __inline__ void

+xf86WriteMmio16Le(__volatile__ void *base, const unsigned long offset,

+                  const unsigned short val)

+{

+        xf86WriteMmioNB16Le(base, offset, val);

+        eieio();

+}

+

+static __inline__ void

+xf86WriteMmio16Be(__volatile__ void *base, const unsigned long offset,

+                  const unsigned short val)

+{

+        xf86WriteMmioNB16Be(base, offset, val);

+        eieio();

+}

+

+static __inline__ void

+xf86WriteMmio32Le(__volatile__ void *base, const unsigned long offset,

+                  const unsigned int val)

+{

+        xf86WriteMmioNB32Le(base, offset, val);

+        eieio();

+}

+

+static __inline__ void

+xf86WriteMmio32Be(__volatile__ void *base, const unsigned long offset,

+                  const unsigned int val)

+{

+        xf86WriteMmioNB32Be(base, offset, val);

+        eieio();

+}

+

+

+static __inline__ void

+outb(unsigned short port, unsigned char value)

+{

+        if(ioBase == MAP_FAILED) return;

+        xf86WriteMmio8((void *)ioBase, port, value);

+}

+

+static __inline__ void

+outw(unsigned short port, unsigned short value)

+{

+        if(ioBase == MAP_FAILED) return;

+        xf86WriteMmio16Le((void *)ioBase, port, value);

+}

+

+static __inline__ void

+outl(unsigned short port, unsigned int value)

+{

+        if(ioBase == MAP_FAILED) return;

+        xf86WriteMmio32Le((void *)ioBase, port, value);

+}

+

+static __inline__ unsigned int

+inb(unsigned short port)

+{

+        if(ioBase == MAP_FAILED) return 0;

+        return xf86ReadMmio8((void *)ioBase, port);

+}

+

+static __inline__ unsigned int

+inw(unsigned short port)

+{

+        if(ioBase == MAP_FAILED) return 0;

+        return xf86ReadMmio16Le((void *)ioBase, port);

+}

+

+static __inline__ unsigned int

+inl(unsigned short port)

+{

+        if(ioBase == MAP_FAILED) return 0;

+        return xf86ReadMmio32Le((void *)ioBase, port);

+}

+

+#elif defined(__arm__) && defined(__linux__)

+

+/* for Linux on ARM, we use the LIBC inx/outx routines */

+/* note that the appropriate setup via "ioperm" needs to be done */

+/*  *before* any inx/outx is done. */

+

+#include <sys/io.h>

+

+static __inline__ void

+xf_outb(unsigned short port, unsigned char val)

+{

+    outb(val, port);

+}

+

+static __inline__ void

+xf_outw(unsigned short port, unsigned short val)

+{

+    outw(val, port);

+}

+

+static __inline__ void

+xf_outl(unsigned short port, unsigned int val)

+{

+    outl(val, port);

+}

+

+#define outb xf_outb

+#define outw xf_outw

+#define outl xf_outl

+

+#   elif defined(__nds32__)

+

+/*

+ * Assume all port access are aligned.  We need to revise this implementation

+ * if there is unaligned port access.  For ldq_u, ldl_u, ldw_u, stq_u, stl_u and

+ * stw_u, they are assumed unaligned.

+ */

+

+#define barrier()		/* no barrier */

+

+#define PORT_SIZE long

+

+static __inline__ unsigned char

+xf86ReadMmio8(__volatile__ void *base, const unsigned long offset)

+{

+	return *(volatile unsigned char *)((unsigned char *)base + offset) ;

+}

+

+static __inline__ void

+xf86WriteMmio8(__volatile__ void *base, const unsigned long offset,

+	       const unsigned int val)

+{

+	*(volatile unsigned char *)((unsigned char *)base + offset) = val ;

+	barrier();

+}

+

+static __inline__ void

+xf86WriteMmio8NB(__volatile__ void *base, const unsigned long offset,

+		 const unsigned int val)

+{

+	*(volatile unsigned char *)((unsigned char *)base + offset) = val ;

+}

+

+static __inline__ unsigned short

+xf86ReadMmio16Swap(__volatile__ void *base, const unsigned long offset)

+{

+	unsigned long addr = ((unsigned long)base) + offset;

+	unsigned short ret;

+

+	__asm__ __volatile__(

+	           "lhi %0, [%1];\n\t"

+	           "wsbh %0, %0;\n\t"

+			     : "=r" (ret)

+			     : "r" (addr));

+	return ret;

+}

+

+static __inline__ unsigned short

+xf86ReadMmio16(__volatile__ void *base, const unsigned long offset)

+{

+	return *(volatile unsigned short *)((char *)base + offset) ;

+}

+

+static __inline__ void

+xf86WriteMmio16Swap(__volatile__ void *base, const unsigned long offset,

+		  const unsigned int val)

+{

+	unsigned long addr = ((unsigned long)base) + offset;

+

+	__asm__ __volatile__(

+	           "wsbh %0, %0;\n\t"

+	           "shi %0, [%1];\n\t"

+			     : /* No outputs */

+			     : "r" (val), "r" (addr));

+	barrier();

+}

+

+static __inline__ void

+xf86WriteMmio16(__volatile__ void *base, const unsigned long offset,

+		  const unsigned int val)

+{

+	*(volatile unsigned short *)((unsigned char *)base + offset) = val ;

+	barrier();

+}

+

+static __inline__ void

+xf86WriteMmio16SwapNB(__volatile__ void *base, const unsigned long offset,

+		    const unsigned int val)

+{

+	unsigned long addr = ((unsigned long)base) + offset;

+

+	__asm__ __volatile__(

+	           "wsbh %0, %0;\n\t"

+	           "shi %0, [%1];\n\t"

+			     : /* No outputs */

+			     : "r" (val), "r" (addr));

+}

+

+static __inline__ void

+xf86WriteMmio16NB(__volatile__ void *base, const unsigned long offset,

+		    const unsigned int val)

+{

+	*(volatile unsigned short *)((unsigned char *)base + offset) = val ;

+}

+

+static __inline__ unsigned int

+xf86ReadMmio32Swap(__volatile__ void *base, const unsigned long offset)

+{

+	unsigned long addr = ((unsigned long)base) + offset;

+	unsigned int ret;

+

+	__asm__ __volatile__(

+	           "lwi %0, [%1];\n\t"

+	           "wsbh %0, %0;\n\t"

+				  "rotri %0, %0, 16;\n\t"

+			     : "=r" (ret)

+			     : "r" (addr));

+	return ret;

+}

+

+static __inline__ unsigned int

+xf86ReadMmio32(__volatile__ void *base, const unsigned long offset)

+{

+	return *(volatile unsigned int *)((unsigned char *)base + offset) ;

+}

+

+static __inline__ void

+xf86WriteMmio32Swap(__volatile__ void *base, const unsigned long offset,

+		  const unsigned int val)

+{

+	unsigned long addr = ((unsigned long)base) + offset;

+

+	__asm__ __volatile__(

+	           "wsbh %0, %0;\n\t"

+	           "rotri %0, %0, 16;\n\t"

+				  "swi %0, [%1];\n\t"

+			     : /* No outputs */

+			     : "r" (val), "r" (addr));

+	barrier();

+}

+

+static __inline__ void

+xf86WriteMmio32(__volatile__ void *base, const unsigned long offset,

+		  const unsigned int val)

+{

+	*(volatile unsigned int *)((unsigned char *)base + offset) = val ;

+	barrier();

+}

+

+static __inline__ void

+xf86WriteMmio32SwapNB(__volatile__ void *base, const unsigned long offset,

+		    const unsigned int val)

+{

+	unsigned long addr = ((unsigned long)base) + offset;

+

+	__asm__ __volatile__(

+	           "wsbh %0, %0;\n\t"

+				  "rotri %0, %0, 16;\n\t"

+				  "swi %0, [%1];\n\t"

+			     : /* No outputs */

+			     : "r" (val), "r" (addr));

+}

+

+static __inline__ void

+xf86WriteMmio32NB(__volatile__ void *base, const unsigned long offset,

+		    const unsigned int val)

+{

+	*(volatile unsigned int *)((unsigned char *)base + offset) = val ;

+}

+

+#    if defined(NDS32_MMIO_SWAP)

+static __inline__ void

+outb(unsigned PORT_SIZE port, unsigned char val)

+{

+   xf86WriteMmio8(IOPortBase, port, val);

+}

+

+static __inline__ void

+outw(unsigned PORT_SIZE port, unsigned short val)

+{

+   xf86WriteMmio16Swap(IOPortBase, port, val);

+}

+

+static __inline__ void

+outl(unsigned PORT_SIZE port, unsigned int val)

+{

+   xf86WriteMmio32Swap(IOPortBase, port, val);

+}

+

+static __inline__ unsigned int

+inb(unsigned PORT_SIZE port)

+{

+   return xf86ReadMmio8(IOPortBase, port);

+}

+

+static __inline__ unsigned int

+inw(unsigned PORT_SIZE port)

+{

+   return xf86ReadMmio16Swap(IOPortBase, port);

+}

+

+static __inline__ unsigned int

+inl(unsigned PORT_SIZE port)

+{

+   return xf86ReadMmio32Swap(IOPortBase, port);

+}

+

+static __inline__ unsigned long ldq_u(unsigned long *p)

+{

+	unsigned long addr = (unsigned long)p;

+	unsigned int ret;

+

+	__asm__ __volatile__(

+				  "lmw.bi %0, [%1], %0, 0;\n\t"

+	           "wsbh %0, %0;\n\t"

+				  "rotri %0, %0, 16;\n\t"

+			     : "=r" (ret)

+			     : "r" (addr));

+	return ret;

+}

+

+static __inline__ unsigned long ldl_u(unsigned int *p)

+{

+	unsigned long addr = (unsigned long)p;

+	unsigned int ret;

+

+	__asm__ __volatile__(

+				  "lmw.bi %0, [%1], %0, 0;\n\t"

+	           "wsbh %0, %0;\n\t"

+				  "rotri %0, %0, 16;\n\t"

+			     : "=r" (ret)

+			     : "r" (addr));

+	return ret;

+}

+

+static __inline__ void stq_u(unsigned long val, unsigned long *p)

+{

+	unsigned long addr = (unsigned long)p;

+

+	__asm__ __volatile__(

+	           "wsbh %0, %0;\n\t"

+				  "rotri %0, %0, 16;\n\t"

+				  "smw.bi %0, [%1], %0, 0;\n\t"

+			     : /* No outputs */

+			     : "r" (val), "r" (addr));

+}

+

+static __inline__ void stl_u(unsigned long val, unsigned int *p)

+{

+	unsigned long addr = (unsigned long)p;

+

+	__asm__ __volatile__(

+	           "wsbh %0, %0;\n\t"

+				  "rotri %0, %0, 16;\n\t"

+				  "smw.bi %0, [%1], %0, 0;\n\t"

+			     : /* No outputs */

+			     : "r" (val), "r" (addr));

+}

+

+#    else /* !NDS32_MMIO_SWAP */

+static __inline__ void

+outb(unsigned PORT_SIZE port, unsigned char val)

+{

+	*(volatile unsigned char*)(((unsigned PORT_SIZE)(port))) = val;

+	barrier();

+}

+

+static __inline__ void

+outw(unsigned PORT_SIZE port, unsigned short val)

+{

+	*(volatile unsigned short*)(((unsigned PORT_SIZE)(port))) = val;

+	barrier();

+}

+

+static __inline__ void

+outl(unsigned PORT_SIZE port, unsigned int val)

+{

+	*(volatile unsigned int*)(((unsigned PORT_SIZE)(port))) = val;

+	barrier();

+}

+static __inline__ unsigned int

+inb(unsigned PORT_SIZE port)

+{

+	return *(volatile unsigned char*)(((unsigned PORT_SIZE)(port)));

+}

+

+static __inline__ unsigned int

+inw(unsigned PORT_SIZE port)

+{

+	return *(volatile unsigned short*)(((unsigned PORT_SIZE)(port)));

+}

+

+static __inline__ unsigned int

+inl(unsigned PORT_SIZE port)

+{

+	return *(volatile unsigned int*)(((unsigned PORT_SIZE)(port)));

+}

+

+static __inline__ unsigned long ldq_u(unsigned long *p)

+{

+	unsigned long addr = (unsigned long)p;

+	unsigned int ret;

+

+	__asm__ __volatile__(

+				  "lmw.bi %0, [%1], %0, 0;\n\t"

+			     : "=r" (ret)

+			     : "r" (addr));

+	return ret;

+}

+

+static __inline__ unsigned long ldl_u(unsigned int *p)

+{

+	unsigned long addr = (unsigned long)p;

+	unsigned int ret;

+

+	__asm__ __volatile__(

+				  "lmw.bi %0, [%1], %0, 0;\n\t"

+			     : "=r" (ret)

+			     : "r" (addr));

+	return ret;

+}

+

+

+static __inline__ void stq_u(unsigned long val, unsigned long *p)

+{

+	unsigned long addr = (unsigned long)p;

+

+	__asm__ __volatile__(

+				  "smw.bi %0, [%1], %0, 0;\n\t"

+			     : /* No outputs */

+			     : "r" (val), "r" (addr));

+}

+

+static __inline__ void stl_u(unsigned long val, unsigned int *p)

+{

+	unsigned long addr = (unsigned long)p;

+

+	__asm__ __volatile__(

+				  "smw.bi %0, [%1], %0, 0;\n\t"

+			     : /* No outputs */

+			     : "r" (val), "r" (addr));

+}

+#    endif /* NDS32_MMIO_SWAP */

+

+#    if (((X_BYTE_ORDER == X_BIG_ENDIAN) && !defined(NDS32_MMIO_SWAP)) || ((X_BYTE_ORDER != X_BIG_ENDIAN) && defined(NDS32_MMIO_SWAP)))

+#    define ldw_u(p)	((*(unsigned char *)(p)) << 8 | \

+			(*((unsigned char *)(p)+1)))

+#    define stw_u(v,p)	(*(unsigned char *)(p)) = ((v) >> 8); \

+				(*((unsigned char *)(p)+1)) = (v)

+#    else

+#    define ldw_u(p)	((*(unsigned char *)(p)) | \

+			(*((unsigned char *)(p)+1)<<8))

+#    define stw_u(v,p)	(*(unsigned char *)(p)) = (v); \

+				(*((unsigned char *)(p)+1)) = ((v) >> 8)

+#    endif

+

+#    define mem_barrier()         /* XXX: nop for now */

+#    define write_mem_barrier()   /* XXX: nop for now */

+

+#   else /* ix86 */

+

+#    if !defined(__SUNPRO_C)

+#    if !defined(FAKEIT) && !defined(__mc68000__) && !defined(__arm__) && !defined(__sh__) && !defined(__hppa__) && !defined(__s390__) && !defined(__m32r__)

+#     ifdef GCCUSESGAS

+

+/*

+ * If gcc uses gas rather than the native assembler, the syntax of these

+ * inlines has to be different.		DHD

+ */

+

+static __inline__ void

+outb(unsigned short port, unsigned char val)

+{

+   __asm__ __volatile__("outb %0,%1" : :"a" (val), "d" (port));

+}

+

+

+static __inline__ void

+outw(unsigned short port, unsigned short val)

+{

+   __asm__ __volatile__("outw %0,%1" : :"a" (val), "d" (port));

+}

+

+static __inline__ void

+outl(unsigned short port, unsigned int val)

+{

+   __asm__ __volatile__("outl %0,%1" : :"a" (val), "d" (port));

+}

+

+static __inline__ unsigned int

+inb(unsigned short port)

+{

+   unsigned char ret;

+   __asm__ __volatile__("inb %1,%0" :

+       "=a" (ret) :

+       "d" (port));

+   return ret;

+}

+

+static __inline__ unsigned int

+inw(unsigned short port)

+{

+   unsigned short ret;

+   __asm__ __volatile__("inw %1,%0" :

+       "=a" (ret) :

+       "d" (port));

+   return ret;

+}

+

+static __inline__ unsigned int

+inl(unsigned short port)

+{

+   unsigned int ret;

+   __asm__ __volatile__("inl %1,%0" :

+       "=a" (ret) :

+       "d" (port));

+   return ret;

+}

+

+#     else	/* GCCUSESGAS */

+

+static __inline__ void

+outb(unsigned short port, unsigned char val)

+{

+  __asm__ __volatile__("out%B0 (%1)" : :"a" (val), "d" (port));

+}

+

+static __inline__ void

+outw(unsigned short port, unsigned short val)

+{

+  __asm__ __volatile__("out%W0 (%1)" : :"a" (val), "d" (port));

+}

+

+static __inline__ void

+outl(unsigned short port, unsigned int val)

+{

+  __asm__ __volatile__("out%L0 (%1)" : :"a" (val), "d" (port));

+}

+

+static __inline__ unsigned int

+inb(unsigned short port)

+{

+  unsigned char ret;

+  __asm__ __volatile__("in%B0 (%1)" :

+		   "=a" (ret) :

+		   "d" (port));

+  return ret;

+}

+

+static __inline__ unsigned int

+inw(unsigned short port)

+{

+  unsigned short ret;

+  __asm__ __volatile__("in%W0 (%1)" :

+		   "=a" (ret) :

+		   "d" (port));

+  return ret;

+}

+

+static __inline__ unsigned int

+inl(unsigned short port)

+{

+  unsigned int ret;

+  __asm__ __volatile__("in%L0 (%1)" :

+                   "=a" (ret) :

+                   "d" (port));

+  return ret;

+}

+

+#     endif /* GCCUSESGAS */

+

+#    else /* !defined(FAKEIT) && !defined(__mc68000__)  && !defined(__arm__) && !defined(__sh__) && !defined(__hppa__) && !defined(__m32r__) */

+

+static __inline__ void

+outb(unsigned short port, unsigned char val)

+{

+}

+

+static __inline__ void

+outw(unsigned short port, unsigned short val)

+{

+}

+

+static __inline__ void

+outl(unsigned short port, unsigned int val)

+{

+}

+

+static __inline__ unsigned int

+inb(unsigned short port)

+{

+  return 0;

+}

+

+static __inline__ unsigned int

+inw(unsigned short port)

+{

+  return 0;

+}

+

+static __inline__ unsigned int

+inl(unsigned short port)

+{

+  return 0;

+}

+

+#    endif /* FAKEIT */

+#    endif /* __SUNPRO_C */

+

+#   endif /* ix86 */

+

+#  else /* !GNUC */

+#    if defined(__STDC__) && (__STDC__ == 1)

+#     ifndef asm

+#      define asm __asm

+#     endif

+#    endif

+#    ifndef SCO325

+#     if defined(__UNIXWARE__)

+#     /* avoid including <sys/types.h> for <sys/inline.h> on UnixWare */

+#      define ushort unsigned short

+#      define ushort_t unsigned short

+#      define ulong unsigned long

+#      define ulong_t unsigned long

+#      define uint_t unsigned int

+#      define uchar_t unsigned char

+#     endif /* __UNIXWARE__ */

+#     if !defined(__SUNPRO_C)

+#      include <sys/inline.h>

+#     endif

+#    else

+#     include "scoasm.h"

+#    endif

+#    if !defined(__HIGHC__) && !defined(__SUNPRO_C) || \

+	defined(__USLC__)

+#     pragma asm partial_optimization outl

+#     pragma asm partial_optimization outw

+#     pragma asm partial_optimization outb

+#     pragma asm partial_optimization inl

+#     pragma asm partial_optimization inw

+#     pragma asm partial_optimization inb

+#    endif

+#  endif /* __GNUC__ */

+

+# endif /* NO_INLINE */

+

+# ifdef __alpha__

+/* entry points for Mmio memory access routines */

+extern _X_EXPORT int (*xf86ReadMmio8)(void *, unsigned long);

+extern _X_EXPORT int (*xf86ReadMmio16)(void *, unsigned long);

+#  ifndef STANDALONE_MMIO

+extern _X_EXPORT int (*xf86ReadMmio32)(void *, unsigned long);

+#  else

+/* Some DRI 3D drivers need MMIO_IN32. */

+static __inline__ int

+xf86ReadMmio32(void *Base, unsigned long Offset)

+{

+	mem_barrier();

+	return *(volatile unsigned int*)((unsigned long)Base+(Offset));

+}

+#  endif

+extern _X_EXPORT void (*xf86WriteMmio8)(int, void *, unsigned long);

+extern _X_EXPORT void (*xf86WriteMmio16)(int, void *, unsigned long);

+extern _X_EXPORT void (*xf86WriteMmio32)(int, void *, unsigned long);

+extern _X_EXPORT void (*xf86WriteMmioNB8)(int, void *, unsigned long);

+extern _X_EXPORT void (*xf86WriteMmioNB16)(int, void *, unsigned long);

+extern _X_EXPORT void (*xf86WriteMmioNB32)(int, void *, unsigned long);

+extern _X_EXPORT void xf86SlowBCopyFromBus(unsigned char *, unsigned char *, int);

+extern _X_EXPORT void xf86SlowBCopyToBus(unsigned char *, unsigned char *, int);

+

+/* Some macros to hide the system dependencies for MMIO accesses */

+/* Changed to kill noise generated by gcc's -Wcast-align */

+#  define MMIO_IN8(base, offset) (*xf86ReadMmio8)(base, offset)

+#  define MMIO_IN16(base, offset) (*xf86ReadMmio16)(base, offset)

+#  ifndef STANDALONE_MMIO

+#   define MMIO_IN32(base, offset) (*xf86ReadMmio32)(base, offset)

+#  else

+#   define MMIO_IN32(base, offset) xf86ReadMmio32(base, offset)

+#  endif

+

+#  define MMIO_OUT32(base, offset, val) \

+    do { \

+	write_mem_barrier(); \

+	*(volatile CARD32 *)(void *)(((CARD8*)(base)) + (offset)) = (val); \

+    } while (0)

+#  define MMIO_ONB32(base, offset, val) \

+	*(volatile CARD32 *)(void *)(((CARD8*)(base)) + (offset)) = (val)

+

+#  define MMIO_OUT8(base, offset, val) \

+    (*xf86WriteMmio8)((CARD8)(val), base, offset)

+#  define MMIO_OUT16(base, offset, val) \

+    (*xf86WriteMmio16)((CARD16)(val), base, offset)

+#  define MMIO_ONB8(base, offset, val) \

+    (*xf86WriteMmioNB8)((CARD8)(val), base, offset)

+#  define MMIO_ONB16(base, offset, val) \

+    (*xf86WriteMmioNB16)((CARD16)(val), base, offset)

+#  define MMIO_MOVE32(base, offset, val) \

+    MMIO_OUT32(base, offset, val)

+

+# elif defined(__powerpc__)  

+ /* 

+  * we provide byteswapping and no byteswapping functions here

+  * with byteswapping as default, 

+  * drivers that don't need byteswapping should define PPC_MMIO_IS_BE 

+  */

+#  define MMIO_IN8(base, offset) xf86ReadMmio8(base, offset)

+#  define MMIO_OUT8(base, offset, val) \

+    xf86WriteMmio8(base, offset, (CARD8)(val))

+#  define MMIO_ONB8(base, offset, val) \

+    xf86WriteMmioNB8(base, offset, (CARD8)(val))

+

+#  if defined(PPC_MMIO_IS_BE) /* No byteswapping */

+#   define MMIO_IN16(base, offset) xf86ReadMmio16Be(base, offset)

+#   define MMIO_IN32(base, offset) xf86ReadMmio32Be(base, offset)

+#   define MMIO_OUT16(base, offset, val) \

+    xf86WriteMmio16Be(base, offset, (CARD16)(val))

+#   define MMIO_OUT32(base, offset, val) \

+    xf86WriteMmio32Be(base, offset, (CARD32)(val))

+#   define MMIO_ONB16(base, offset, val) \

+    xf86WriteMmioNB16Be(base, offset, (CARD16)(val))

+#   define MMIO_ONB32(base, offset, val) \

+    xf86WriteMmioNB32Be(base, offset, (CARD32)(val))

+#  else /* byteswapping is the default */

+#   define MMIO_IN16(base, offset) xf86ReadMmio16Le(base, offset)

+#   define MMIO_IN32(base, offset) xf86ReadMmio32Le(base, offset)

+#   define MMIO_OUT16(base, offset, val) \

+     xf86WriteMmio16Le(base, offset, (CARD16)(val))

+#   define MMIO_OUT32(base, offset, val) \

+     xf86WriteMmio32Le(base, offset, (CARD32)(val))

+#   define MMIO_ONB16(base, offset, val) \

+     xf86WriteMmioNB16Le(base, offset, (CARD16)(val))

+#   define MMIO_ONB32(base, offset, val) \

+     xf86WriteMmioNB32Le(base, offset, (CARD32)(val))

+#  endif

+

+#  define MMIO_MOVE32(base, offset, val) \

+       xf86WriteMmio32Be(base, offset, (CARD32)(val))

+

+# elif defined(__sparc__) || defined(sparc) || defined(__sparc)

+ /*

+  * Like powerpc, we provide byteswapping and no byteswapping functions

+  * here with byteswapping as default, drivers that don't need byteswapping

+  * should define SPARC_MMIO_IS_BE (perhaps create a generic macro so that we

+  * do not need to use PPC_MMIO_IS_BE and the sparc one in all the same places

+  * of drivers?).

+  */

+#  define MMIO_IN8(base, offset) xf86ReadMmio8(base, offset)

+#  define MMIO_OUT8(base, offset, val) \

+    xf86WriteMmio8(base, offset, (CARD8)(val))

+#  define MMIO_ONB8(base, offset, val) \

+    xf86WriteMmio8NB(base, offset, (CARD8)(val))

+

+#  if defined(SPARC_MMIO_IS_BE) /* No byteswapping */

+#   define MMIO_IN16(base, offset) xf86ReadMmio16Be(base, offset)

+#   define MMIO_IN32(base, offset) xf86ReadMmio32Be(base, offset)

+#   define MMIO_OUT16(base, offset, val) \

+     xf86WriteMmio16Be(base, offset, (CARD16)(val))

+#   define MMIO_OUT32(base, offset, val) \

+     xf86WriteMmio32Be(base, offset, (CARD32)(val))

+#   define MMIO_ONB16(base, offset, val) \

+     xf86WriteMmio16BeNB(base, offset, (CARD16)(val))

+#   define MMIO_ONB32(base, offset, val) \

+     xf86WriteMmio32BeNB(base, offset, (CARD32)(val))

+#  else /* byteswapping is the default */

+#   define MMIO_IN16(base, offset) xf86ReadMmio16Le(base, offset)

+#   define MMIO_IN32(base, offset) xf86ReadMmio32Le(base, offset)

+#   define MMIO_OUT16(base, offset, val) \

+     xf86WriteMmio16Le(base, offset, (CARD16)(val))

+#   define MMIO_OUT32(base, offset, val) \

+     xf86WriteMmio32Le(base, offset, (CARD32)(val))

+#   define MMIO_ONB16(base, offset, val) \

+     xf86WriteMmio16LeNB(base, offset, (CARD16)(val))

+#   define MMIO_ONB32(base, offset, val) \

+     xf86WriteMmio32LeNB(base, offset, (CARD32)(val))

+#  endif

+

+#  define MMIO_MOVE32(base, offset, val) \

+       xf86WriteMmio32Be(base, offset, (CARD32)(val))

+

+# elif defined(__nds32__)

+ /*

+  * we provide byteswapping and no byteswapping functions here

+  * with no byteswapping as default; when endianness of CPU core

+  * and I/O devices don't match, byte swapping is necessary

+  * drivers that need byteswapping should define NDS32_MMIO_SWAP

+  */

+#  define MMIO_IN8(base, offset) xf86ReadMmio8(base, offset)

+#  define MMIO_OUT8(base, offset, val) \

+    xf86WriteMmio8(base, offset, (CARD8)(val))

+#  define MMIO_ONB8(base, offset, val) \

+    xf86WriteMmioNB8(base, offset, (CARD8)(val))

+

+#  if defined(NDS32_MMIO_SWAP) /* byteswapping */

+#   define MMIO_IN16(base, offset) xf86ReadMmio16Swap(base, offset)

+#   define MMIO_IN32(base, offset) xf86ReadMmio32Swap(base, offset)

+#   define MMIO_OUT16(base, offset, val) \

+    xf86WriteMmio16Swap(base, offset, (CARD16)(val))

+#   define MMIO_OUT32(base, offset, val) \

+    xf86WriteMmio32Swap(base, offset, (CARD32)(val))

+#   define MMIO_ONB16(base, offset, val) \

+    xf86WriteMmioNB16Swap(base, offset, (CARD16)(val))

+#   define MMIO_ONB32(base, offset, val) \

+    xf86WriteMmioNB32Swap(base, offset, (CARD32)(val))

+#  else /* no byteswapping is the default */

+#   define MMIO_IN16(base, offset) xf86ReadMmio16(base, offset)

+#   define MMIO_IN32(base, offset) xf86ReadMmio32(base, offset)

+#   define MMIO_OUT16(base, offset, val) \

+     xf86WriteMmio16(base, offset, (CARD16)(val))

+#   define MMIO_OUT32(base, offset, val) \

+     xf86WriteMmio32(base, offset, (CARD32)(val))

+#   define MMIO_ONB16(base, offset, val) \

+     xf86WriteMmioNB16(base, offset, (CARD16)(val))

+#   define MMIO_ONB32(base, offset, val) \

+     xf86WriteMmioNB32(base, offset, (CARD32)(val))

+#  endif

+

+#  define MMIO_MOVE32(base, offset, val) \

+       xf86WriteMmio32(base, offset, (CARD32)(val))

+

+#ifdef N1213_HC /* for NDS32 N1213 hardcore */

+static __inline__ void nds32_flush_icache(char *addr)

+{

+	__asm__ volatile (

+		"isync %0;"

+		"msync;"

+		"isb;"

+		"cctl %0,L1I_VA_INVAL;"

+		"isb;"

+		: : "r"(addr) : "memory");

+}

+#else

+static __inline__ void nds32_flush_icache(char *addr)

+{

+	__asm__ volatile (

+		"isync %0;"

+		"isb;"

+		: : "r"(addr) : "memory");

+}

+#endif

+

+# else /* !__alpha__ && !__powerpc__ && !__sparc__ */

+

+#  define MMIO_IN8(base, offset) \

+	*(volatile CARD8 *)(((CARD8*)(base)) + (offset))

+#  define MMIO_IN16(base, offset) \

+	*(volatile CARD16 *)(void *)(((CARD8*)(base)) + (offset))

+#  define MMIO_IN32(base, offset) \

+	*(volatile CARD32 *)(void *)(((CARD8*)(base)) + (offset))

+#  define MMIO_OUT8(base, offset, val) \

+	*(volatile CARD8 *)(((CARD8*)(base)) + (offset)) = (val)

+#  define MMIO_OUT16(base, offset, val) \

+	*(volatile CARD16 *)(void *)(((CARD8*)(base)) + (offset)) = (val)

+#  define MMIO_OUT32(base, offset, val) \

+	*(volatile CARD32 *)(void *)(((CARD8*)(base)) + (offset)) = (val)

+#  define MMIO_ONB8(base, offset, val) MMIO_OUT8(base, offset, val) 

+#  define MMIO_ONB16(base, offset, val) MMIO_OUT16(base, offset, val) 

+#  define MMIO_ONB32(base, offset, val) MMIO_OUT32(base, offset, val) 

+

+#  define MMIO_MOVE32(base, offset, val) MMIO_OUT32(base, offset, val)

+

+# endif /* __alpha__ */

+

+/*

+ * With Intel, the version in os-support/misc/SlowBcopy.s is used.

+ * This avoids port I/O during the copy (which causes problems with

+ * some hardware).

+ */

+# ifdef __alpha__

+#  define slowbcopy_tobus(src,dst,count) xf86SlowBCopyToBus(src,dst,count)

+#  define slowbcopy_frombus(src,dst,count) xf86SlowBCopyFromBus(src,dst,count)

+# else /* __alpha__ */

+#  define slowbcopy_tobus(src,dst,count) xf86SlowBcopy(src,dst,count)

+#  define slowbcopy_frombus(src,dst,count) xf86SlowBcopy(src,dst,count)

+# endif /* __alpha__ */

+

+#endif /* _COMPILER_H */

diff --git a/xorg-server/hw/xfree86/common/xf86Config.c b/xorg-server/hw/xfree86/common/xf86Config.c
index 0b1c767fb..3a8380121 100644
--- a/xorg-server/hw/xfree86/common/xf86Config.c
+++ b/xorg-server/hw/xfree86/common/xf86Config.c
@@ -60,7 +60,7 @@
 #include "configProcs.h"

 #include "globals.h"

 #include "extension.h"

-#include "Pci.h"

+#include "xf86pciBus.h"

 

 #include "xf86Xinput.h"

 extern DeviceAssocRec mouse_assoc;

@@ -2535,18 +2535,11 @@ xf86HandleConfigFile(Bool autoconfig)
            scanptr = xf86ConfigLayout.screens->screen->device->busID;

     }

     if (scanptr) {

-       int bus, device, func;

        if (strncmp(scanptr, "PCI:", 4) != 0) {

            xf86Msg(X_WARNING, "Bus types other than PCI not yet isolable.\n"

                               "\tIgnoring IsolateDevice option.\n");

-       } else if (sscanf(scanptr, "PCI:%d:%d:%d", &bus, &device, &func) == 3) {

-           xf86IsolateDevice.domain = PCI_DOM_FROM_BUS(bus);

-           xf86IsolateDevice.bus = PCI_BUS_NO_DOMAIN(bus);

-           xf86IsolateDevice.dev = device;

-           xf86IsolateDevice.func = func;

-           xf86Msg(X_INFO,

-                   "Isolating PCI bus \"%d:%d:%d\"\n", bus, device, func);

-       }

+       } else

+           xf86PciIsolateDevice(scanptr);

     }

 

     /* Now process everything else */

diff --git a/xorg-server/hw/xfree86/common/xf86Configure.c b/xorg-server/hw/xfree86/common/xf86Configure.c
index 25d884934..6cce1cdd5 100644
--- a/xorg-server/hw/xfree86/common/xf86Configure.c
+++ b/xorg-server/hw/xfree86/common/xf86Configure.c
@@ -34,6 +34,7 @@
 #define IN_XSERVER

 #include "Configint.h"

 #include "xf86DDC.h"

+#include "xf86pciBus.h"

 #if (defined(__sparc__) || defined(__sparc)) && !defined(__OpenBSD__)

 #include "xf86Bus.h"

 #include "xf86Sbus.h"

@@ -71,85 +72,6 @@ static char *DFLT_MOUSE_DEV = "/dev/mouse";
 static char *DFLT_MOUSE_PROTO = "auto";

 #endif

 

-static Bool

-bus_pci_configure(void *busData)

-{

-    int i;

-    struct pci_device * pVideo = NULL;

-

-	pVideo = (struct pci_device *) busData;

-	for (i = 0;  i < nDevToConfig;  i++)

-	    if (DevToConfig[i].pVideo &&

-		(DevToConfig[i].pVideo->domain == pVideo->domain) &&

-		(DevToConfig[i].pVideo->bus == pVideo->bus) &&

-		(DevToConfig[i].pVideo->dev == pVideo->dev) &&

-		(DevToConfig[i].pVideo->func == pVideo->func))

-		return 0;

-

-	return 1;

-}

-

-static Bool

-bus_sbus_configure(void *busData)

-{

-#if (defined(__sparc__) || defined(__sparc)) && !defined(__OpenBSD__)

-    int i;

-

-    for (i = 0;  i < nDevToConfig;  i++)

-        if (DevToConfig[i].sVideo &&

-        DevToConfig[i].sVideo->fbNum == ((sbusDevicePtr) busData)->fbNum)

-            return 0;

-

-#endif

-    return 1;

-}

-

-static void

-bus_pci_newdev_configure(void *busData, int i, int *chipset)

-{

-	char busnum[8];

-    struct pci_device * pVideo = NULL;

-

-    pVideo = (struct pci_device *) busData;

-

-	DevToConfig[i].pVideo = pVideo;

-

-	DevToConfig[i].GDev.busID = xnfalloc(16);

-	xf86FormatPciBusNumber(pVideo->bus, busnum);

-	sprintf(DevToConfig[i].GDev.busID, "PCI:%s:%d:%d",

-	    busnum, pVideo->dev, pVideo->func);

-

-	DevToConfig[i].GDev.chipID = pVideo->device_id;

-	DevToConfig[i].GDev.chipRev = pVideo->revision;

-

-	if (*chipset < 0) {

-	    *chipset = (pVideo->vendor_id << 16) | pVideo->device_id;

-	}

-}

-

-static void

-bus_sbus_newdev_configure(void *busData, int i)

-{

-#if (defined(__sparc__) || defined(__sparc)) && !defined(__OpenBSD__)

-	char *promPath = NULL;

-	DevToConfig[i].sVideo = (sbusDevicePtr) busData;

-	DevToConfig[i].GDev.identifier = DevToConfig[i].sVideo->descr;

-	if (sparcPromInit() >= 0) {

-	    promPath = sparcPromNode2Pathname(&DevToConfig[i].sVideo->node);

-	    sparcPromClose();

-	}

-	if (promPath) {

-	    DevToConfig[i].GDev.busID = xnfalloc(strlen(promPath) + 6);

-	    sprintf(DevToConfig[i].GDev.busID, "SBUS:%s", promPath);

-	    free(promPath);

-	} else {

-	    DevToConfig[i].GDev.busID = xnfalloc(12);

-	    sprintf(DevToConfig[i].GDev.busID, "SBUS:fb%d",

-                                DevToConfig[i].sVideo->fbNum);

-	}

-#endif

-}

-

 /*

  * This is called by the driver, either through xf86Match???Instances() or

  * directly.  We allocate a GDevRec and fill it in as much as we can, letting

@@ -164,20 +86,23 @@ xf86AddBusDeviceToConfigure(const char *driver, BusType bus, void *busData, int
 	return NULL;

 

     /* Check for duplicates */

-    switch (bus) {

-        case BUS_PCI:

-            ret = bus_pci_configure(busData);

-	        break;

-        case BUS_SBUS:

-            ret = bus_sbus_configure(busData);

-	        break;

-        default:

-	        return NULL;

+    for (i = 0;  i < nDevToConfig;  i++) {

+        switch (bus) {

+            case BUS_PCI:

+                ret = xf86PciConfigure(busData, DevToConfig[i].pVideo);

+                break;

+#if (defined(__sparc__) || defined(__sparc)) && !defined(__OpenBSD__)

+            case BUS_SBUS:

+                ret = xf86SbusConfigure(busData, DevToConfig[i].sVideo);

+                break;

+#endif

+            default:

+                return NULL;

+        }

+        if (ret == 0)

+            goto out;

     }

 

-    if (ret == 0)

-        goto out;

-

     /* Allocate new structure occurrence */

     i = nDevToConfig++;

     DevToConfig =

@@ -195,11 +120,15 @@ xf86AddBusDeviceToConfigure(const char *driver, BusType bus, void *busData, int
 

     switch (bus) {

         case BUS_PCI:

-            bus_pci_newdev_configure(busData, i, &chipset);

+            xf86PciConfigureNewDev(busData, DevToConfig[i].pVideo,

+                                   &DevToConfig[i].GDev, &chipset);

 	        break;

+#if (defined(__sparc__) || defined(__sparc)) && !defined(__OpenBSD__)

         case BUS_SBUS:

-            bus_sbus_newdev_configure(busData, i);

+            xf86SbusConfigureNewDev(busData, DevToConfig[i].sVideo,

+                                    &DevToConfig[i].GDev);

 	        break;

+#endif

         default:

 	        break;

     }

diff --git a/xorg-server/hw/xfree86/common/xf86Globals.c b/xorg-server/hw/xfree86/common/xf86Globals.c
index 44252c75f..c8534132a 100644
--- a/xorg-server/hw/xfree86/common/xf86Globals.c
+++ b/xorg-server/hw/xfree86/common/xf86Globals.c
@@ -198,7 +198,3 @@ Bool xf86VidModeAllowNonLocal = FALSE;
 RootWinPropPtr *xf86RegisteredPropertiesTable = NULL;

 Bool xf86inSuspend = FALSE;

 Bool xorgHWAccess = FALSE;

-

-struct pci_slot_match xf86IsolateDevice = {

-    PCI_MATCH_ANY, PCI_MATCH_ANY, PCI_MATCH_ANY, PCI_MATCH_ANY, 0

-};

diff --git a/xorg-server/hw/xfree86/common/xf86Priv.h b/xorg-server/hw/xfree86/common/xf86Priv.h
index 17fd5aaa9..01e178372 100644
--- a/xorg-server/hw/xfree86/common/xf86Priv.h
+++ b/xorg-server/hw/xfree86/common/xf86Priv.h
@@ -35,8 +35,6 @@
 #ifndef _XF86PRIV_H

 #define _XF86PRIV_H

 

-#include <pciaccess.h>

-

 #include "xf86Privstr.h"

 #include "propertyst.h"

 #include "input.h"

@@ -72,7 +70,6 @@ extern _X_EXPORT  rgb xf86Weight;
 extern _X_EXPORT  Bool xf86FlipPixels;

 extern _X_EXPORT  Gamma xf86Gamma;

 extern _X_EXPORT  char *xf86ServerName;

-extern _X_EXPORT  struct pci_slot_match xf86IsolateDevice;

 

 /* Other parameters */

 

diff --git a/xorg-server/hw/xfree86/common/xf86pciBus.c b/xorg-server/hw/xfree86/common/xf86pciBus.c
index 8729089cf..b5e8790b6 100644
--- a/xorg-server/hw/xfree86/common/xf86pciBus.c
+++ b/xorg-server/hw/xfree86/common/xf86pciBus.c
@@ -76,6 +76,11 @@ Bool pciSlotClaimed = FALSE;
     (((c) & 0x00ffff00) \

 	 == ((PCI_CLASS_DISPLAY << 16) | (PCI_SUBCLASS_DISPLAY_VGA << 8)))

 

+

+static struct pci_slot_match xf86IsolateDevice = {

+    PCI_MATCH_ANY, PCI_MATCH_ANY, PCI_MATCH_ANY, PCI_MATCH_ANY, 0

+};

+

 void

 xf86FormatPciBusNumber(int busnum, char *buffer)

 {

@@ -1302,15 +1307,10 @@ xf86PciMatchDriver(char* matches[], int nmatches) {
     }

 

     pci_iterator_destroy(iter);

-

-    if (!info) {

-	ErrorF("Primary device is not PCI\n");

-    }

 #ifdef __linux__

-    else {

+    if (info)

 	matchDriverFromFiles(matches, info->vendor_id, info->device_id);

-    }

-#endif /* __linux__ */

+#endif

 

     for (i = 0; (i < nmatches) && (matches[i]); i++) {

 	/* find end of matches list */

@@ -1322,3 +1322,38 @@ xf86PciMatchDriver(char* matches[], int nmatches) {
 

     return i;

 }

+

+Bool

+xf86PciConfigure(void *busData, struct pci_device *pDev)

+{

+    struct pci_device * pVideo = NULL;

+

+    pVideo = (struct pci_device *) busData;

+    if (pDev &&

+        (pDev->domain == pVideo->domain) &&

+        (pDev->bus == pVideo->bus) &&

+        (pDev->dev == pVideo->dev) &&

+        (pDev->func == pVideo->func))

+        return 0;

+

+    return 1;

+}

+

+void

+xf86PciConfigureNewDev(void *busData, struct pci_device *pVideo,

+                         GDevRec *GDev, int *chipset)

+{

+    char busnum[8];

+

+    pVideo = (struct pci_device *) busData;

+

+    GDev->busID = xnfalloc(16);

+    xf86FormatPciBusNumber(pVideo->bus, busnum);

+    sprintf(GDev->busID, "PCI:%s:%d:%d", busnum, pVideo->dev, pVideo->func);

+

+    GDev->chipID = pVideo->device_id;

+    GDev->chipRev = pVideo->revision;

+

+    if (*chipset < 0)

+        *chipset = (pVideo->vendor_id << 16) | pVideo->device_id;

+}

diff --git a/xorg-server/hw/xfree86/common/xf86pciBus.h b/xorg-server/hw/xfree86/common/xf86pciBus.h
index bcbb8b822..a631fbffb 100644
--- a/xorg-server/hw/xfree86/common/xf86pciBus.h
+++ b/xorg-server/hw/xfree86/common/xf86pciBus.h
@@ -38,5 +38,8 @@ Bool xf86PciAddMatchingDev(DriverPtr drvp);
 Bool xf86PciProbeDev(DriverPtr drvp);

 void xf86PciIsolateDevice(char *argument);

 int xf86PciMatchDriver(char* matches[], int nmatches);

+Bool xf86PciConfigure(void *busData, struct pci_device *pDev);

+void xf86PciConfigureNewDev(void *busData, struct pci_device *pVideo,

+                            GDevRec *GDev, int *chipset);

 

 #endif /* _XF86_PCI_BUS_H */

diff --git a/xorg-server/hw/xfree86/common/xf86sbusBus.c b/xorg-server/hw/xfree86/common/xf86sbusBus.c
index 51e7894db..f9244bca7 100644
--- a/xorg-server/hw/xfree86/common/xf86sbusBus.c
+++ b/xorg-server/hw/xfree86/common/xf86sbusBus.c
@@ -685,3 +685,32 @@ xf86SbusHandleColormaps(ScreenPtr pScreen, sbusDevicePtr psdp)
     return xf86HandleColormaps(pScreen, 256, 8,

 			       xf86SbusCmapLoadPalette, NULL, 0);

 }

+

+Bool

+xf86SbusConfigure(void *busData, sbusDevicePtr sBus)

+{

+    if (sBus && sBus->fbNum == ((sbusDevicePtr) busData)->fbNum)

+        return 0;

+    return 1;

+}

+

+void

+xf86SbusConfigureNewDev(void *busData, sbusDevicePtr sBus, GDevRec *GDev)

+{

+    char *promPath = NULL;

+

+    sBus = (sbusDevicePtr) busData;

+    GDev->identifier = sBus->descr;

+    if (sparcPromInit() >= 0) {

+        promPath = sparcPromNode2Pathname(&sBus->node);

+        sparcPromClose();

+    }

+    if (promPath) {

+        GDev->busID = xnfalloc(strlen(promPath) + 6);

+        sprintf(GDev->busID, "SBUS:%s", promPath);

+        free(promPath);

+    } else {

+        GDev->busID = xnfalloc(12);

+        sprintf(GDev->busID, "SBUS:fb%d", sBus->fbNum);

+    }

+}

diff --git a/xorg-server/hw/xfree86/common/xf86sbusBus.h b/xorg-server/hw/xfree86/common/xf86sbusBus.h
index 5cdb0951a..e210770db 100644
--- a/xorg-server/hw/xfree86/common/xf86sbusBus.h
+++ b/xorg-server/hw/xfree86/common/xf86sbusBus.h
@@ -1,100 +1,104 @@
-/*
- * SBUS bus-specific declarations
- *
- * Copyright (C) 2000 Jakub Jelinek (jakub@redhat.com)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * JAKUB JELINEK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#ifndef _XF86_SBUSBUS_H
-#define _XF86_SBUSBUS_H
-
-#include "xf86str.h"
-
-#define SBUS_DEVICE_BW2		0x0001
-#define SBUS_DEVICE_CG2		0x0002
-#define SBUS_DEVICE_CG3		0x0003
-#define SBUS_DEVICE_CG4		0x0004
-#define SBUS_DEVICE_CG6		0x0005
-#define SBUS_DEVICE_CG8		0x0006
-#define SBUS_DEVICE_CG12	0x0007
-#define SBUS_DEVICE_CG14	0x0008
-#define SBUS_DEVICE_LEO		0x0009
-#define SBUS_DEVICE_TCX		0x000a
-#define SBUS_DEVICE_FFB		0x000b
-#define SBUS_DEVICE_GT		0x000c
-#define SBUS_DEVICE_MGX		0x000d
-
-typedef struct sbus_prom_node {
-    int			node;
-    /* Because of misdesigned openpromio */
-    int			cookie[2];
-} sbusPromNode, *sbusPromNodePtr;
-
-typedef struct sbus_device {
-    int			devId;
-    int			fbNum;
-    int			fd;
-    int			width, height;
-    sbusPromNode	node;
-    char		*descr;
-    char		*device;
-} sbusDevice, *sbusDevicePtr;
-
-struct sbus_devtable {
-    int devId;
-    int fbType;
-    char *promName;
-    char *driverName;
-    char *descr;
-};
-
-extern _X_EXPORT void xf86SbusProbe(void);
-extern _X_EXPORT sbusDevicePtr *xf86SbusInfo;
-extern _X_EXPORT struct sbus_devtable sbusDeviceTable[];
-
-extern _X_EXPORT int xf86MatchSbusInstances(const char *driverName, int sbusDevId,
-			   GDevPtr *devList, int numDevs, DriverPtr drvp,
-			   int **foundEntities);
-extern _X_EXPORT sbusDevicePtr xf86GetSbusInfoForEntity(int entityIndex);
-extern _X_EXPORT int xf86GetEntityForSbusInfo(sbusDevicePtr psdp);
-extern _X_EXPORT void xf86SbusUseBuiltinMode(ScrnInfoPtr pScrn, sbusDevicePtr psdp);
-extern _X_EXPORT pointer xf86MapSbusMem(sbusDevicePtr psdp, unsigned long offset,
-		       unsigned long size);
-extern _X_EXPORT void xf86UnmapSbusMem(sbusDevicePtr psdp, pointer addr, unsigned long size);
-extern _X_EXPORT void xf86SbusHideOsHwCursor(sbusDevicePtr psdp);
-extern _X_EXPORT void xf86SbusSetOsHwCursorCmap(sbusDevicePtr psdp, int bg, int fg);
-extern _X_EXPORT Bool xf86SbusHandleColormaps(ScreenPtr pScreen, sbusDevicePtr psdp);
-
-extern _X_EXPORT int promRootNode;
-
-extern _X_EXPORT int promGetSibling(int node);
-extern _X_EXPORT int promGetChild(int node);
-extern _X_EXPORT char * promGetProperty(const char *prop, int *lenp);
-extern _X_EXPORT int promGetBool(const char *prop);
-
-extern _X_EXPORT int sparcPromInit(void);
-extern _X_EXPORT void sparcPromClose(void);
-extern _X_EXPORT char * sparcPromGetProperty(sbusPromNodePtr pnode, const char *prop, int *lenp);
-extern _X_EXPORT int sparcPromGetBool(sbusPromNodePtr pnode, const char *prop);
-extern _X_EXPORT void sparcPromAssignNodes(void);
-extern _X_EXPORT char * sparcPromNode2Pathname(sbusPromNodePtr pnode);
-extern _X_EXPORT int sparcPromPathname2Node(const char *pathName);
-extern _X_EXPORT char *sparcDriverName(void);
-
-#endif /* _XF86_SBUSBUS_H */
+/*

+ * SBUS bus-specific declarations

+ *

+ * Copyright (C) 2000 Jakub Jelinek (jakub@redhat.com)

+ *

+ * Permission is hereby granted, free of charge, to any person obtaining a copy

+ * of this software and associated documentation files (the "Software"), to deal

+ * in the Software without restriction, including without limitation the rights

+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell

+ * copies of the Software, and to permit persons to whom the Software is

+ * furnished to do so, subject to the following conditions:

+ *

+ * The above copyright notice and this permission notice shall be included in

+ * all copies or substantial portions of the Software.

+ *

+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL

+ * JAKUB JELINEK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER

+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN

+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

+ */

+

+#ifndef _XF86_SBUSBUS_H

+#define _XF86_SBUSBUS_H

+

+#include "xf86str.h"

+

+#define SBUS_DEVICE_BW2		0x0001

+#define SBUS_DEVICE_CG2		0x0002

+#define SBUS_DEVICE_CG3		0x0003

+#define SBUS_DEVICE_CG4		0x0004

+#define SBUS_DEVICE_CG6		0x0005

+#define SBUS_DEVICE_CG8		0x0006

+#define SBUS_DEVICE_CG12	0x0007

+#define SBUS_DEVICE_CG14	0x0008

+#define SBUS_DEVICE_LEO		0x0009

+#define SBUS_DEVICE_TCX		0x000a

+#define SBUS_DEVICE_FFB		0x000b

+#define SBUS_DEVICE_GT		0x000c

+#define SBUS_DEVICE_MGX		0x000d

+

+typedef struct sbus_prom_node {

+    int			node;

+    /* Because of misdesigned openpromio */

+    int			cookie[2];

+} sbusPromNode, *sbusPromNodePtr;

+

+typedef struct sbus_device {

+    int			devId;

+    int			fbNum;

+    int			fd;

+    int			width, height;

+    sbusPromNode	node;

+    char		*descr;

+    char		*device;

+} sbusDevice, *sbusDevicePtr;

+

+struct sbus_devtable {

+    int devId;

+    int fbType;

+    char *promName;

+    char *driverName;

+    char *descr;

+};

+

+extern _X_EXPORT void xf86SbusProbe(void);

+extern _X_EXPORT sbusDevicePtr *xf86SbusInfo;

+extern _X_EXPORT struct sbus_devtable sbusDeviceTable[];

+

+extern _X_EXPORT int xf86MatchSbusInstances(const char *driverName, int sbusDevId,

+			   GDevPtr *devList, int numDevs, DriverPtr drvp,

+			   int **foundEntities);

+extern _X_EXPORT sbusDevicePtr xf86GetSbusInfoForEntity(int entityIndex);

+extern _X_EXPORT int xf86GetEntityForSbusInfo(sbusDevicePtr psdp);

+extern _X_EXPORT void xf86SbusUseBuiltinMode(ScrnInfoPtr pScrn, sbusDevicePtr psdp);

+extern _X_EXPORT pointer xf86MapSbusMem(sbusDevicePtr psdp, unsigned long offset,

+		       unsigned long size);

+extern _X_EXPORT void xf86UnmapSbusMem(sbusDevicePtr psdp, pointer addr, unsigned long size);

+extern _X_EXPORT void xf86SbusHideOsHwCursor(sbusDevicePtr psdp);

+extern _X_EXPORT void xf86SbusSetOsHwCursorCmap(sbusDevicePtr psdp, int bg, int fg);

+extern _X_EXPORT Bool xf86SbusHandleColormaps(ScreenPtr pScreen, sbusDevicePtr psdp);

+

+extern _X_EXPORT int promRootNode;

+

+extern _X_EXPORT int promGetSibling(int node);

+extern _X_EXPORT int promGetChild(int node);

+extern _X_EXPORT char * promGetProperty(const char *prop, int *lenp);

+extern _X_EXPORT int promGetBool(const char *prop);

+

+extern _X_EXPORT int sparcPromInit(void);

+extern _X_EXPORT void sparcPromClose(void);

+extern _X_EXPORT char * sparcPromGetProperty(sbusPromNodePtr pnode, const char *prop, int *lenp);

+extern _X_EXPORT int sparcPromGetBool(sbusPromNodePtr pnode, const char *prop);

+extern _X_EXPORT void sparcPromAssignNodes(void);

+extern _X_EXPORT char * sparcPromNode2Pathname(sbusPromNodePtr pnode);

+extern _X_EXPORT int sparcPromPathname2Node(const char *pathName);

+extern _X_EXPORT char *sparcDriverName(void);

+

+extern Bool xf86SbusConfigure(void *busData, sbusDevicePtr sBus);

+extern void xf86SbusConfigureNewDev(void *busData, sbusDevicePtr sBus,

+                                    GDevRec *GDev);

+

+#endif /* _XF86_SBUSBUS_H */

diff --git a/xorg-server/hw/xfree86/dri/dri.c b/xorg-server/hw/xfree86/dri/dri.c
index 378731624..c2f81b1c6 100644
--- a/xorg-server/hw/xfree86/dri/dri.c
+++ b/xorg-server/hw/xfree86/dri/dri.c
@@ -71,8 +71,6 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "inputstr.h"

 #include "xf86VGAarbiter.h"

 

-#define PCI_BUS_NO_DOMAIN(bus) ((bus) & 0xffu)

-

 static int DRIEntPrivIndex = -1;

 static DevPrivateKeyRec DRIScreenPrivKeyRec;

 #define DRIScreenPrivKey (&DRIScreenPrivKeyRec)

diff --git a/xorg-server/hw/xfree86/int10/helper_exec.c b/xorg-server/hw/xfree86/int10/helper_exec.c
index 5b6253646..a55390194 100644
--- a/xorg-server/hw/xfree86/int10/helper_exec.c
+++ b/xorg-server/hw/xfree86/int10/helper_exec.c
@@ -462,6 +462,11 @@ Mem_wl(CARD32 addr, CARD32 val)
 

 static CARD32 PciCfg1Addr = 0;

 

+#define PCI_DOM_FROM_TAG(tag)  (((tag) >> 24) & (PCI_DOM_MASK))

+#define PCI_BUS_FROM_TAG(tag)  (((tag) >> 16) & (PCI_DOMBUS_MASK))

+#define PCI_DEV_FROM_TAG(tag)  (((tag) & 0x0000f800u) >> 11)

+#define PCI_FUNC_FROM_TAG(tag) (((tag) & 0x00000700u) >> 8)

+

 #define PCI_OFFSET(x) ((x) & 0x000000ff)

 #define PCI_TAG(x)    ((x) & 0x7fffff00)

 

diff --git a/xorg-server/hw/xfree86/modes/xf86Cursors.c b/xorg-server/hw/xfree86/modes/xf86Cursors.c
index 090f29c2f..6886ad7b2 100644
--- a/xorg-server/hw/xfree86/modes/xf86Cursors.c
+++ b/xorg-server/hw/xfree86/modes/xf86Cursors.c
@@ -227,11 +227,7 @@ xf86_set_cursor_colors (ScrnInfoPtr scrn, int bg, int fg)
     CursorPtr		cursor = xf86_config->cursor;

     int			c;

     CARD8		*bits = cursor ?

-#if XORG_VERSION_CURRENT < XORG_VERSION_NUMERIC(7,0,0,0,0)

         dixLookupPrivate(&cursor->devPrivates, CursorScreenKey(screen))

-#else

-        cursor->devPriv[screen->myNum]

-#endif

       : NULL;

 

     /* Save ARGB versions of these colors */

@@ -630,11 +626,7 @@ xf86_reload_cursors (ScreenPtr screen)
 

     if (cursor)

     {

-#if XORG_VERSION_CURRENT < XORG_VERSION_NUMERIC(7,0,0,0,0)

 	void *src = dixLookupPrivate(&cursor->devPrivates, CursorScreenKey(screen));

-#else

-	void *src = cursor->devPriv[screen->myNum];

-#endif

 #ifdef ARGB_CURSOR

 	if (cursor->bits->argb && cursor_info->LoadCursorARGB)

 	    (*cursor_info->LoadCursorARGB) (scrn, cursor);

diff --git a/xorg-server/hw/xfree86/modes/xf86EdidModes.c b/xorg-server/hw/xfree86/modes/xf86EdidModes.c
index fc469c6ba..ecc1b110d 100644
--- a/xorg-server/hw/xfree86/modes/xf86EdidModes.c
+++ b/xorg-server/hw/xfree86/modes/xf86EdidModes.c
@@ -636,7 +636,6 @@ DDCModeFromDetailedTiming(int scrnIndex, struct detailed_timings *timing,
     return Mode;

 }

 

-#if XORG_VERSION_CURRENT < XORG_VERSION_NUMERIC(7,0,0,0,0)

 static DisplayModePtr

 DDCModesFromCVT(int scrnIndex, struct cvt_timings *t)

 {

@@ -665,7 +664,6 @@ DDCModesFromCVT(int scrnIndex, struct cvt_timings *t)
 

     return modes;

 }

-#endif

 

 static const struct {

     short w;

@@ -1021,12 +1019,10 @@ static void handle_detailed_modes(struct detailed_monitor_section *det_mon,
                                           p->quirks, p->timing_level,p->rb);

         p->Modes = xf86ModesAdd(p->Modes, Mode);

         break;

-#if XORG_VERSION_CURRENT < XORG_VERSION_NUMERIC(7,0,0,0,0)

     case DS_CVT:

         Mode = DDCModesFromCVT(p->DDC->scrnIndex, det_mon->section.cvt);

         p->Modes = xf86ModesAdd(p->Modes, Mode);

         break;

-#endif

     case DS_EST_III:

 	Mode = DDCModesFromEstIII(det_mon->section.est_iii);

 	p->Modes = xf86ModesAdd(p->Modes, Mode);

diff --git a/xorg-server/hw/xfree86/modes/xf86Modes.c b/xorg-server/hw/xfree86/modes/xf86Modes.c
index 0507e9812..6b34ec11c 100644
--- a/xorg-server/hw/xfree86/modes/xf86Modes.c
+++ b/xorg-server/hw/xfree86/modes/xf86Modes.c
@@ -38,14 +38,6 @@
 

 extern XF86ConfigPtr xf86configptr;

 

-/*

- * This is the version number where we epoched.  These files get copied

- * into drivers that want to use this setup infrastructure on pre-1.3

- * servers, so when that happens they need to define these symbols

- * themselves.  However, _in_ the server, we basically always define them now.

- */

-#if XORG_VERSION_CURRENT <= XORG_VERSION_NUMERIC(7,2,99,2,0)

-

 /**

  * Calculates the horizontal sync rate of a mode.

  */

@@ -326,7 +318,6 @@ xf86PrintModeline(int scrnIndex,DisplayModePtr mode)
 		   mode->VTotal, flags, xf86ModeHSync(mode));

     free(flags);

 }

-#endif /* XORG_VERSION_CURRENT <= 7.2.99.2 */

 

 /**

  * Marks as bad any modes with unsupported flags.

@@ -503,12 +494,7 @@ xf86ValidateModesBandwidth(ScrnInfoPtr pScrn, DisplayModePtr modeList,
 

     for (mode = modeList; mode != NULL; mode = mode->next) {

 	if (xf86ModeBandwidth(mode, depth) > bandwidth)

-#if XORG_VERSION_CURRENT < XORG_VERSION_NUMERIC(7,0,0,0,0)

 	    mode->status = MODE_BANDWIDTH;

-#else

-	    /* MODE_BANDWIDTH didn't exist in xserver 1.2 */

-	    mode->status = MODE_BAD;

-#endif

     }

 }

 

diff --git a/xorg-server/hw/xfree86/modes/xf86RandR12.c b/xorg-server/hw/xfree86/modes/xf86RandR12.c
index 90e267c1e..92f34a222 100644
--- a/xorg-server/hw/xfree86/modes/xf86RandR12.c
+++ b/xorg-server/hw/xfree86/modes/xf86RandR12.c
@@ -69,21 +69,12 @@ static Bool xf86RandR12CreateScreenResources12 (ScreenPtr pScreen);
 #endif

 

 static int xf86RandR12Generation;

-#if XORG_VERSION_CURRENT < XORG_VERSION_NUMERIC(7,0,0,0,0)

 

 static DevPrivateKeyRec xf86RandR12KeyRec;

 static DevPrivateKey xf86RandR12Key;

 #define XF86RANDRINFO(p) ((XF86RandRInfoPtr) \

     dixLookupPrivate(&(p)->devPrivates, xf86RandR12Key))

 

-#else /* XORG_VERSION_CURRENT < 7.0 */

-

-static int xf86RandR12Index;

-#define XF86RANDRINFO(p) \

-    ((XF86RandRInfoPtr)(p)->devPrivates[xf86RandR12Index].ptr)

-

-#endif /* XORG_VERSION_CURRENT < 7.0 */

-

 

 static int

 xf86RandR12ModeRefresh (DisplayModePtr mode)

@@ -690,17 +681,13 @@ xf86RandR12ScreenSetSize (ScreenPtr	pScreen,
     Bool		ret = FALSE;

     int                 c;

 

-#if XORG_VERSION_CURRENT < XORG_VERSION_NUMERIC(7,0,0,0,0)

     if (xf86RandR12Key) {

-#endif

         if (randrp->virtualX == -1 || randrp->virtualY == -1)

         {

 	    randrp->virtualX = pScrn->virtualX;

 	    randrp->virtualY = pScrn->virtualY;

         }

-#if XORG_VERSION_CURRENT < XORG_VERSION_NUMERIC(7,0,0,0,0)

     }

-#endif

     if (pRoot && pScrn->vtSema)

 	(*pScrn->EnableDisableFBAccess) (pScreen->myNum, FALSE);

 

@@ -843,10 +830,8 @@ xf86RandR12CreateScreenResources (ScreenPtr pScreen)
 				  mmHeight);

     }

 

-#if XORG_VERSION_CURRENT < XORG_VERSION_NUMERIC(7,0,0,0,0)

     if (xf86RandR12Key == NULL)

 	return TRUE;

-#endif

 

     if (randrp->virtualX == -1 || randrp->virtualY == -1)

     {

@@ -882,13 +867,9 @@ xf86RandR12Init (ScreenPtr pScreen)
     if (xf86RandR12Generation != serverGeneration)

 	xf86RandR12Generation = serverGeneration;

 

-#if XORG_VERSION_CURRENT < XORG_VERSION_NUMERIC(7,0,0,0,0)

     xf86RandR12Key = &xf86RandR12KeyRec;

     if (!dixRegisterPrivateKey(&xf86RandR12KeyRec, PRIVATE_SCREEN, 0))

 	return FALSE;

-#else

-    xf86RandR12Index = AllocateScreenPrivateIndex();

-#endif

 

     randrp = malloc(sizeof (XF86RandRInfoRec));

     if (!randrp)

@@ -914,11 +895,7 @@ xf86RandR12Init (ScreenPtr pScreen)
 

     randrp->maxX = randrp->maxY = 0;

 

-#if XORG_VERSION_CURRENT < XORG_VERSION_NUMERIC(7,0,0,0,0)

     dixSetPrivate(&pScreen->devPrivates, xf86RandR12Key, randrp);

-#else

-    pScreen->devPrivates[xf86RandR12Index].ptr = randrp;

-#endif

 

 #if RANDR_12_INTERFACE

     if (!xf86RandR12Init12 (pScreen))

@@ -932,10 +909,8 @@ xf86RandR12CloseScreen (ScreenPtr pScreen)
 {

     XF86RandRInfoPtr	randrp;

 

-#if XORG_VERSION_CURRENT < XORG_VERSION_NUMERIC(7,0,0,0,0)

     if (xf86RandR12Key == NULL)

 	return;

-#endif

 

     randrp = XF86RANDRINFO(pScreen);

 #if RANDR_12_INTERFACE

@@ -955,10 +930,8 @@ xf86RandR12SetRotations (ScreenPtr pScreen, Rotation rotations)
     xf86CrtcConfigPtr   config = XF86_CRTC_CONFIG_PTR(pScrn);

 #endif

 

-#if XORG_VERSION_CURRENT < XORG_VERSION_NUMERIC(7,0,0,0,0)

     if (xf86RandR12Key == NULL)

 	return;

-#endif

 

     randrp = XF86RANDRINFO(pScreen);

 #if RANDR_12_INTERFACE

@@ -981,10 +954,8 @@ xf86RandR12SetTransformSupport (ScreenPtr pScreen, Bool transforms)
     xf86CrtcConfigPtr   config = XF86_CRTC_CONFIG_PTR(pScrn);

 #endif

 

-#if XORG_VERSION_CURRENT < XORG_VERSION_NUMERIC(7,0,0,0,0)

     if (xf86RandR12Key == NULL)

 	return;

-#endif

 

     randrp = XF86RANDRINFO(pScreen);

 #if RANDR_13_INTERFACE

@@ -1599,10 +1570,8 @@ xf86RandR12CreateScreenResources12 (ScreenPtr pScreen)
     ScrnInfoPtr		pScrn = xf86Screens[pScreen->myNum];

     xf86CrtcConfigPtr   config = XF86_CRTC_CONFIG_PTR(pScrn);

 

-#if XORG_VERSION_CURRENT < XORG_VERSION_NUMERIC(7,0,0,0,0)

     if (xf86RandR12Key == NULL)

 	return TRUE;

-#endif

 

     for (c = 0; c < config->num_crtc; c++)

         xf86RandR12CrtcNotify (config->crtc[c]->randr_crtc);

@@ -1624,13 +1593,8 @@ xf86RandR12TellChanged (ScreenPtr pScreen)
     xf86CrtcConfigPtr   config = XF86_CRTC_CONFIG_PTR(pScrn);

     int			c;

 

-#if XORG_VERSION_CURRENT < XORG_VERSION_NUMERIC(7,0,0,0,0)

     if (xf86RandR12Key == NULL)

 	return;

-#else

-    if (!XF86RANDRINFO(pScreen))

-	return;

-#endif

 

     xf86RandR12SetInfo12 (pScreen);

     for (c = 0; c < config->num_crtc; c++)

diff --git a/xorg-server/hw/xfree86/os-support/bus/Makefile.am b/xorg-server/hw/xfree86/os-support/bus/Makefile.am
index 92a519bcc..41d8875fb 100644
--- a/xorg-server/hw/xfree86/os-support/bus/Makefile.am
+++ b/xorg-server/hw/xfree86/os-support/bus/Makefile.am
@@ -1,26 +1,25 @@
-noinst_LTLIBRARIES = libbus.la
-sdk_HEADERS = xf86Pci.h
-
-PCI_SOURCES =
-
-if XORG_BUS_LINUXPCI
-PCI_SOURCES += linuxPci.c
-endif
-
-if XORG_BUS_BSDPCI
-PCI_SOURCES += bsd_pci.c
-endif
-
-if XORG_BUS_SPARC
-PLATFORM_SOURCES = Sbus.c
-sdk_HEADERS += xf86Sbus.h
-endif
-
-libbus_la_SOURCES = Pci.c Pci.h $(PCI_SOURCES) $(PLATFORM_PCI_SOURCES) \
-                    $(PLATFORM_SOURCES)
-
-INCLUDES = $(XORG_INCS)
-
-AM_CFLAGS = $(XORG_CFLAGS) $(DIX_CFLAGS)
-
-EXTRA_DIST = $(sdk_HEADERS)
+noinst_LTLIBRARIES = libbus.la

+sdk_HEADERS = xf86Pci.h

+

+PCI_SOURCES = Pci.c Pci.h

+

+if XORG_BUS_LINUXPCI

+PCI_SOURCES += linuxPci.c

+endif

+

+if XORG_BUS_BSDPCI

+PCI_SOURCES += bsd_pci.c

+endif

+

+if XORG_BUS_SPARC

+PLATFORM_SOURCES = Sbus.c

+sdk_HEADERS += xf86Sbus.h

+endif

+

+libbus_la_SOURCES = $(PCI_SOURCES) $(PLATFORM_SOURCES)

+

+INCLUDES = $(XORG_INCS)

+

+AM_CFLAGS = $(XORG_CFLAGS) $(DIX_CFLAGS)

+

+EXTRA_DIST = $(sdk_HEADERS)

diff --git a/xorg-server/hw/xfree86/os-support/bus/Pci.c b/xorg-server/hw/xfree86/os-support/bus/Pci.c
index 7151cc885..8da149d16 100644
--- a/xorg-server/hw/xfree86/os-support/bus/Pci.c
+++ b/xorg-server/hw/xfree86/os-support/bus/Pci.c
@@ -124,19 +124,8 @@
 #include <xorg-config.h>

 #endif

 

-#include <errno.h>

-#include <signal.h>

-#include "compiler.h"

-#include "xf86.h"

-#include "xf86Priv.h"

-#define XF86_OS_PRIVS

-#include "xf86_OSproc.h"

 #include "Pci.h"

 

-#include <pciaccess.h>

-

-/* Global data */

-

 PCITAG

 pciTag(int busnum, int devnum, int funcnum)

 {

diff --git a/xorg-server/hw/xfree86/os-support/bus/Pci.h b/xorg-server/hw/xfree86/os-support/bus/Pci.h
index 618dd3783..fb0ad41f6 100644
--- a/xorg-server/hw/xfree86/os-support/bus/Pci.h
+++ b/xorg-server/hw/xfree86/os-support/bus/Pci.h
@@ -133,11 +133,6 @@
 

 #define PCI_MAKE_BUS(d,b)    ((((d) & (PCI_DOM_MASK)) << 8) | ((b) & 0xffu))

 

-#define PCI_DOM_FROM_TAG(tag)  (((tag) >> 24) & (PCI_DOM_MASK))

-#define PCI_BUS_FROM_TAG(tag)  (((tag) >> 16) & (PCI_DOMBUS_MASK))

-#define PCI_DEV_FROM_TAG(tag)  (((tag) & 0x0000f800u) >> 11)

-#define PCI_FUNC_FROM_TAG(tag) (((tag) & 0x00000700u) >> 8)

-

 #define PCI_DOM_FROM_BUS(bus)  (((bus) >> 8) & (PCI_DOM_MASK))

 #define PCI_BUS_NO_DOMAIN(bus) ((bus) & 0xffu)

 #define PCI_TAG_NO_DOMAIN(tag) ((tag) & 0x00ffff00u)

diff --git a/xorg-server/hw/xfree86/os-support/bus/linuxPci.c b/xorg-server/hw/xfree86/os-support/bus/linuxPci.c
index 289315ebc..77f724bf1 100644
--- a/xorg-server/hw/xfree86/os-support/bus/linuxPci.c
+++ b/xorg-server/hw/xfree86/os-support/bus/linuxPci.c
@@ -1,454 +1,450 @@
-/*
- * Copyright 1998 by Concurrent Computer Corporation
- *
- * Permission to use, copy, modify, distribute, and sell this software
- * and its documentation for any purpose is hereby granted without fee,
- * provided that the above copyright notice appear in all copies and that
- * both that copyright notice and this permission notice appear in
- * supporting documentation, and that the name of Concurrent Computer
- * Corporation not be used in advertising or publicity pertaining to
- * distribution of the software without specific, written prior
- * permission.  Concurrent Computer Corporation makes no representations
- * about the suitability of this software for any purpose.  It is
- * provided "as is" without express or implied warranty.
- *
- * CONCURRENT COMPUTER CORPORATION DISCLAIMS ALL WARRANTIES WITH REGARD
- * TO THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
- * AND FITNESS, IN NO EVENT SHALL CONCURRENT COMPUTER CORPORATION BE
- * LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY
- * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS,
- * WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,
- * ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS
- * SOFTWARE.
- *
- * Copyright 1998 by Metro Link Incorporated
- *
- * Permission to use, copy, modify, distribute, and sell this software
- * and its documentation for any purpose is hereby granted without fee,
- * provided that the above copyright notice appear in all copies and that
- * both that copyright notice and this permission notice appear in
- * supporting documentation, and that the name of Metro Link
- * Incorporated not be used in advertising or publicity pertaining to
- * distribution of the software without specific, written prior
- * permission.  Metro Link Incorporated makes no representations
- * about the suitability of this software for any purpose.  It is
- * provided "as is" without express or implied warranty.
- *
- * METRO LINK INCORPORATED DISCLAIMS ALL WARRANTIES WITH REGARD
- * TO THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
- * AND FITNESS, IN NO EVENT SHALL METRO LINK INCORPORATED BE
- * LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY
- * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS,
- * WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,
- * ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS
- * SOFTWARE.
- */
-
-#ifdef HAVE_XORG_CONFIG_H
-#include <xorg-config.h>
-#endif
-
-#include <stdio.h>
-#include "compiler.h"
-#include "xf86.h"
-#include "xf86Priv.h"
-#include "xf86_OSlib.h"
-#include "Pci.h"
-#include <dirent.h>
-
-static const struct pci_id_match match_host_bridge = {
-    PCI_MATCH_ANY, PCI_MATCH_ANY, PCI_MATCH_ANY, PCI_MATCH_ANY,
-    (PCI_CLASS_BRIDGE << 16) | (PCI_SUBCLASS_BRIDGE_HOST << 8),
-    0x0000ffff00, 0
-};
-
-#define MAX_DOMAINS 257
-static pointer DomainMmappedIO[MAX_DOMAINS];
-
-void
-linuxPciInit(void)
-{
-    memset(DomainMmappedIO, 0, sizeof(DomainMmappedIO));
-}
-
-/**
- * \bug
- * The generation of the procfs file name for the domain != 0 case may not be 
- * correct.
- */
-static int
-linuxPciOpenFile(struct pci_device *dev, Bool write)
-{
-    static struct pci_device *last_dev = NULL;
-    static int	fd = -1,is_write = 0;
-    char		file[64];
-    struct stat	ignored;
-    static int is26 = -1;
-
-    if (dev == NULL) {
-	return -1;
-    }
-
-    if (is26 == -1) {
-	is26 = (stat("/sys/bus/pci", &ignored) < 0) ? 0 : 1;
-    }
-	
-    if (fd == -1 || (write && (!is_write)) || (last_dev != dev)) {
-	if (fd != -1) {
-	    close(fd);
-	    fd = -1;
-	}
-
-	if (is26) {
-	    sprintf(file,"/sys/bus/pci/devices/%04u:%02x:%02x.%01x/config",
-		    dev->domain, dev->bus, dev->dev, dev->func);
-	} else {
-	    if (dev->domain == 0) {
-		sprintf(file,"/proc/bus/pci/%02x", dev->bus);
-		if (stat(file, &ignored) < 0) {
-		    sprintf(file, "/proc/bus/pci/0000:%02x/%02x.%1x",
-			    dev->bus, dev->dev, dev->func);
-		} else {
-		    sprintf(file, "/proc/bus/pci/%02x/%02x.%1x",
-			    dev->bus, dev->dev, dev->func);
-		}
-	    } else {
-		sprintf(file,"/proc/bus/pci/%02x%02x", dev->domain, dev->bus);
-		if (stat(file, &ignored) < 0) {
-		    sprintf(file, "/proc/bus/pci/%04x:%04x/%02x.%1x",
-			    dev->domain, dev->bus, dev->dev, dev->func);
-		} else {
-		    sprintf(file, "/proc/bus/pci/%02x%02x/%02x.%1x",
-			    dev->domain, dev->bus, dev->dev, dev->func);
-		}
-	    }
-	}
-
-	if (write) {
-	    fd = open(file,O_RDWR);
-	    if (fd != -1) is_write = TRUE;
-	} else {
-	    switch (is_write) {
-	    case TRUE:
-		fd = open(file,O_RDWR);
-		if (fd > -1)
-		    break;
-	    default:
-		fd = open(file,O_RDONLY);
-		is_write = FALSE;
-	    }
-	}
-
-	last_dev = dev;
-    }
-
-    return fd;
-}
-
-/*
- * Compiling the following simply requires the presence of <linux/pci.c>.
- * Actually running this is another matter altogether...
- *
- * This scheme requires that the kernel allow mmap()'ing of a host bridge's I/O
- * and memory spaces through its /proc/bus/pci/BUS/DFN entry.  Which one is
- * determined by a prior ioctl().
- *
- * For the sparc64 port, this means 2.4.12 or later.  For ppc, this
- * functionality is almost, but not quite there yet.  Alpha and other kernel
- * ports to multi-domain architectures still need to implement this.
- *
- * This scheme is also predicated on the use of an IOADDRESS compatible type to
- * designate I/O addresses.  Although IOADDRESS is defined as an unsigned
- * integral type, it is actually the virtual address of, i.e. a pointer to, the
- * I/O port to access.  And so, the inX/outX macros in "compiler.h" need to be
- * #define'd appropriately (as is done on SPARC's).
- *
- * Another requirement to port this scheme to another multi-domain architecture
- * is to add the appropriate entries in the pciControllerSizes array below.
- *
- * TO DO:  Address the deleterious reaction some host bridges have to master
- *         aborts.  This is already done for secondary PCI buses, but not yet
- *         for accesses to primary buses (except for the SPARC port, where
- *         master aborts are avoided during PCI scans).
- */
-
-#include <linux/pci.h>
-
-#ifndef PCIIOC_BASE		/* Ioctls for /proc/bus/pci/X/Y nodes. */
-#define PCIIOC_BASE		('P' << 24 | 'C' << 16 | 'I' << 8)
-
-/* Get controller for PCI device. */
-#define PCIIOC_CONTROLLER	(PCIIOC_BASE | 0x00)
-/* Set mmap state to I/O space. */
-#define PCIIOC_MMAP_IS_IO	(PCIIOC_BASE | 0x01)
-/* Set mmap state to MEM space. */
-#define PCIIOC_MMAP_IS_MEM	(PCIIOC_BASE | 0x02)
-/* Enable/disable write-combining. */
-#define PCIIOC_WRITE_COMBINE	(PCIIOC_BASE | 0x03)
-
-#endif
-
-/* This probably shouldn't be Linux-specific */
-static struct pci_device *
-get_parent_bridge(struct pci_device *dev)
-{
-    struct pci_id_match bridge_match = {
-	PCI_MATCH_ANY, PCI_MATCH_ANY, PCI_MATCH_ANY, PCI_MATCH_ANY,
-	(PCI_CLASS_BRIDGE << 16) | (PCI_SUBCLASS_BRIDGE_PCI << 8),
-	0
-    };
-    struct pci_device *bridge;
-    struct pci_device_iterator *iter;
-
-    if (dev == NULL) {
-	return NULL;
-    }
-
-    iter = pci_id_match_iterator_create(& bridge_match);
-    if (iter == NULL) {
-	return NULL;
-    }
-
-    while ((bridge = pci_device_next(iter)) != NULL) {
-	if (bridge->domain == dev->domain) {
-	    const struct pci_bridge_info *info = 
-		pci_device_get_bridge_info(bridge);
-
-	    if (info != NULL) {
-		if (info->secondary_bus == dev->bus) {
-		    break;
-		}
-	    }
-	}
-    }
-
-    pci_iterator_destroy(iter);
-
-    return bridge;
-}
-
-/*
- * This is ugly, but until I can extract this information from the kernel,
- * it'll have to do.  The default I/O space size is 64K, and 4G for memory.
- * Anything else needs to go in this table.  (PowerPC folk take note.)
- *
- * Note that Linux/SPARC userland is 32-bit, so 4G overflows to zero here.
- *
- * Please keep this table in ascending vendor/device order.
- */
-static const struct pciSizes {
-    unsigned short vendor, device;
-    unsigned long io_size, mem_size;
-} pciControllerSizes[] = {
-    {
-	PCI_VENDOR_SUN, PCI_CHIP_PSYCHO,
-	1U << 16, 1U << 31
-    },
-    {
-	PCI_VENDOR_SUN, PCI_CHIP_SCHIZO,
-	1U << 24, 1U << 31	/* ??? */
-    },
-    {
-	PCI_VENDOR_SUN, PCI_CHIP_SABRE,
-	1U << 24, (unsigned long)(1ULL << 32)
-    },
-    {
-	PCI_VENDOR_SUN, PCI_CHIP_HUMMINGBIRD,
-	1U << 24, (unsigned long)(1ULL << 32)
-    }
-};
-#define NUM_SIZES (sizeof(pciControllerSizes) / sizeof(pciControllerSizes[0]))
-
-static const struct pciSizes *
-linuxGetSizesStruct(const struct pci_device *dev)
-{
-    static const struct pciSizes default_size = {
-	0, 0, 1U << 16, (unsigned long)(1ULL << 32)
-    };
-    int          i;
-
-    /* Look up vendor/device */
-    if (dev != NULL) {
-	for (i = 0;  i < NUM_SIZES;  i++) {
-	    if ((dev->vendor_id == pciControllerSizes[i].vendor)
-		&& (dev->device_id == pciControllerSizes[i].device)) {
-		return & pciControllerSizes[i];
-	    }
-	}
-    }
-
-    /* Default to 64KB I/O and 4GB memory. */
-    return & default_size;
-}
-
-static __inline__ unsigned long
-linuxGetIOSize(const struct pci_device *dev)
-{
-    const struct pciSizes * const sizes = linuxGetSizesStruct(dev);
-    return sizes->io_size;
-}
-
-static pointer
-linuxMapPci(int ScreenNum, int Flags, struct pci_device *dev,
-	    ADDRESS Base, unsigned long Size, int mmap_ioctl)
-{
-    /* Align to page boundary */
-    const ADDRESS realBase = Base & ~(getpagesize() - 1);
-    const ADDRESS Offset = Base - realBase;
-
-    do {
-	unsigned char *result;
-	int fd, mmapflags, prot;
-
-	xf86InitVidMem();
-
-	/* If dev is NULL, linuxPciOpenFile will return -1, and this routine
-	 * will fail gracefully.
-	 */
-        prot = ((Flags & VIDMEM_READONLY) == 0);
-        if (((fd = linuxPciOpenFile(dev, prot)) < 0) ||
-	    (ioctl(fd, mmap_ioctl, 0) < 0))
-	    break;
-
-/* Note:  IA-64 doesn't compile this and doesn't need to */
-#ifdef __ia64__
-
-# ifndef  MAP_WRITECOMBINED
-#  define MAP_WRITECOMBINED 0x00010000
-# endif
-# ifndef  MAP_NONCACHED
-#  define MAP_NONCACHED     0x00020000
-# endif
-
-	if (Flags & VIDMEM_FRAMEBUFFER)
-	    mmapflags = MAP_SHARED | MAP_WRITECOMBINED;
-	else
-	    mmapflags = MAP_SHARED | MAP_NONCACHED;
-
-#else /* !__ia64__ */
-
-	mmapflags = (Flags & VIDMEM_FRAMEBUFFER) / VIDMEM_FRAMEBUFFER;
-
-	if (ioctl(fd, PCIIOC_WRITE_COMBINE, mmapflags) < 0)
-	    break;
-
-	mmapflags = MAP_SHARED;
-
-#endif /* ?__ia64__ */
-
-
-	if (Flags & VIDMEM_READONLY)
-	    prot = PROT_READ;
-	else
-	    prot = PROT_READ | PROT_WRITE;
-
-	result = mmap(NULL, Size + Offset, prot, mmapflags, fd, realBase);
-
-	if (!result || ((pointer)result == MAP_FAILED))
-	    return NULL;
-
-	xf86MakeNewMapping(ScreenNum, Flags, realBase, Size + Offset, result);
-
-	return result + Offset;
-    } while (0);
-
-    if (mmap_ioctl == PCIIOC_MMAP_IS_MEM)
-	return xf86MapVidMem(ScreenNum, Flags, Base, Size);
-
-    return NULL;
-}
-
-static int
-linuxOpenLegacy(struct pci_device *dev, char *name)
-{
-    static const char PREFIX[] = "/sys/class/pci_bus/%04x:%02x/%s";
-    char path[sizeof(PREFIX) + 10];
-    int fd = -1;
-
-    while (dev != NULL) {
-	snprintf(path, sizeof(path) - 1, PREFIX, dev->domain, dev->bus, name);
-	fd = open(path, O_RDWR);
-	if (fd >= 0) {
-	    return fd;
-	}
-
-	dev = get_parent_bridge(dev);
-    }
-
-    return fd;
-}
-
-/*
- * xf86MapDomainMemory - memory map PCI domain memory
- *
- * This routine maps the memory region in the domain specified by Tag and
- * returns a pointer to it.  The pointer is saved for future use if it's in
- * the legacy ISA memory space (memory in a domain between 0 and 1MB).
- */
-pointer
-xf86MapDomainMemory(int ScreenNum, int Flags, struct pci_device *dev,
-		    ADDRESS Base, unsigned long Size)
-{
-    int fd = -1;
-    pointer addr;
-
-    /*
-     * We use /proc/bus/pci on non-legacy addresses or if the Linux sysfs
-     * legacy_mem interface is unavailable.
-     */
-    if ((Base > 1024*1024) || ((fd = linuxOpenLegacy(dev, "legacy_mem")) < 0))
-	return linuxMapPci(ScreenNum, Flags, dev, Base, Size,
-			   PCIIOC_MMAP_IS_MEM);
-    else
-	addr = mmap(NULL, Size, PROT_READ|PROT_WRITE, MAP_SHARED, fd, Base);
-
-    if (fd >= 0)
-	close(fd);
-    if (addr == NULL || addr == MAP_FAILED) {
-	perror("mmap failure");
-	FatalError("xf86MapDomainMem():  mmap() failure\n");
-    }
-    return addr;
-}
-
-/**
- * Map I/O space in this domain
- *
- * Each domain has a legacy ISA I/O space.  This routine will try to
- * map it using the Linux sysfs legacy_io interface.  If that fails,
- * it'll fall back to using /proc/bus/pci.
- *
- * If the legacy_io interface \b does exist, the file descriptor (\c fd below)
- * will be saved in the \c DomainMmappedIO array in the upper bits of the
- * pointer.  Callers will do I/O with small port numbers (<64k values), so
- * the platform I/O code can extract the port number and the \c fd, \c lseek
- * to the port number in the legacy_io file, and issue the read or write.
- *
- * This has no means of returning failure, so all errors are fatal
- */
-IOADDRESS
-xf86MapLegacyIO(struct pci_device *dev)
-{
-    const int domain = dev->domain;
-    struct pci_device *bridge = get_parent_bridge(dev);
-    int fd;
-
-    if (domain >= MAX_DOMAINS)
-	FatalError("xf86MapLegacyIO():  domain out of range\n");
-
-    if (DomainMmappedIO[domain] == NULL) {
-	/* Permanently map all of I/O space */
-	fd = linuxOpenLegacy(bridge, "legacy_io");
-	if (fd < 0) {
-	    DomainMmappedIO[domain] = linuxMapPci(-1, VIDMEM_MMIO, bridge,
-						  0, linuxGetIOSize(bridge),
-						  PCIIOC_MMAP_IS_IO);
-	}
-	else { /* legacy_io file exists, encode fd */
-	    DomainMmappedIO[domain] = (pointer)(intptr_t)(fd << 24);
-	}
-    }
-
-    return (IOADDRESS)DomainMmappedIO[domain];
-}
-
+/*

+ * Copyright 1998 by Concurrent Computer Corporation

+ *

+ * Permission to use, copy, modify, distribute, and sell this software

+ * and its documentation for any purpose is hereby granted without fee,

+ * provided that the above copyright notice appear in all copies and that

+ * both that copyright notice and this permission notice appear in

+ * supporting documentation, and that the name of Concurrent Computer

+ * Corporation not be used in advertising or publicity pertaining to

+ * distribution of the software without specific, written prior

+ * permission.  Concurrent Computer Corporation makes no representations

+ * about the suitability of this software for any purpose.  It is

+ * provided "as is" without express or implied warranty.

+ *

+ * CONCURRENT COMPUTER CORPORATION DISCLAIMS ALL WARRANTIES WITH REGARD

+ * TO THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY

+ * AND FITNESS, IN NO EVENT SHALL CONCURRENT COMPUTER CORPORATION BE

+ * LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY

+ * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS,

+ * WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,

+ * ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS

+ * SOFTWARE.

+ *

+ * Copyright 1998 by Metro Link Incorporated

+ *

+ * Permission to use, copy, modify, distribute, and sell this software

+ * and its documentation for any purpose is hereby granted without fee,

+ * provided that the above copyright notice appear in all copies and that

+ * both that copyright notice and this permission notice appear in

+ * supporting documentation, and that the name of Metro Link

+ * Incorporated not be used in advertising or publicity pertaining to

+ * distribution of the software without specific, written prior

+ * permission.  Metro Link Incorporated makes no representations

+ * about the suitability of this software for any purpose.  It is

+ * provided "as is" without express or implied warranty.

+ *

+ * METRO LINK INCORPORATED DISCLAIMS ALL WARRANTIES WITH REGARD

+ * TO THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY

+ * AND FITNESS, IN NO EVENT SHALL METRO LINK INCORPORATED BE

+ * LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY

+ * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS,

+ * WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,

+ * ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS

+ * SOFTWARE.

+ */

+

+#ifdef HAVE_XORG_CONFIG_H

+#include <xorg-config.h>

+#endif

+

+#include <stdio.h>

+#include "xf86_OSlib.h"

+#include "Pci.h"

+

+static const struct pci_id_match match_host_bridge = {

+    PCI_MATCH_ANY, PCI_MATCH_ANY, PCI_MATCH_ANY, PCI_MATCH_ANY,

+    (PCI_CLASS_BRIDGE << 16) | (PCI_SUBCLASS_BRIDGE_HOST << 8),

+    0x0000ffff00, 0

+};

+

+#define MAX_DOMAINS 257

+static pointer DomainMmappedIO[MAX_DOMAINS];

+

+void

+linuxPciInit(void)

+{

+    memset(DomainMmappedIO, 0, sizeof(DomainMmappedIO));

+}

+

+/**

+ * \bug

+ * The generation of the procfs file name for the domain != 0 case may not be 

+ * correct.

+ */

+static int

+linuxPciOpenFile(struct pci_device *dev, Bool write)

+{

+    static struct pci_device *last_dev = NULL;

+    static int	fd = -1,is_write = 0;

+    char		file[64];

+    struct stat	ignored;

+    static int is26 = -1;

+

+    if (dev == NULL) {

+	return -1;

+    }

+

+    if (is26 == -1) {

+	is26 = (stat("/sys/bus/pci", &ignored) < 0) ? 0 : 1;

+    }

+	

+    if (fd == -1 || (write && (!is_write)) || (last_dev != dev)) {

+	if (fd != -1) {

+	    close(fd);

+	    fd = -1;

+	}

+

+	if (is26) {

+	    sprintf(file,"/sys/bus/pci/devices/%04u:%02x:%02x.%01x/config",

+		    dev->domain, dev->bus, dev->dev, dev->func);

+	} else {

+	    if (dev->domain == 0) {

+		sprintf(file,"/proc/bus/pci/%02x", dev->bus);

+		if (stat(file, &ignored) < 0) {

+		    sprintf(file, "/proc/bus/pci/0000:%02x/%02x.%1x",

+			    dev->bus, dev->dev, dev->func);

+		} else {

+		    sprintf(file, "/proc/bus/pci/%02x/%02x.%1x",

+			    dev->bus, dev->dev, dev->func);

+		}

+	    } else {

+		sprintf(file,"/proc/bus/pci/%02x%02x", dev->domain, dev->bus);

+		if (stat(file, &ignored) < 0) {

+		    sprintf(file, "/proc/bus/pci/%04x:%04x/%02x.%1x",

+			    dev->domain, dev->bus, dev->dev, dev->func);

+		} else {

+		    sprintf(file, "/proc/bus/pci/%02x%02x/%02x.%1x",

+			    dev->domain, dev->bus, dev->dev, dev->func);

+		}

+	    }

+	}

+

+	if (write) {

+	    fd = open(file,O_RDWR);

+	    if (fd != -1) is_write = TRUE;

+	} else {

+	    switch (is_write) {

+	    case TRUE:

+		fd = open(file,O_RDWR);

+		if (fd > -1)

+		    break;

+	    default:

+		fd = open(file,O_RDONLY);

+		is_write = FALSE;

+	    }

+	}

+

+	last_dev = dev;

+    }

+

+    return fd;

+}

+

+/*

+ * Compiling the following simply requires the presence of <linux/pci.c>.

+ * Actually running this is another matter altogether...

+ *

+ * This scheme requires that the kernel allow mmap()'ing of a host bridge's I/O

+ * and memory spaces through its /proc/bus/pci/BUS/DFN entry.  Which one is

+ * determined by a prior ioctl().

+ *

+ * For the sparc64 port, this means 2.4.12 or later.  For ppc, this

+ * functionality is almost, but not quite there yet.  Alpha and other kernel

+ * ports to multi-domain architectures still need to implement this.

+ *

+ * This scheme is also predicated on the use of an IOADDRESS compatible type to

+ * designate I/O addresses.  Although IOADDRESS is defined as an unsigned

+ * integral type, it is actually the virtual address of, i.e. a pointer to, the

+ * I/O port to access.  And so, the inX/outX macros in "compiler.h" need to be

+ * #define'd appropriately (as is done on SPARC's).

+ *

+ * Another requirement to port this scheme to another multi-domain architecture

+ * is to add the appropriate entries in the pciControllerSizes array below.

+ *

+ * TO DO:  Address the deleterious reaction some host bridges have to master

+ *         aborts.  This is already done for secondary PCI buses, but not yet

+ *         for accesses to primary buses (except for the SPARC port, where

+ *         master aborts are avoided during PCI scans).

+ */

+

+#include <linux/pci.h>

+

+#ifndef PCIIOC_BASE		/* Ioctls for /proc/bus/pci/X/Y nodes. */

+#define PCIIOC_BASE		('P' << 24 | 'C' << 16 | 'I' << 8)

+

+/* Get controller for PCI device. */

+#define PCIIOC_CONTROLLER	(PCIIOC_BASE | 0x00)

+/* Set mmap state to I/O space. */

+#define PCIIOC_MMAP_IS_IO	(PCIIOC_BASE | 0x01)

+/* Set mmap state to MEM space. */

+#define PCIIOC_MMAP_IS_MEM	(PCIIOC_BASE | 0x02)

+/* Enable/disable write-combining. */

+#define PCIIOC_WRITE_COMBINE	(PCIIOC_BASE | 0x03)

+

+#endif

+

+/* This probably shouldn't be Linux-specific */

+static struct pci_device *

+get_parent_bridge(struct pci_device *dev)

+{

+    struct pci_id_match bridge_match = {

+	PCI_MATCH_ANY, PCI_MATCH_ANY, PCI_MATCH_ANY, PCI_MATCH_ANY,

+	(PCI_CLASS_BRIDGE << 16) | (PCI_SUBCLASS_BRIDGE_PCI << 8),

+	0

+    };

+    struct pci_device *bridge;

+    struct pci_device_iterator *iter;

+

+    if (dev == NULL) {

+	return NULL;

+    }

+

+    iter = pci_id_match_iterator_create(& bridge_match);

+    if (iter == NULL) {

+	return NULL;

+    }

+

+    while ((bridge = pci_device_next(iter)) != NULL) {

+	if (bridge->domain == dev->domain) {

+	    const struct pci_bridge_info *info = 

+		pci_device_get_bridge_info(bridge);

+

+	    if (info != NULL) {

+		if (info->secondary_bus == dev->bus) {

+		    break;

+		}

+	    }

+	}

+    }

+

+    pci_iterator_destroy(iter);

+

+    return bridge;

+}

+

+/*

+ * This is ugly, but until I can extract this information from the kernel,

+ * it'll have to do.  The default I/O space size is 64K, and 4G for memory.

+ * Anything else needs to go in this table.  (PowerPC folk take note.)

+ *

+ * Note that Linux/SPARC userland is 32-bit, so 4G overflows to zero here.

+ *

+ * Please keep this table in ascending vendor/device order.

+ */

+static const struct pciSizes {

+    unsigned short vendor, device;

+    unsigned long io_size, mem_size;

+} pciControllerSizes[] = {

+    {

+	PCI_VENDOR_SUN, PCI_CHIP_PSYCHO,

+	1U << 16, 1U << 31

+    },

+    {

+	PCI_VENDOR_SUN, PCI_CHIP_SCHIZO,

+	1U << 24, 1U << 31	/* ??? */

+    },

+    {

+	PCI_VENDOR_SUN, PCI_CHIP_SABRE,

+	1U << 24, (unsigned long)(1ULL << 32)

+    },

+    {

+	PCI_VENDOR_SUN, PCI_CHIP_HUMMINGBIRD,

+	1U << 24, (unsigned long)(1ULL << 32)

+    }

+};

+#define NUM_SIZES (sizeof(pciControllerSizes) / sizeof(pciControllerSizes[0]))

+

+static const struct pciSizes *

+linuxGetSizesStruct(const struct pci_device *dev)

+{

+    static const struct pciSizes default_size = {

+	0, 0, 1U << 16, (unsigned long)(1ULL << 32)

+    };

+    int          i;

+

+    /* Look up vendor/device */

+    if (dev != NULL) {

+	for (i = 0;  i < NUM_SIZES;  i++) {

+	    if ((dev->vendor_id == pciControllerSizes[i].vendor)

+		&& (dev->device_id == pciControllerSizes[i].device)) {

+		return & pciControllerSizes[i];

+	    }

+	}

+    }

+

+    /* Default to 64KB I/O and 4GB memory. */

+    return & default_size;

+}

+

+static __inline__ unsigned long

+linuxGetIOSize(const struct pci_device *dev)

+{

+    const struct pciSizes * const sizes = linuxGetSizesStruct(dev);

+    return sizes->io_size;

+}

+

+static pointer

+linuxMapPci(int ScreenNum, int Flags, struct pci_device *dev,

+	    ADDRESS Base, unsigned long Size, int mmap_ioctl)

+{

+    /* Align to page boundary */

+    const ADDRESS realBase = Base & ~(getpagesize() - 1);

+    const ADDRESS Offset = Base - realBase;

+

+    do {

+	unsigned char *result;

+	int fd, mmapflags, prot;

+

+	xf86InitVidMem();

+

+	/* If dev is NULL, linuxPciOpenFile will return -1, and this routine

+	 * will fail gracefully.

+	 */

+        prot = ((Flags & VIDMEM_READONLY) == 0);

+        if (((fd = linuxPciOpenFile(dev, prot)) < 0) ||

+	    (ioctl(fd, mmap_ioctl, 0) < 0))

+	    break;

+

+/* Note:  IA-64 doesn't compile this and doesn't need to */

+#ifdef __ia64__

+

+# ifndef  MAP_WRITECOMBINED

+#  define MAP_WRITECOMBINED 0x00010000

+# endif

+# ifndef  MAP_NONCACHED

+#  define MAP_NONCACHED     0x00020000

+# endif

+

+	if (Flags & VIDMEM_FRAMEBUFFER)

+	    mmapflags = MAP_SHARED | MAP_WRITECOMBINED;

+	else

+	    mmapflags = MAP_SHARED | MAP_NONCACHED;

+

+#else /* !__ia64__ */

+

+	mmapflags = (Flags & VIDMEM_FRAMEBUFFER) / VIDMEM_FRAMEBUFFER;

+

+	if (ioctl(fd, PCIIOC_WRITE_COMBINE, mmapflags) < 0)

+	    break;

+

+	mmapflags = MAP_SHARED;

+

+#endif /* ?__ia64__ */

+

+

+	if (Flags & VIDMEM_READONLY)

+	    prot = PROT_READ;

+	else

+	    prot = PROT_READ | PROT_WRITE;

+

+	result = mmap(NULL, Size + Offset, prot, mmapflags, fd, realBase);

+

+	if (!result || ((pointer)result == MAP_FAILED))

+	    return NULL;

+

+	xf86MakeNewMapping(ScreenNum, Flags, realBase, Size + Offset, result);

+

+	return result + Offset;

+    } while (0);

+

+    if (mmap_ioctl == PCIIOC_MMAP_IS_MEM)

+	return xf86MapVidMem(ScreenNum, Flags, Base, Size);

+

+    return NULL;

+}

+

+static int

+linuxOpenLegacy(struct pci_device *dev, char *name)

+{

+    static const char PREFIX[] = "/sys/class/pci_bus/%04x:%02x/%s";

+    char path[sizeof(PREFIX) + 10];

+    int fd = -1;

+

+    while (dev != NULL) {

+	snprintf(path, sizeof(path) - 1, PREFIX, dev->domain, dev->bus, name);

+	fd = open(path, O_RDWR);

+	if (fd >= 0) {

+	    return fd;

+	}

+

+	dev = get_parent_bridge(dev);

+    }

+

+    return fd;

+}

+

+/*

+ * xf86MapDomainMemory - memory map PCI domain memory

+ *

+ * This routine maps the memory region in the domain specified by Tag and

+ * returns a pointer to it.  The pointer is saved for future use if it's in

+ * the legacy ISA memory space (memory in a domain between 0 and 1MB).

+ */

+pointer

+xf86MapDomainMemory(int ScreenNum, int Flags, struct pci_device *dev,

+		    ADDRESS Base, unsigned long Size)

+{

+    int fd = -1;

+    pointer addr;

+

+    /*

+     * We use /proc/bus/pci on non-legacy addresses or if the Linux sysfs

+     * legacy_mem interface is unavailable.

+     */

+    if ((Base > 1024*1024) || ((fd = linuxOpenLegacy(dev, "legacy_mem")) < 0))

+	return linuxMapPci(ScreenNum, Flags, dev, Base, Size,

+			   PCIIOC_MMAP_IS_MEM);

+    else

+	addr = mmap(NULL, Size, PROT_READ|PROT_WRITE, MAP_SHARED, fd, Base);

+

+    if (fd >= 0)

+	close(fd);

+    if (addr == NULL || addr == MAP_FAILED) {

+	perror("mmap failure");

+	FatalError("xf86MapDomainMem():  mmap() failure\n");

+    }

+    return addr;

+}

+

+/**

+ * Map I/O space in this domain

+ *

+ * Each domain has a legacy ISA I/O space.  This routine will try to

+ * map it using the Linux sysfs legacy_io interface.  If that fails,

+ * it'll fall back to using /proc/bus/pci.

+ *

+ * If the legacy_io interface \b does exist, the file descriptor (\c fd below)

+ * will be saved in the \c DomainMmappedIO array in the upper bits of the

+ * pointer.  Callers will do I/O with small port numbers (<64k values), so

+ * the platform I/O code can extract the port number and the \c fd, \c lseek

+ * to the port number in the legacy_io file, and issue the read or write.

+ *

+ * This has no means of returning failure, so all errors are fatal

+ */

+IOADDRESS

+xf86MapLegacyIO(struct pci_device *dev)

+{

+    const int domain = dev->domain;

+    struct pci_device *bridge = get_parent_bridge(dev);

+    int fd;

+

+    if (domain >= MAX_DOMAINS)

+	FatalError("xf86MapLegacyIO():  domain out of range\n");

+

+    if (DomainMmappedIO[domain] == NULL) {

+	/* Permanently map all of I/O space */

+	fd = linuxOpenLegacy(bridge, "legacy_io");

+	if (fd < 0) {

+	    DomainMmappedIO[domain] = linuxMapPci(-1, VIDMEM_MMIO, bridge,

+						  0, linuxGetIOSize(bridge),

+						  PCIIOC_MMAP_IS_IO);

+	}

+	else { /* legacy_io file exists, encode fd */

+	    DomainMmappedIO[domain] = (pointer)(intptr_t)(fd << 24);

+	}

+    }

+

+    return (IOADDRESS)DomainMmappedIO[domain];

+}

+

diff --git a/xorg-server/hw/xfree86/os-support/linux/lnx_video.c b/xorg-server/hw/xfree86/os-support/linux/lnx_video.c
index a515b4080..8aa2506a9 100644
--- a/xorg-server/hw/xfree86/os-support/linux/lnx_video.c
+++ b/xorg-server/hw/xfree86/os-support/linux/lnx_video.c
@@ -61,6 +61,7 @@ static Bool ExtendedEnabled = FALSE;
       !defined(__mc68000__) && \

       !defined(__sparc__) && \

       !defined(__mips__) && \

+      !defined(__nds32__) && \

       !defined(__arm__)

 

 /*

@@ -519,7 +520,7 @@ xf86EnableIO(void)
 #endif

 	}

 	close(fd);

-#elif !defined(__mc68000__) && !defined(__sparc__) && !defined(__mips__) && !defined(__sh__) && !defined(__hppa__) && !defined(__s390__) && !defined(__arm__) && !defined(__m32r__)

+#elif !defined(__mc68000__) && !defined(__sparc__) && !defined(__mips__) && !defined(__sh__) && !defined(__hppa__) && !defined(__s390__) && !defined(__arm__) && !defined(__m32r__) && !defined(__nds32__)

         if (ioperm(0, 1024, 1) || iopl(3)) {

                 if (errno == ENODEV)

                         ErrorF("xf86EnableIOPorts: no I/O ports found\n");

@@ -546,7 +547,7 @@ xf86DisableIO(void)
 #if defined(__powerpc__)

 	munmap(ioBase, 0x20000);

 	ioBase = NULL;

-#elif !defined(__mc68000__) && !defined(__sparc__) && !defined(__mips__) && !defined(__sh__) && !defined(__hppa__) && !defined(__arm__) && !defined(__s390__) && !defined(__m32r__)

+#elif !defined(__mc68000__) && !defined(__sparc__) && !defined(__mips__) && !defined(__sh__) && !defined(__hppa__) && !defined(__arm__) && !defined(__s390__) && !defined(__m32r__) && !defined(__nds32__)

 	iopl(0);

 	ioperm(0, 1024, 0);

 #endif

diff --git a/xorg-server/hw/xfree86/vgahw/vgaHW.h b/xorg-server/hw/xfree86/vgahw/vgaHW.h
index 7e63492d8..d7ac3cc62 100644
--- a/xorg-server/hw/xfree86/vgahw/vgaHW.h
+++ b/xorg-server/hw/xfree86/vgahw/vgaHW.h
@@ -1,235 +1,235 @@
-
-
-/*
- * Copyright (c) 1997,1998 The XFree86 Project, Inc.
- *
- * Loosely based on code bearing the following copyright:
- *
- *   Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany.
- *
- * Author: Dirk Hohndel
- */
-
-#ifndef _VGAHW_H
-#define _VGAHW_H
-
-#include <X11/X.h>
-#include "misc.h"
-#include "input.h"
-#include "scrnintstr.h"
-#include "colormapst.h"
-
-#include "xf86str.h"
-#include "xf86Pci.h"
-
-#include "xf86DDC.h"
-
-#include "globals.h"
-#include <X11/extensions/dpmsconst.h>
-
-extern _X_EXPORT int vgaHWGetIndex(void);
-
-/*
- * access macro
- */
-#define VGAHWPTR(p) ((vgaHWPtr)((p)->privates[vgaHWGetIndex()].ptr))
-
-/* Standard VGA registers */
-#define VGA_ATTR_INDEX		0x3C0
-#define VGA_ATTR_DATA_W		0x3C0
-#define VGA_ATTR_DATA_R		0x3C1
-#define VGA_IN_STAT_0		0x3C2		/* read */
-#define VGA_MISC_OUT_W		0x3C2		/* write */
-#define VGA_ENABLE		0x3C3
-#define VGA_SEQ_INDEX		0x3C4
-#define VGA_SEQ_DATA		0x3C5
-#define VGA_DAC_MASK		0x3C6
-#define VGA_DAC_READ_ADDR	0x3C7
-#define VGA_DAC_WRITE_ADDR	0x3C8
-#define VGA_DAC_DATA		0x3C9
-#define VGA_FEATURE_R		0x3CA		/* read */
-#define VGA_MISC_OUT_R		0x3CC		/* read */
-#define VGA_GRAPH_INDEX		0x3CE
-#define VGA_GRAPH_DATA		0x3CF
-
-#define VGA_IOBASE_MONO		0x3B0
-#define VGA_IOBASE_COLOR	0x3D0
-
-#define VGA_CRTC_INDEX_OFFSET	0x04
-#define VGA_CRTC_DATA_OFFSET	0x05
-#define VGA_IN_STAT_1_OFFSET	0x0A		/* read */
-#define VGA_FEATURE_W_OFFSET	0x0A		/* write */
-
-/* default number of VGA registers stored internally */
-#define VGA_NUM_CRTC 25
-#define VGA_NUM_SEQ 5
-#define VGA_NUM_GFX 9
-#define VGA_NUM_ATTR 21
-
-/* Flags for vgaHWSave() and vgaHWRestore() */
-#define VGA_SR_MODE		0x01
-#define VGA_SR_FONTS		0x02
-#define VGA_SR_CMAP		0x04
-#define VGA_SR_ALL		(VGA_SR_MODE | VGA_SR_FONTS | VGA_SR_CMAP)
-
-/* Defaults for the VGA memory window */
-#define VGA_DEFAULT_PHYS_ADDR	0xA0000
-#define VGA_DEFAULT_MEM_SIZE	(64 * 1024)
-
-/*
- * vgaRegRec contains settings of standard VGA registers.
- */
-typedef struct {
-    unsigned char MiscOutReg;     /* */
-    unsigned char *CRTC;       /* Crtc Controller */
-    unsigned char *Sequencer;   /* Video Sequencer */
-    unsigned char *Graphics;    /* Video Graphics */
-    unsigned char *Attribute;  /* Video Atribute */
-    unsigned char DAC[768];       /* Internal Colorlookuptable */
-    unsigned char numCRTC;	/* number of CRTC registers, def=VGA_NUM_CRTC */
-    unsigned char numSequencer;	/* number of seq registers, def=VGA_NUM_SEQ */
-    unsigned char numGraphics;	/* number of gfx registers, def=VGA_NUM_GFX */
-    unsigned char numAttribute;	/* number of attr registers, def=VGA_NUM_ATTR */
-} vgaRegRec, *vgaRegPtr;
-
-typedef struct _vgaHWRec *vgaHWPtr;
-
-typedef void (*vgaHWWriteIndexProcPtr)(vgaHWPtr hwp, CARD8 indx, CARD8 value);
-typedef CARD8 (*vgaHWReadIndexProcPtr)(vgaHWPtr hwp, CARD8 indx);
-typedef void (*vgaHWWriteProcPtr)(vgaHWPtr hwp, CARD8 value);
-typedef CARD8 (*vgaHWReadProcPtr)(vgaHWPtr hwp);
-typedef void (*vgaHWMiscProcPtr)(vgaHWPtr hwp);
-
-
-/*
- * vgaHWRec contains per-screen information required by the vgahw module.
- *
- * Note, the palette referred to by the paletteEnabled, enablePalette and
- * disablePalette is the 16-entry (+overscan) EGA-compatible palette accessed
- * via the first 17 attribute registers and not the main 8-bit palette.
- */
-typedef struct _vgaHWRec {
-    pointer			Base;		/* Address of "VGA" memory */
-    int				MapSize;	/* Size of "VGA" memory */
-    unsigned long		MapPhys;	/* phys location of VGA mem */
-    int				IOBase;		/* I/O Base address */
-    CARD8 * 			MMIOBase;	/* Pointer to MMIO start */
-    int				MMIOOffset;	/* base + offset + vgareg
-						   = mmioreg */
-    pointer			FontInfo1;	/* save area for fonts in
-							plane 2 */ 
-    pointer			FontInfo2;	/* save area for fonts in	
-							plane 3 */ 
-    pointer			TextInfo;	/* save area for text */ 
-    vgaRegRec			SavedReg;	/* saved registers */
-    vgaRegRec			ModeReg;	/* register settings for
-							current mode */
-    Bool			ShowOverscan;
-    Bool			paletteEnabled;
-    Bool			cmapSaved;
-    ScrnInfoPtr			pScrn;
-    vgaHWWriteIndexProcPtr	writeCrtc;
-    vgaHWReadIndexProcPtr	readCrtc;
-    vgaHWWriteIndexProcPtr	writeGr;
-    vgaHWReadIndexProcPtr	readGr;
-    vgaHWReadProcPtr            readST00;
-    vgaHWReadProcPtr            readST01;
-    vgaHWReadProcPtr            readFCR;
-    vgaHWWriteProcPtr           writeFCR;
-    vgaHWWriteIndexProcPtr	writeAttr;
-    vgaHWReadIndexProcPtr	readAttr;
-    vgaHWWriteIndexProcPtr	writeSeq;
-    vgaHWReadIndexProcPtr	readSeq;
-    vgaHWWriteProcPtr		writeMiscOut;
-    vgaHWReadProcPtr		readMiscOut;
-    vgaHWMiscProcPtr		enablePalette;
-    vgaHWMiscProcPtr		disablePalette;
-    vgaHWWriteProcPtr		writeDacMask;
-    vgaHWReadProcPtr		readDacMask;
-    vgaHWWriteProcPtr		writeDacWriteAddr;
-    vgaHWWriteProcPtr		writeDacReadAddr;
-    vgaHWWriteProcPtr		writeDacData;
-    vgaHWReadProcPtr		readDacData;
-    pointer                     ddc;
-    IOADDRESS			PIOOffset;	/* offset + vgareg
-						   = pioreg */
-    vgaHWReadProcPtr		readEnable;
-    vgaHWWriteProcPtr		writeEnable;
-    struct pci_device          *dev;
-} vgaHWRec;
-
-/* Some macros that VGA drivers can use in their ChipProbe() function */
-#define VGAHW_GET_IOBASE()	((inb(VGA_MISC_OUT_R) & 0x01) ?		      \
-					 VGA_IOBASE_COLOR : VGA_IOBASE_MONO)
-
-#define OVERSCAN 0x11		/* Index of OverScan register */
-
-/* Flags that define how overscan correction should take place */
-#define KGA_FIX_OVERSCAN  1   /* overcan correction required */
-#define KGA_ENABLE_ON_ZERO 2  /* if possible enable display at beginning */
-                              /* of next scanline/frame                  */
-#define KGA_BE_TOT_DEC 4      /* always fix problem by setting blank end */
-			      /* to total - 1                            */
-#define BIT_PLANE 3		/* Which plane we write to in mono mode */
-#define BITS_PER_GUN 6
-#define COLORMAP_SIZE 256
-
-#if defined(__powerpc__) || defined(__arm__) || defined(__s390__)
-#define DACDelay(hw) /* No legacy VGA support */
-#else
-#define DACDelay(hw)							      \
-	do {								      \
-	    (void)inb((hw)->PIOOffset + (hw)->IOBase + VGA_IN_STAT_1_OFFSET); \
-	    (void)inb((hw)->PIOOffset + (hw)->IOBase + VGA_IN_STAT_1_OFFSET); \
-	} while (0)
-#endif
-
-/* Function Prototypes */
-
-/* vgaHW.c */
-
-typedef void vgaHWProtectProc(ScrnInfoPtr, Bool);
-typedef void vgaHWBlankScreenProc(ScrnInfoPtr, Bool);
-
-extern _X_EXPORT void vgaHWSetStdFuncs(vgaHWPtr hwp);
-extern _X_EXPORT void vgaHWSetMmioFuncs(vgaHWPtr hwp, CARD8 *base, int offset);
-extern _X_EXPORT void vgaHWProtect(ScrnInfoPtr pScrn, Bool on);
-extern _X_EXPORT vgaHWProtectProc *vgaHWProtectWeak(void);
-extern _X_EXPORT Bool vgaHWSaveScreen(ScreenPtr pScreen, int mode);
-extern _X_EXPORT void vgaHWBlankScreen(ScrnInfoPtr pScrn, Bool on);
-extern _X_EXPORT vgaHWBlankScreenProc *vgaHWBlankScreenWeak(void);
-extern _X_EXPORT void vgaHWSeqReset(vgaHWPtr hwp, Bool start);
-extern _X_EXPORT void vgaHWRestoreFonts(ScrnInfoPtr scrninfp, vgaRegPtr restore);
-extern _X_EXPORT void vgaHWRestoreMode(ScrnInfoPtr scrninfp, vgaRegPtr restore);
-extern _X_EXPORT void vgaHWRestoreColormap(ScrnInfoPtr scrninfp, vgaRegPtr restore);
-extern _X_EXPORT void vgaHWRestore(ScrnInfoPtr scrninfp, vgaRegPtr restore, int flags);
-extern _X_EXPORT void vgaHWSaveFonts(ScrnInfoPtr scrninfp, vgaRegPtr save);
-extern _X_EXPORT void vgaHWSaveMode(ScrnInfoPtr scrninfp, vgaRegPtr save);
-extern _X_EXPORT void vgaHWSaveColormap(ScrnInfoPtr scrninfp, vgaRegPtr save);
-extern _X_EXPORT void vgaHWSave(ScrnInfoPtr scrninfp, vgaRegPtr save, int flags);
-extern _X_EXPORT Bool vgaHWInit(ScrnInfoPtr scrnp, DisplayModePtr mode);
-extern _X_EXPORT Bool vgaHWSetRegCounts(ScrnInfoPtr scrp, int numCRTC, int numSequencer,
-                  	int numGraphics, int numAttribute);
-extern _X_EXPORT Bool vgaHWCopyReg(vgaRegPtr dst, vgaRegPtr src);
-extern _X_EXPORT Bool vgaHWGetHWRec(ScrnInfoPtr scrp);
-extern _X_EXPORT void vgaHWFreeHWRec(ScrnInfoPtr scrp);
-extern _X_EXPORT Bool vgaHWMapMem(ScrnInfoPtr scrp);
-extern _X_EXPORT void vgaHWUnmapMem(ScrnInfoPtr scrp);
-extern _X_EXPORT void vgaHWGetIOBase(vgaHWPtr hwp);
-extern _X_EXPORT void vgaHWLock(vgaHWPtr hwp);
-extern _X_EXPORT void vgaHWUnlock(vgaHWPtr hwp);
-extern _X_EXPORT void vgaHWEnable(vgaHWPtr hwp);
-extern _X_EXPORT void vgaHWDisable(vgaHWPtr hwp);
-extern _X_EXPORT void vgaHWDPMSSet(ScrnInfoPtr pScrn, int PowerManagementMode, int flags);
-extern _X_EXPORT Bool vgaHWHandleColormaps(ScreenPtr pScreen);
-extern _X_EXPORT void vgaHWddc1SetSpeed(ScrnInfoPtr pScrn, xf86ddcSpeed speed);
-extern _X_EXPORT CARD32 vgaHWHBlankKGA(DisplayModePtr mode, vgaRegPtr regp, int nBits,
-	       unsigned int Flags);
-extern _X_EXPORT CARD32 vgaHWVBlankKGA(DisplayModePtr mode, vgaRegPtr regp, int nBits,
-	       unsigned int Flags);
-extern _X_EXPORT Bool vgaHWAllocDefaultRegs(vgaRegPtr regp);
-
-extern _X_EXPORT DDC1SetSpeedProc vgaHWddc1SetSpeedWeak(void);
-extern _X_EXPORT SaveScreenProcPtr vgaHWSaveScreenWeak(void);
-
-#endif /* _VGAHW_H */
+

+

+/*

+ * Copyright (c) 1997,1998 The XFree86 Project, Inc.

+ *

+ * Loosely based on code bearing the following copyright:

+ *

+ *   Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany.

+ *

+ * Author: Dirk Hohndel

+ */

+

+#ifndef _VGAHW_H

+#define _VGAHW_H

+

+#include <X11/X.h>

+#include "misc.h"

+#include "input.h"

+#include "scrnintstr.h"

+#include "colormapst.h"

+

+#include "xf86str.h"

+#include "xf86Pci.h"

+

+#include "xf86DDC.h"

+

+#include "globals.h"

+#include <X11/extensions/dpmsconst.h>

+

+extern _X_EXPORT int vgaHWGetIndex(void);

+

+/*

+ * access macro

+ */

+#define VGAHWPTR(p) ((vgaHWPtr)((p)->privates[vgaHWGetIndex()].ptr))

+

+/* Standard VGA registers */

+#define VGA_ATTR_INDEX		0x3C0

+#define VGA_ATTR_DATA_W		0x3C0

+#define VGA_ATTR_DATA_R		0x3C1

+#define VGA_IN_STAT_0		0x3C2		/* read */

+#define VGA_MISC_OUT_W		0x3C2		/* write */

+#define VGA_ENABLE		0x3C3

+#define VGA_SEQ_INDEX		0x3C4

+#define VGA_SEQ_DATA		0x3C5

+#define VGA_DAC_MASK		0x3C6

+#define VGA_DAC_READ_ADDR	0x3C7

+#define VGA_DAC_WRITE_ADDR	0x3C8

+#define VGA_DAC_DATA		0x3C9

+#define VGA_FEATURE_R		0x3CA		/* read */

+#define VGA_MISC_OUT_R		0x3CC		/* read */

+#define VGA_GRAPH_INDEX		0x3CE

+#define VGA_GRAPH_DATA		0x3CF

+

+#define VGA_IOBASE_MONO		0x3B0

+#define VGA_IOBASE_COLOR	0x3D0

+

+#define VGA_CRTC_INDEX_OFFSET	0x04

+#define VGA_CRTC_DATA_OFFSET	0x05

+#define VGA_IN_STAT_1_OFFSET	0x0A		/* read */

+#define VGA_FEATURE_W_OFFSET	0x0A		/* write */

+

+/* default number of VGA registers stored internally */

+#define VGA_NUM_CRTC 25

+#define VGA_NUM_SEQ 5

+#define VGA_NUM_GFX 9

+#define VGA_NUM_ATTR 21

+

+/* Flags for vgaHWSave() and vgaHWRestore() */

+#define VGA_SR_MODE		0x01

+#define VGA_SR_FONTS		0x02

+#define VGA_SR_CMAP		0x04

+#define VGA_SR_ALL		(VGA_SR_MODE | VGA_SR_FONTS | VGA_SR_CMAP)

+

+/* Defaults for the VGA memory window */

+#define VGA_DEFAULT_PHYS_ADDR	0xA0000

+#define VGA_DEFAULT_MEM_SIZE	(64 * 1024)

+

+/*

+ * vgaRegRec contains settings of standard VGA registers.

+ */

+typedef struct {

+    unsigned char MiscOutReg;     /* */

+    unsigned char *CRTC;       /* Crtc Controller */

+    unsigned char *Sequencer;   /* Video Sequencer */

+    unsigned char *Graphics;    /* Video Graphics */

+    unsigned char *Attribute;  /* Video Atribute */

+    unsigned char DAC[768];       /* Internal Colorlookuptable */

+    unsigned char numCRTC;	/* number of CRTC registers, def=VGA_NUM_CRTC */

+    unsigned char numSequencer;	/* number of seq registers, def=VGA_NUM_SEQ */

+    unsigned char numGraphics;	/* number of gfx registers, def=VGA_NUM_GFX */

+    unsigned char numAttribute;	/* number of attr registers, def=VGA_NUM_ATTR */

+} vgaRegRec, *vgaRegPtr;

+

+typedef struct _vgaHWRec *vgaHWPtr;

+

+typedef void (*vgaHWWriteIndexProcPtr)(vgaHWPtr hwp, CARD8 indx, CARD8 value);

+typedef CARD8 (*vgaHWReadIndexProcPtr)(vgaHWPtr hwp, CARD8 indx);

+typedef void (*vgaHWWriteProcPtr)(vgaHWPtr hwp, CARD8 value);

+typedef CARD8 (*vgaHWReadProcPtr)(vgaHWPtr hwp);

+typedef void (*vgaHWMiscProcPtr)(vgaHWPtr hwp);

+

+

+/*

+ * vgaHWRec contains per-screen information required by the vgahw module.

+ *

+ * Note, the palette referred to by the paletteEnabled, enablePalette and

+ * disablePalette is the 16-entry (+overscan) EGA-compatible palette accessed

+ * via the first 17 attribute registers and not the main 8-bit palette.

+ */

+typedef struct _vgaHWRec {

+    pointer			Base;		/* Address of "VGA" memory */

+    int				MapSize;	/* Size of "VGA" memory */

+    unsigned long		MapPhys;	/* phys location of VGA mem */

+    int				IOBase;		/* I/O Base address */

+    CARD8 * 			MMIOBase;	/* Pointer to MMIO start */

+    int				MMIOOffset;	/* base + offset + vgareg

+						   = mmioreg */

+    pointer			FontInfo1;	/* save area for fonts in

+							plane 2 */ 

+    pointer			FontInfo2;	/* save area for fonts in	

+							plane 3 */ 

+    pointer			TextInfo;	/* save area for text */ 

+    vgaRegRec			SavedReg;	/* saved registers */

+    vgaRegRec			ModeReg;	/* register settings for

+							current mode */

+    Bool			ShowOverscan;

+    Bool			paletteEnabled;

+    Bool			cmapSaved;

+    ScrnInfoPtr			pScrn;

+    vgaHWWriteIndexProcPtr	writeCrtc;

+    vgaHWReadIndexProcPtr	readCrtc;

+    vgaHWWriteIndexProcPtr	writeGr;

+    vgaHWReadIndexProcPtr	readGr;

+    vgaHWReadProcPtr            readST00;

+    vgaHWReadProcPtr            readST01;

+    vgaHWReadProcPtr            readFCR;

+    vgaHWWriteProcPtr           writeFCR;

+    vgaHWWriteIndexProcPtr	writeAttr;

+    vgaHWReadIndexProcPtr	readAttr;

+    vgaHWWriteIndexProcPtr	writeSeq;

+    vgaHWReadIndexProcPtr	readSeq;

+    vgaHWWriteProcPtr		writeMiscOut;

+    vgaHWReadProcPtr		readMiscOut;

+    vgaHWMiscProcPtr		enablePalette;

+    vgaHWMiscProcPtr		disablePalette;

+    vgaHWWriteProcPtr		writeDacMask;

+    vgaHWReadProcPtr		readDacMask;

+    vgaHWWriteProcPtr		writeDacWriteAddr;

+    vgaHWWriteProcPtr		writeDacReadAddr;

+    vgaHWWriteProcPtr		writeDacData;

+    vgaHWReadProcPtr		readDacData;

+    pointer                     ddc;

+    IOADDRESS			PIOOffset;	/* offset + vgareg

+						   = pioreg */

+    vgaHWReadProcPtr		readEnable;

+    vgaHWWriteProcPtr		writeEnable;

+    struct pci_device          *dev;

+} vgaHWRec;

+

+/* Some macros that VGA drivers can use in their ChipProbe() function */

+#define VGAHW_GET_IOBASE()	((inb(VGA_MISC_OUT_R) & 0x01) ?		      \

+					 VGA_IOBASE_COLOR : VGA_IOBASE_MONO)

+

+#define OVERSCAN 0x11		/* Index of OverScan register */

+

+/* Flags that define how overscan correction should take place */

+#define KGA_FIX_OVERSCAN  1   /* overcan correction required */

+#define KGA_ENABLE_ON_ZERO 2  /* if possible enable display at beginning */

+                              /* of next scanline/frame                  */

+#define KGA_BE_TOT_DEC 4      /* always fix problem by setting blank end */

+			      /* to total - 1                            */

+#define BIT_PLANE 3		/* Which plane we write to in mono mode */

+#define BITS_PER_GUN 6

+#define COLORMAP_SIZE 256

+

+#if defined(__powerpc__) || defined(__arm__) || defined(__s390__) || defined(__nds32__)

+#define DACDelay(hw) /* No legacy VGA support */

+#else

+#define DACDelay(hw)							      \

+	do {								      \

+	    (void)inb((hw)->PIOOffset + (hw)->IOBase + VGA_IN_STAT_1_OFFSET); \

+	    (void)inb((hw)->PIOOffset + (hw)->IOBase + VGA_IN_STAT_1_OFFSET); \

+	} while (0)

+#endif

+

+/* Function Prototypes */

+

+/* vgaHW.c */

+

+typedef void vgaHWProtectProc(ScrnInfoPtr, Bool);

+typedef void vgaHWBlankScreenProc(ScrnInfoPtr, Bool);

+

+extern _X_EXPORT void vgaHWSetStdFuncs(vgaHWPtr hwp);

+extern _X_EXPORT void vgaHWSetMmioFuncs(vgaHWPtr hwp, CARD8 *base, int offset);

+extern _X_EXPORT void vgaHWProtect(ScrnInfoPtr pScrn, Bool on);

+extern _X_EXPORT vgaHWProtectProc *vgaHWProtectWeak(void);

+extern _X_EXPORT Bool vgaHWSaveScreen(ScreenPtr pScreen, int mode);

+extern _X_EXPORT void vgaHWBlankScreen(ScrnInfoPtr pScrn, Bool on);

+extern _X_EXPORT vgaHWBlankScreenProc *vgaHWBlankScreenWeak(void);

+extern _X_EXPORT void vgaHWSeqReset(vgaHWPtr hwp, Bool start);

+extern _X_EXPORT void vgaHWRestoreFonts(ScrnInfoPtr scrninfp, vgaRegPtr restore);

+extern _X_EXPORT void vgaHWRestoreMode(ScrnInfoPtr scrninfp, vgaRegPtr restore);

+extern _X_EXPORT void vgaHWRestoreColormap(ScrnInfoPtr scrninfp, vgaRegPtr restore);

+extern _X_EXPORT void vgaHWRestore(ScrnInfoPtr scrninfp, vgaRegPtr restore, int flags);

+extern _X_EXPORT void vgaHWSaveFonts(ScrnInfoPtr scrninfp, vgaRegPtr save);

+extern _X_EXPORT void vgaHWSaveMode(ScrnInfoPtr scrninfp, vgaRegPtr save);

+extern _X_EXPORT void vgaHWSaveColormap(ScrnInfoPtr scrninfp, vgaRegPtr save);

+extern _X_EXPORT void vgaHWSave(ScrnInfoPtr scrninfp, vgaRegPtr save, int flags);

+extern _X_EXPORT Bool vgaHWInit(ScrnInfoPtr scrnp, DisplayModePtr mode);

+extern _X_EXPORT Bool vgaHWSetRegCounts(ScrnInfoPtr scrp, int numCRTC, int numSequencer,

+                  	int numGraphics, int numAttribute);

+extern _X_EXPORT Bool vgaHWCopyReg(vgaRegPtr dst, vgaRegPtr src);

+extern _X_EXPORT Bool vgaHWGetHWRec(ScrnInfoPtr scrp);

+extern _X_EXPORT void vgaHWFreeHWRec(ScrnInfoPtr scrp);

+extern _X_EXPORT Bool vgaHWMapMem(ScrnInfoPtr scrp);

+extern _X_EXPORT void vgaHWUnmapMem(ScrnInfoPtr scrp);

+extern _X_EXPORT void vgaHWGetIOBase(vgaHWPtr hwp);

+extern _X_EXPORT void vgaHWLock(vgaHWPtr hwp);

+extern _X_EXPORT void vgaHWUnlock(vgaHWPtr hwp);

+extern _X_EXPORT void vgaHWEnable(vgaHWPtr hwp);

+extern _X_EXPORT void vgaHWDisable(vgaHWPtr hwp);

+extern _X_EXPORT void vgaHWDPMSSet(ScrnInfoPtr pScrn, int PowerManagementMode, int flags);

+extern _X_EXPORT Bool vgaHWHandleColormaps(ScreenPtr pScreen);

+extern _X_EXPORT void vgaHWddc1SetSpeed(ScrnInfoPtr pScrn, xf86ddcSpeed speed);

+extern _X_EXPORT CARD32 vgaHWHBlankKGA(DisplayModePtr mode, vgaRegPtr regp, int nBits,

+	       unsigned int Flags);

+extern _X_EXPORT CARD32 vgaHWVBlankKGA(DisplayModePtr mode, vgaRegPtr regp, int nBits,

+	       unsigned int Flags);

+extern _X_EXPORT Bool vgaHWAllocDefaultRegs(vgaRegPtr regp);

+

+extern _X_EXPORT DDC1SetSpeedProc vgaHWddc1SetSpeedWeak(void);

+extern _X_EXPORT SaveScreenProcPtr vgaHWSaveScreenWeak(void);

+

+#endif /* _VGAHW_H */