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Diffstat (limited to 'xorg-server/hw/xfree86/ddc/DDC.HOWTO')
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diff --git a/xorg-server/hw/xfree86/ddc/DDC.HOWTO b/xorg-server/hw/xfree86/ddc/DDC.HOWTO new file mode 100644 index 000000000..833a7ab54 --- /dev/null +++ b/xorg-server/hw/xfree86/ddc/DDC.HOWTO @@ -0,0 +1,97 @@ + DDC.HOWTO + + This file describes how to add DDC support to a chipset driver. + +1) DDC INITIALIZATION + + When implementing DDC in the driver one has the choice between + DDC1 and DDC2. + DDC1 data is contiuously transmitted by a DDC1 capable display + device. The data is send serially over a data line; the Vsync + signal serves as clock. Only one EDID 1.x data block can be + transmitted using DDC1. Since transmission of an EDID1 block + using a regular Vsync frequency would take up several seconds + the driver can increase the Vsync frequency to up to 25 kHz as + soon as it detects DDC1 activety on the data line. + DDC2 data is transmitted using the I2C protocol. This requires + an additional clock line. DDC2 is capable of transmitting EDID1 + and EDID2 block as well as a VDIF block on display devices that + support these. + Display devices switch into the DDC2 mode as soon as they detect + activety on the DDC clock line. Once the are in DDC2 mode they + stop transmitting DDC1 signals until the next power cycle. + + Some graphics chipset configurations which are not capable of + DDC2 might still be able to read DDC1 data. Where available + DDC2 it is preferrable. + + All relevant prototypes and defines are in xf86DDC.h. + DDC2 additionally requires I2C support. The I2C prototypes + are in xf86i2c.h. + + DDC1 Support: + + The driver has to provide a read function which waits for the + end of the next Vsync signal and reads in and returns the status + of the DDC line: + + unsigned int XXX_ddc1Read(ScrnInfoPtr pScrn) + + Additionally a function is required to inclrease the Vsync + frequency to max. 25 kHz. + + void XXX_ddc1SetSpeed(ScrnInfoPtr pScrn, xf86ddcSpeed speed) + + If the speed argument is DDC_FAST the function should increase + the Vsync frequency on DDC_SLOW it should restore the original + value. For convenience a generic ddc1SetSpeed() function is provided + in the vga module for VGA-like chipsets. + + void vgaHWddc1SetSpeed(ScrnInfoPtr pScrn, sf86ddcSpeed speed). + + To read out the DDC1 data the driver should call + + xf86MonPtr xf86DoEDID_DDC1(int scrnIndex, + void (*DDC1SetSpeed)(ScrnInfoPtr, xf86ddcSpeed), + unsigned int (*DDC1Read)(ScrnInfoPtr)) + + in PreInit(). DDC1SetSpeed is a pointer to the SetSpeed() + function, DDC1Read has to point to the DDC1 read function. + The function will return a pointer to the xf86Monitor structure + which contains all information retreived by DDC. + NULL will be returned on failure. + + DDC2 Support + + To read out DDC2 information I2C has to be initialized first. + (See documentation for the i2c module). + The function + + xf86MonPtr xf86DoEDID_DDC2(int scrnIndex, I2CBusPtr pBus) + + is provided to read out and process DDC2 data. A pointer + to the I2CBusRec of the appropriate I2C Bus has to be passed + as the second argument. + The function will return a pointer to the xf86Monitor structure + which contains all information retreived by DDC. + NULL will be returned on failure. + + Printing monitor parameters + + To print out the information contained in the xf86Monitor + structure the function + + xf86MonPtr xf86PrintEDID(xf86MonPtr monitor) + + is provided. + + Further processing of the xf86Monitor structure is not yet + implemented. Howerver it is planned to use the information + about video modes, gamma values etc. + Therefore it is strongly recommended to read out DDC data + before any video mode processing is done. + + + + +$XFree86: xc/programs/Xserver/hw/xfree86/ddc/DDC.HOWTO,v 1.2 1998/12/06 13:30:39 dawes Exp $ |