diff options
Diffstat (limited to 'xorg-server/hw/xfree86/dri2/pci_ids/i965_pci_ids.h')
| -rw-r--r-- | xorg-server/hw/xfree86/dri2/pci_ids/i965_pci_ids.h | 115 |
1 files changed, 115 insertions, 0 deletions
diff --git a/xorg-server/hw/xfree86/dri2/pci_ids/i965_pci_ids.h b/xorg-server/hw/xfree86/dri2/pci_ids/i965_pci_ids.h new file mode 100644 index 000000000..2e04301fb --- /dev/null +++ b/xorg-server/hw/xfree86/dri2/pci_ids/i965_pci_ids.h @@ -0,0 +1,115 @@ +CHIPSET(0x29A2, i965, "Intel(R) 965G") +CHIPSET(0x2992, i965, "Intel(R) 965Q") +CHIPSET(0x2982, i965, "Intel(R) 965G") +CHIPSET(0x2972, i965, "Intel(R) 946GZ") +CHIPSET(0x2A02, i965, "Intel(R) 965GM") +CHIPSET(0x2A12, i965, "Intel(R) 965GME/GLE") +CHIPSET(0x2A42, g4x, "Mobile Intel® GM45 Express Chipset") +CHIPSET(0x2E02, g4x, "Intel(R) Integrated Graphics Device") +CHIPSET(0x2E12, g4x, "Intel(R) Q45/Q43") +CHIPSET(0x2E22, g4x, "Intel(R) G45/G43") +CHIPSET(0x2E32, g4x, "Intel(R) G41") +CHIPSET(0x2E42, g4x, "Intel(R) B43") +CHIPSET(0x2E92, g4x, "Intel(R) B43") +CHIPSET(0x0042, ilk, "Intel(R) Ironlake Desktop") +CHIPSET(0x0046, ilk, "Intel(R) Ironlake Mobile") +CHIPSET(0x0102, snb_gt1, "Intel(R) Sandybridge Desktop") +CHIPSET(0x0112, snb_gt2, "Intel(R) Sandybridge Desktop") +CHIPSET(0x0122, snb_gt2, "Intel(R) Sandybridge Desktop") +CHIPSET(0x0106, snb_gt1, "Intel(R) Sandybridge Mobile") +CHIPSET(0x0116, snb_gt2, "Intel(R) Sandybridge Mobile") +CHIPSET(0x0126, snb_gt2, "Intel(R) Sandybridge Mobile") +CHIPSET(0x010A, snb_gt1, "Intel(R) Sandybridge Server") +CHIPSET(0x0152, ivb_gt1, "Intel(R) Ivybridge Desktop") +CHIPSET(0x0162, ivb_gt2, "Intel(R) Ivybridge Desktop") +CHIPSET(0x0156, ivb_gt1, "Intel(R) Ivybridge Mobile") +CHIPSET(0x0166, ivb_gt2, "Intel(R) Ivybridge Mobile") +CHIPSET(0x015a, ivb_gt1, "Intel(R) Ivybridge Server") +CHIPSET(0x016a, ivb_gt2, "Intel(R) Ivybridge Server") +CHIPSET(0x0402, hsw_gt1, "Intel(R) Haswell Desktop") +CHIPSET(0x0412, hsw_gt2, "Intel(R) Haswell Desktop") +CHIPSET(0x0422, hsw_gt3, "Intel(R) Haswell Desktop") +CHIPSET(0x0406, hsw_gt1, "Intel(R) Haswell Mobile") +CHIPSET(0x0416, hsw_gt2, "Intel(R) Haswell Mobile") +CHIPSET(0x0426, hsw_gt3, "Intel(R) Haswell Mobile") +CHIPSET(0x040A, hsw_gt1, "Intel(R) Haswell Server") +CHIPSET(0x041A, hsw_gt2, "Intel(R) Haswell Server") +CHIPSET(0x042A, hsw_gt3, "Intel(R) Haswell Server") +CHIPSET(0x040B, hsw_gt1, "Intel(R) Haswell") +CHIPSET(0x041B, hsw_gt2, "Intel(R) Haswell") +CHIPSET(0x042B, hsw_gt3, "Intel(R) Haswell") +CHIPSET(0x040E, hsw_gt1, "Intel(R) Haswell") +CHIPSET(0x041E, hsw_gt2, "Intel(R) Haswell") +CHIPSET(0x042E, hsw_gt3, "Intel(R) Haswell") +CHIPSET(0x0C02, hsw_gt1, "Intel(R) Haswell Desktop") +CHIPSET(0x0C12, hsw_gt2, "Intel(R) Haswell Desktop") +CHIPSET(0x0C22, hsw_gt3, "Intel(R) Haswell Desktop") +CHIPSET(0x0C06, hsw_gt1, "Intel(R) Haswell Mobile") +CHIPSET(0x0C16, hsw_gt2, "Intel(R) Haswell Mobile") +CHIPSET(0x0C26, hsw_gt3, "Intel(R) Haswell Mobile") +CHIPSET(0x0C0A, hsw_gt1, "Intel(R) Haswell Server") +CHIPSET(0x0C1A, hsw_gt2, "Intel(R) Haswell Server") +CHIPSET(0x0C2A, hsw_gt3, "Intel(R) Haswell Server") +CHIPSET(0x0C0B, hsw_gt1, "Intel(R) Haswell") +CHIPSET(0x0C1B, hsw_gt2, "Intel(R) Haswell") +CHIPSET(0x0C2B, hsw_gt3, "Intel(R) Haswell") +CHIPSET(0x0C0E, hsw_gt1, "Intel(R) Haswell") +CHIPSET(0x0C1E, hsw_gt2, "Intel(R) Haswell") +CHIPSET(0x0C2E, hsw_gt3, "Intel(R) Haswell") +CHIPSET(0x0A02, hsw_gt1, "Intel(R) Haswell Desktop") +CHIPSET(0x0A12, hsw_gt2, "Intel(R) Haswell Desktop") +CHIPSET(0x0A22, hsw_gt3, "Intel(R) Haswell Desktop") +CHIPSET(0x0A06, hsw_gt1, "Intel(R) Haswell Mobile") +CHIPSET(0x0A16, hsw_gt2, "Intel(R) Haswell Mobile") +CHIPSET(0x0A26, hsw_gt3, "Intel(R) Haswell Mobile") +CHIPSET(0x0A0A, hsw_gt1, "Intel(R) Haswell Server") +CHIPSET(0x0A1A, hsw_gt2, "Intel(R) Haswell Server") +CHIPSET(0x0A2A, hsw_gt3, "Intel(R) Haswell Server") +CHIPSET(0x0A0B, hsw_gt1, "Intel(R) Haswell") +CHIPSET(0x0A1B, hsw_gt2, "Intel(R) Haswell") +CHIPSET(0x0A2B, hsw_gt3, "Intel(R) Haswell") +CHIPSET(0x0A0E, hsw_gt1, "Intel(R) Haswell") +CHIPSET(0x0A1E, hsw_gt2, "Intel(R) Haswell") +CHIPSET(0x0A2E, hsw_gt3, "Intel(R) Haswell") +CHIPSET(0x0D02, hsw_gt1, "Intel(R) Haswell Desktop") +CHIPSET(0x0D12, hsw_gt2, "Intel(R) Haswell Desktop") +CHIPSET(0x0D22, hsw_gt3, "Intel(R) Haswell Desktop") +CHIPSET(0x0D06, hsw_gt1, "Intel(R) Haswell Mobile") +CHIPSET(0x0D16, hsw_gt2, "Intel(R) Haswell Mobile") +CHIPSET(0x0D26, hsw_gt3, "Intel(R) Haswell Mobile") +CHIPSET(0x0D0A, hsw_gt1, "Intel(R) Haswell Server") +CHIPSET(0x0D1A, hsw_gt2, "Intel(R) Haswell Server") +CHIPSET(0x0D2A, hsw_gt3, "Intel(R) Haswell") +CHIPSET(0x0D0B, hsw_gt1, "Intel(R) Haswell") +CHIPSET(0x0D1B, hsw_gt2, "Intel(R) Haswell") +CHIPSET(0x0D2B, hsw_gt3, "Intel(R) Haswell") +CHIPSET(0x0D0E, hsw_gt1, "Intel(R) Haswell") +CHIPSET(0x0D1E, hsw_gt2, "Intel(R) Haswell") +CHIPSET(0x0D2E, hsw_gt3, "Intel(R) Haswell") +CHIPSET(0x0F31, byt, "Intel(R) Bay Trail") +CHIPSET(0x0F32, byt, "Intel(R) Bay Trail") +CHIPSET(0x0F33, byt, "Intel(R) Bay Trail") +CHIPSET(0x0157, byt, "Intel(R) Bay Trail") +CHIPSET(0x0155, byt, "Intel(R) Bay Trail") +CHIPSET(0x1602, bdw_gt1, "Intel(R) Broadwell GT1") +CHIPSET(0x1606, bdw_gt1, "Intel(R) Broadwell GT1") +CHIPSET(0x160A, bdw_gt1, "Intel(R) Broadwell GT1") +CHIPSET(0x160B, bdw_gt1, "Intel(R) Broadwell GT1") +CHIPSET(0x160D, bdw_gt1, "Intel(R) Broadwell GT1") +CHIPSET(0x160E, bdw_gt1, "Intel(R) Broadwell GT1") +CHIPSET(0x1612, bdw_gt2, "Intel(R) HD Graphics 5600 (Broadwell GT2)") +CHIPSET(0x1616, bdw_gt2, "Intel(R) HD Graphics 5500 (Broadwell GT2)") +CHIPSET(0x161A, bdw_gt2, "Intel(R) Broadwell GT2") +CHIPSET(0x161B, bdw_gt2, "Intel(R) Broadwell GT2") +CHIPSET(0x161D, bdw_gt2, "Intel(R) Broadwell GT2") +CHIPSET(0x161E, bdw_gt2, "Intel(R) HD Graphics 5300 (Broadwell GT2)") +CHIPSET(0x1622, bdw_gt3, "Intel(R) Iris Pro 6200 (Broadwell GT3e)") +CHIPSET(0x1626, bdw_gt3, "Intel(R) HD Graphics 6000 (Broadwell GT3)") +CHIPSET(0x162A, bdw_gt3, "Intel(R) Iris Pro P6300 (Broadwell GT3e)") +CHIPSET(0x162B, bdw_gt3, "Intel(R) Iris 6100 (Broadwell GT3)") +CHIPSET(0x162D, bdw_gt3, "Intel(R) Broadwell GT3") +CHIPSET(0x162E, bdw_gt3, "Intel(R) Broadwell GT3") +CHIPSET(0x22B0, chv, "Intel(R) Cherryview") +CHIPSET(0x22B1, chv, "Intel(R) Cherryview") +CHIPSET(0x22B2, chv, "Intel(R) Cherryview") +CHIPSET(0x22B3, chv, "Intel(R) Cherryview") |