From fc8f37239f3af088819c18f5632b2608954af73a Mon Sep 17 00:00:00 2001 From: marha Date: Wed, 4 Jul 2012 10:36:18 +0200 Subject: mesa xserver git update 4 Jul 2012 --- mesalib/src/glsl/ir.h | 4 ---- mesalib/src/glsl/lower_instructions.cpp | 4 ++-- 2 files changed, 2 insertions(+), 6 deletions(-) (limited to 'mesalib/src/glsl') diff --git a/mesalib/src/glsl/ir.h b/mesalib/src/glsl/ir.h index 505d2e74b..b54e2f2e0 100644 --- a/mesalib/src/glsl/ir.h +++ b/mesalib/src/glsl/ir.h @@ -1245,7 +1245,6 @@ public: { this->ir_type = ir_type_loop_jump; this->mode = mode; - this->loop = loop; } virtual ir_loop_jump *clone(void *mem_ctx, struct hash_table *) const; @@ -1269,9 +1268,6 @@ public: /** Mode selector for the jump instruction. */ enum jump_mode mode; -private: - /** Loop containing this break instruction. */ - ir_loop *loop; }; /** diff --git a/mesalib/src/glsl/lower_instructions.cpp b/mesalib/src/glsl/lower_instructions.cpp index d79eb0a7f..a8ef7654e 100644 --- a/mesalib/src/glsl/lower_instructions.cpp +++ b/mesalib/src/glsl/lower_instructions.cpp @@ -50,7 +50,7 @@ * * DIV_TO_MUL_RCP and INT_DIV_TO_MUL_RCP: * -------------------------------------- - * Breaks an ir_unop_div expression down to op0 * (rcp(op1)). + * Breaks an ir_binop_div expression down to op0 * (rcp(op1)). * * Many GPUs don't have a divide instruction (945 and 965 included), * but they do have an RCP instruction to compute an approximate @@ -74,7 +74,7 @@ * * MOD_TO_FRACT: * ------------- - * Breaks an ir_unop_mod expression down to (op1 * fract(op0 / op1)) + * Breaks an ir_binop_mod expression down to (op1 * fract(op0 / op1)) * * Many GPUs don't have a MOD instruction (945 and 965 included), and * if we have to break it down like this anyway, it gives an -- cgit v1.2.3