From 4a3dbb926ae3f5410198d7cc4f4ebe4f62eebf05 Mon Sep 17 00:00:00 2001 From: marha Date: Sat, 25 Jul 2009 19:39:46 +0000 Subject: Added xorg-server-1.6.2.tar.gz --- xorg-server/hw/xfree86/os-support/bus/Makefile.am | 12 - xorg-server/hw/xfree86/os-support/bus/Makefile.in | 102 +-- xorg-server/hw/xfree86/os-support/bus/Pci.c | 25 +- xorg-server/hw/xfree86/os-support/bus/Pci.h | 82 +- xorg-server/hw/xfree86/os-support/bus/Sbus.c | 84 +- xorg-server/hw/xfree86/os-support/bus/bsd_pci.c | 17 - xorg-server/hw/xfree86/os-support/bus/ix86Pci.c | 718 ---------------- xorg-server/hw/xfree86/os-support/bus/linuxPci.c | 34 +- xorg-server/hw/xfree86/os-support/bus/ppcPci.c | 82 -- xorg-server/hw/xfree86/os-support/bus/sparcPci.c | 979 ---------------------- xorg-server/hw/xfree86/os-support/bus/xf86Pci.h | 2 - 11 files changed, 117 insertions(+), 2020 deletions(-) delete mode 100644 xorg-server/hw/xfree86/os-support/bus/ix86Pci.c delete mode 100644 xorg-server/hw/xfree86/os-support/bus/ppcPci.c delete mode 100644 xorg-server/hw/xfree86/os-support/bus/sparcPci.c (limited to 'xorg-server/hw/xfree86/os-support/bus') diff --git a/xorg-server/hw/xfree86/os-support/bus/Makefile.am b/xorg-server/hw/xfree86/os-support/bus/Makefile.am index d48fcb67d..92a519bcc 100644 --- a/xorg-server/hw/xfree86/os-support/bus/Makefile.am +++ b/xorg-server/hw/xfree86/os-support/bus/Makefile.am @@ -11,18 +11,6 @@ if XORG_BUS_BSDPCI PCI_SOURCES += bsd_pci.c endif -if XORG_BUS_IX86PCI -PCI_SOURCES += ix86Pci.c -endif - -if XORG_BUS_PPCPCI -PCI_SOURCES += ppcPci.c -endif - -if XORG_BUS_SPARCPCI -PCI_SOURCES += sparcPci.c -endif - if XORG_BUS_SPARC PLATFORM_SOURCES = Sbus.c sdk_HEADERS += xf86Sbus.h diff --git a/xorg-server/hw/xfree86/os-support/bus/Makefile.in b/xorg-server/hw/xfree86/os-support/bus/Makefile.in index fb2391280..77110b7d2 100644 --- a/xorg-server/hw/xfree86/os-support/bus/Makefile.in +++ b/xorg-server/hw/xfree86/os-support/bus/Makefile.in @@ -1,4 +1,4 @@ -# Makefile.in generated by automake 1.10.1 from Makefile.am. +# Makefile.in generated by automake 1.10.2 from Makefile.am. # @configure_input@ # Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, @@ -35,10 +35,7 @@ build_triplet = @build@ host_triplet = @host@ @XORG_BUS_LINUXPCI_TRUE@am__append_1 = linuxPci.c @XORG_BUS_BSDPCI_TRUE@am__append_2 = bsd_pci.c -@XORG_BUS_IX86PCI_TRUE@am__append_3 = ix86Pci.c -@XORG_BUS_PPCPCI_TRUE@am__append_4 = ppcPci.c -@XORG_BUS_SPARCPCI_TRUE@am__append_5 = sparcPci.c -@XORG_BUS_SPARC_TRUE@am__append_6 = xf86Sbus.h +@XORG_BUS_SPARC_TRUE@am__append_3 = xf86Sbus.h subdir = hw/xfree86/os-support/bus DIST_COMMON = $(am__sdk_HEADERS_DIST) $(srcdir)/Makefile.am \ $(srcdir)/Makefile.in @@ -51,7 +48,6 @@ mkinstalldirs = $(install_sh) -d CONFIG_HEADER = $(top_builddir)/include/do-not-use-config.h \ $(top_builddir)/include/xorg-server.h \ $(top_builddir)/include/dix-config.h \ - $(top_builddir)/include/xgl-config.h \ $(top_builddir)/include/xorg-config.h \ $(top_builddir)/include/xkb-config.h \ $(top_builddir)/include/xwin-config.h \ @@ -59,26 +55,18 @@ CONFIG_HEADER = $(top_builddir)/include/do-not-use-config.h \ CONFIG_CLEAN_FILES = LTLIBRARIES = $(noinst_LTLIBRARIES) libbus_la_LIBADD = -am__libbus_la_SOURCES_DIST = Pci.c Pci.h linuxPci.c bsd_pci.c \ - ix86Pci.c ppcPci.c sparcPci.c Sbus.c +am__libbus_la_SOURCES_DIST = Pci.c Pci.h linuxPci.c bsd_pci.c Sbus.c @XORG_BUS_LINUXPCI_TRUE@am__objects_1 = linuxPci.lo @XORG_BUS_BSDPCI_TRUE@am__objects_2 = bsd_pci.lo -@XORG_BUS_IX86PCI_TRUE@am__objects_3 = ix86Pci.lo -@XORG_BUS_PPCPCI_TRUE@am__objects_4 = ppcPci.lo -@XORG_BUS_SPARCPCI_TRUE@am__objects_5 = sparcPci.lo -am__objects_6 = $(am__objects_1) $(am__objects_2) $(am__objects_3) \ - $(am__objects_4) $(am__objects_5) -@XORG_BUS_SPARC_TRUE@am__objects_7 = Sbus.lo -am_libbus_la_OBJECTS = Pci.lo $(am__objects_6) $(am__objects_7) +am__objects_3 = $(am__objects_1) $(am__objects_2) +@XORG_BUS_SPARC_TRUE@am__objects_4 = Sbus.lo +am_libbus_la_OBJECTS = Pci.lo $(am__objects_3) $(am__objects_4) libbus_la_OBJECTS = $(am_libbus_la_OBJECTS) DEFAULT_INCLUDES = -I.@am__isrc@ -I$(top_builddir)/include depcomp = $(SHELL) $(top_srcdir)/depcomp am__depfiles_maybe = depfiles COMPILE = $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) \ $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -LTCOMPILE = $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) \ - --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) \ - $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) CCLD = $(CC) LINK = $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) \ --mode=link $(CCLD) $(AM_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) \ @@ -103,8 +91,9 @@ ADMIN_MAN_DIR = @ADMIN_MAN_DIR@ ADMIN_MAN_SUFFIX = @ADMIN_MAN_SUFFIX@ ALLOCA = @ALLOCA@ AMTAR = @AMTAR@ -APPDEFAULTDIR = @APPDEFAULTDIR@ APPLE_APPLICATIONS_DIR = @APPLE_APPLICATIONS_DIR@ +APPLE_APPLICATION_ID = @APPLE_APPLICATION_ID@ +APPLE_APPLICATION_NAME = @APPLE_APPLICATION_NAME@ APP_MAN_DIR = @APP_MAN_DIR@ APP_MAN_SUFFIX = @APP_MAN_SUFFIX@ AR = @AR@ @@ -125,10 +114,6 @@ CFLAGS = @CFLAGS@ COMPILEDDEFAULTFONTPATH = @COMPILEDDEFAULTFONTPATH@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ -CXX = @CXX@ -CXXCPP = @CXXCPP@ -CXXDEPMODE = @CXXDEPMODE@ -CXXFLAGS = @CXXFLAGS@ CYGPATH_W = @CYGPATH_W@ DARWIN_LIBS = @DARWIN_LIBS@ DBUS_CFLAGS = @DBUS_CFLAGS@ @@ -150,6 +135,7 @@ DMXXIEXAMPLES_DEP_CFLAGS = @DMXXIEXAMPLES_DEP_CFLAGS@ DMXXIEXAMPLES_DEP_LIBS = @DMXXIEXAMPLES_DEP_LIBS@ DMXXMUEXAMPLES_DEP_CFLAGS = @DMXXMUEXAMPLES_DEP_CFLAGS@ DMXXMUEXAMPLES_DEP_LIBS = @DMXXMUEXAMPLES_DEP_LIBS@ +DOLT_BASH = @DOLT_BASH@ DRI2PROTO_CFLAGS = @DRI2PROTO_CFLAGS@ DRI2PROTO_LIBS = @DRI2PROTO_LIBS@ DRIPROTO_CFLAGS = @DRIPROTO_CFLAGS@ @@ -159,18 +145,15 @@ DRIVER_MAN_SUFFIX = @DRIVER_MAN_SUFFIX@ DRI_DRIVER_PATH = @DRI_DRIVER_PATH@ DSYMUTIL = @DSYMUTIL@ DTRACE = @DTRACE@ -ECHO = @ECHO@ +DUMPBIN = @DUMPBIN@ ECHO_C = @ECHO_C@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGREP = @EGREP@ EXEEXT = @EXEEXT@ -F77 = @F77@ -FFLAGS = @FFLAGS@ +FGREP = @FGREP@ FILE_MAN_DIR = @FILE_MAN_DIR@ FILE_MAN_SUFFIX = @FILE_MAN_SUFFIX@ -FREETYPE_CFLAGS = @FREETYPE_CFLAGS@ -FREETYPE_LIBS = @FREETYPE_LIBS@ GLX_ARCH_DEFINES = @GLX_ARCH_DEFINES@ GLX_DEFINES = @GLX_DEFINES@ GL_CFLAGS = @GL_CFLAGS@ @@ -189,7 +172,7 @@ KDRIVE_LIBS = @KDRIVE_LIBS@ KDRIVE_LOCAL_LIBS = @KDRIVE_LOCAL_LIBS@ KDRIVE_PURE_INCS = @KDRIVE_PURE_INCS@ KDRIVE_PURE_LIBS = @KDRIVE_PURE_LIBS@ -LAUNCHD = @LAUNCHD@ +LD = @LD@ LDFLAGS = @LDFLAGS@ LD_EXPORT_SYMBOLS_FLAG = @LD_EXPORT_SYMBOLS_FLAG@ LEX = @LEX@ @@ -203,7 +186,10 @@ LIBTOOL = @LIBTOOL@ LIB_MAN_DIR = @LIB_MAN_DIR@ LIB_MAN_SUFFIX = @LIB_MAN_SUFFIX@ LINUXDOC = @LINUXDOC@ +LIPO = @LIPO@ LN_S = @LN_S@ +LTCOMPILE = @LTCOMPILE@ +LTCXXCOMPILE = @LTCXXCOMPILE@ LTLIBOBJS = @LTLIBOBJS@ MAINT = @MAINT@ MAKEINFO = @MAKEINFO@ @@ -215,8 +201,7 @@ MESA_SOURCE = @MESA_SOURCE@ MISC_MAN_DIR = @MISC_MAN_DIR@ MISC_MAN_SUFFIX = @MISC_MAN_SUFFIX@ MKDIR_P = @MKDIR_P@ -MKFONTDIR = @MKFONTDIR@ -MKFONTSCALE = @MKFONTSCALE@ +NM = @NM@ NMEDIT = @NMEDIT@ OBJC = @OBJC@ OBJCCLD = @OBJCCLD@ @@ -225,8 +210,8 @@ OBJCFLAGS = @OBJCFLAGS@ OBJCLINK = @OBJCLINK@ OBJDUMP = @OBJDUMP@ OBJEXT = @OBJEXT@ -OPENSSL_CFLAGS = @OPENSSL_CFLAGS@ -OPENSSL_LIBS = @OPENSSL_LIBS@ +OTOOL = @OTOOL@ +OTOOL64 = @OTOOL64@ PACKAGE = @PACKAGE@ PACKAGE_BUGREPORT = @PACKAGE_BUGREPORT@ PACKAGE_NAME = @PACKAGE_NAME@ @@ -259,7 +244,6 @@ VENDOR_NAME = @VENDOR_NAME@ VENDOR_NAME_SHORT = @VENDOR_NAME_SHORT@ VENDOR_RELEASE = @VENDOR_RELEASE@ VERSION = @VERSION@ -X11APP_ARCHS = @X11APP_ARCHS@ X11EXAMPLES_DEP_CFLAGS = @X11EXAMPLES_DEP_CFLAGS@ X11EXAMPLES_DEP_LIBS = @X11EXAMPLES_DEP_LIBS@ XDMCP_CFLAGS = @XDMCP_CFLAGS@ @@ -269,27 +253,12 @@ XDMXCONFIG_DEP_LIBS = @XDMXCONFIG_DEP_LIBS@ XDMX_CFLAGS = @XDMX_CFLAGS@ XDMX_LIBS = @XDMX_LIBS@ XDMX_SYS_LIBS = @XDMX_SYS_LIBS@ -XEGLMODULES_CFLAGS = @XEGLMODULES_CFLAGS@ -XEGL_LIBS = @XEGL_LIBS@ -XEGL_SYS_LIBS = @XEGL_SYS_LIBS@ XEPHYR_CFLAGS = @XEPHYR_CFLAGS@ -XEPHYR_DRI_LIBS = @XEPHYR_DRI_LIBS@ XEPHYR_INCS = @XEPHYR_INCS@ XEPHYR_LIBS = @XEPHYR_LIBS@ XF86CONFIGFILE = @XF86CONFIGFILE@ -XF86MISC_CFLAGS = @XF86MISC_CFLAGS@ -XF86MISC_LIBS = @XF86MISC_LIBS@ XF86VIDMODE_CFLAGS = @XF86VIDMODE_CFLAGS@ XF86VIDMODE_LIBS = @XF86VIDMODE_LIBS@ -XGLMODULES_CFLAGS = @XGLMODULES_CFLAGS@ -XGLMODULES_LIBS = @XGLMODULES_LIBS@ -XGLXMODULES_CFLAGS = @XGLXMODULES_CFLAGS@ -XGLXMODULES_LIBS = @XGLXMODULES_LIBS@ -XGLX_LIBS = @XGLX_LIBS@ -XGLX_SYS_LIBS = @XGLX_SYS_LIBS@ -XGL_LIBS = @XGL_LIBS@ -XGL_MODULE_PATH = @XGL_MODULE_PATH@ -XGL_SYS_LIBS = @XGL_SYS_LIBS@ XKB_BASE_DIRECTORY = @XKB_BASE_DIRECTORY@ XKB_BIN_DIRECTORY = @XKB_BIN_DIRECTORY@ XKB_COMPILED_DIR = @XKB_COMPILED_DIR@ @@ -300,10 +269,6 @@ XNESTMODULES_CFLAGS = @XNESTMODULES_CFLAGS@ XNESTMODULES_LIBS = @XNESTMODULES_LIBS@ XNEST_LIBS = @XNEST_LIBS@ XNEST_SYS_LIBS = @XNEST_SYS_LIBS@ -XORGCFG_DEP_CFLAGS = @XORGCFG_DEP_CFLAGS@ -XORGCFG_DEP_LIBS = @XORGCFG_DEP_LIBS@ -XORGCONFIG_DEP_CFLAGS = @XORGCONFIG_DEP_CFLAGS@ -XORGCONFIG_DEP_LIBS = @XORGCONFIG_DEP_LIBS@ XORG_CFLAGS = @XORG_CFLAGS@ XORG_INCS = @XORG_INCS@ XORG_LIBS = @XORG_LIBS@ @@ -312,13 +277,8 @@ XORG_MODULES_LIBS = @XORG_MODULES_LIBS@ XORG_OS = @XORG_OS@ XORG_OS_SUBDIR = @XORG_OS_SUBDIR@ XORG_SYS_LIBS = @XORG_SYS_LIBS@ -XPRINTMODULES_CFLAGS = @XPRINTMODULES_CFLAGS@ -XPRINTMODULES_LIBS = @XPRINTMODULES_LIBS@ -XPRINTPROTO_CFLAGS = @XPRINTPROTO_CFLAGS@ -XPRINTPROTO_LIBS = @XPRINTPROTO_LIBS@ -XPRINT_CFLAGS = @XPRINT_CFLAGS@ -XPRINT_LIBS = @XPRINT_LIBS@ -XPRINT_SYS_LIBS = @XPRINT_SYS_LIBS@ +XPBPROXY_CFLAGS = @XPBPROXY_CFLAGS@ +XPBPROXY_LIBS = @XPBPROXY_LIBS@ XRESEXAMPLES_DEP_CFLAGS = @XRESEXAMPLES_DEP_CFLAGS@ XRESEXAMPLES_DEP_LIBS = @XRESEXAMPLES_DEP_LIBS@ XSDL_INCS = @XSDL_INCS@ @@ -351,8 +311,7 @@ abs_srcdir = @abs_srcdir@ abs_top_builddir = @abs_top_builddir@ abs_top_srcdir = @abs_top_srcdir@ ac_ct_CC = @ac_ct_CC@ -ac_ct_CXX = @ac_ct_CXX@ -ac_ct_F77 = @ac_ct_F77@ +ac_ct_DUMPBIN = @ac_ct_DUMPBIN@ am__include = @am__include@ am__leading_dot = @am__leading_dot@ am__quote = @am__quote@ @@ -372,7 +331,6 @@ driverdir = @driverdir@ dvidir = @dvidir@ exec_prefix = @exec_prefix@ extdir = @extdir@ -ft_config = @ft_config@ host = @host@ host_alias = @host_alias@ host_cpu = @host_cpu@ @@ -382,12 +340,12 @@ htmldir = @htmldir@ includedir = @includedir@ infodir = @infodir@ install_sh = @install_sh@ -launchagentsdir = @launchagentsdir@ libdir = @libdir@ libexecdir = @libexecdir@ localedir = @localedir@ localstatedir = @localstatedir@ logdir = @logdir@ +lt_ECHO = @lt_ECHO@ mandir = @mandir@ mkdir_p = @mkdir_p@ moduledir = @moduledir@ @@ -405,12 +363,9 @@ target_alias = @target_alias@ top_build_prefix = @top_build_prefix@ top_builddir = @top_builddir@ top_srcdir = @top_srcdir@ -xglmoduledir = @xglmoduledir@ -xpconfigdir = @xpconfigdir@ noinst_LTLIBRARIES = libbus.la -sdk_HEADERS = xf86Pci.h $(am__append_6) -PCI_SOURCES = $(am__append_1) $(am__append_2) $(am__append_3) \ - $(am__append_4) $(am__append_5) +sdk_HEADERS = xf86Pci.h $(am__append_3) +PCI_SOURCES = $(am__append_1) $(am__append_2) @XORG_BUS_SPARC_TRUE@PLATFORM_SOURCES = Sbus.c libbus_la_SOURCES = Pci.c Pci.h $(PCI_SOURCES) $(PLATFORM_PCI_SOURCES) \ $(PLATFORM_SOURCES) @@ -426,8 +381,8 @@ $(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(am__confi @for dep in $?; do \ case '$(am__configure_deps)' in \ *$$dep*) \ - cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh \ - && exit 0; \ + ( cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh ) \ + && { if test -f $@; then exit 0; else break; fi; }; \ exit 1;; \ esac; \ done; \ @@ -472,10 +427,7 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/Pci.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/Sbus.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/bsd_pci.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ix86Pci.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/linuxPci.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ppcPci.Plo@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/sparcPci.Plo@am__quote@ .c.o: @am__fastdepCC_TRUE@ $(COMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ $< @@ -526,7 +478,7 @@ ID: $(HEADERS) $(SOURCES) $(LISP) $(TAGS_FILES) unique=`for i in $$list; do \ if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \ done | \ - $(AWK) '{ files[$$0] = 1; nonemtpy = 1; } \ + $(AWK) '{ files[$$0] = 1; nonempty = 1; } \ END { if (nonempty) { for (i in files) print i; }; }'`; \ mkid -fID $$unique tags: TAGS diff --git a/xorg-server/hw/xfree86/os-support/bus/Pci.c b/xorg-server/hw/xfree86/os-support/bus/Pci.c index 064533c77..8ca2f1f9b 100644 --- a/xorg-server/hw/xfree86/os-support/bus/Pci.c +++ b/xorg-server/hw/xfree86/os-support/bus/Pci.c @@ -136,28 +136,17 @@ #include -#define PCI_MFDEV_SUPPORT 1 /* Include PCI multifunction device support */ -#define PCI_BRIDGE_SUPPORT 1 /* Include support for PCI-to-PCI bridges */ - -/* - * Global data - */ - -pciBusInfo_t *pciBusInfo[MAX_PCI_BUSES] = { NULL, }; -_X_EXPORT int pciNumBuses = 0; /* Actual number of PCI buses */ -int pciMaxBusNum = MAX_PCI_BUSES; +/* Global data */ +pciBusFuncs_t *pciBusFuncs = NULL; _X_EXPORT ADDRESS pciBusAddrToHostAddr(PCITAG tag, PciAddrType type, ADDRESS addr) { - int bus = PCI_BUS_FROM_TAG(tag); - - if ((bus >= 0) && (bus < pciNumBuses) && pciBusInfo[bus] && - pciBusInfo[bus]->funcs->pciAddrBusToHost) - return (*pciBusInfo[bus]->funcs->pciAddrBusToHost)(tag, type, addr); - else - return(addr); + if (pciBusFuncs && pciBusFuncs->pciAddrBusToHost) + return pciBusFuncs->pciAddrBusToHost(tag, type, addr); + else + return addr; } _X_EXPORT PCITAG @@ -172,7 +161,7 @@ pciAddrNOOP(PCITAG tag, PciAddrType type, ADDRESS addr) return(addr); } -_X_EXPORT Bool +Bool xf86scanpci(void) { Bool success = FALSE; diff --git a/xorg-server/hw/xfree86/os-support/bus/Pci.h b/xorg-server/hw/xfree86/os-support/bus/Pci.h index 557483b9b..5feb73349 100644 --- a/xorg-server/hw/xfree86/os-support/bus/Pci.h +++ b/xorg-server/hw/xfree86/os-support/bus/Pci.h @@ -115,16 +115,10 @@ /* * Global Definitions */ -#define MAX_PCI_DEVICES 128 /* Max number of devices accomodated */ - /* by xf86scanpci */ -#if defined(sun) && defined(SVR4) && defined(sparc) -# define MAX_PCI_BUSES 4096 /* Max number of PCI buses */ -#elif (defined(__alpha__) || defined(__ia64__)) && defined (linux) -# define MAX_PCI_DOMAINS 512 -# define PCI_DOM_MASK 0x01fful -# define MAX_PCI_BUSES (MAX_PCI_DOMAINS*256) /* 256 per domain */ +#if (defined(__alpha__) || defined(__ia64__)) && defined (linux) +#define PCI_DOM_MASK 0x01fful #else -# define MAX_PCI_BUSES 256 /* Max number of PCI buses */ +#define PCI_DOM_MASK 0x0ffu #endif #define DEVID(vendor, device) \ @@ -174,58 +168,21 @@ #endif /* !defined(DEBUGPCI) */ -/* - * PCI Config mechanism definitions - */ -#define PCI_EN 0x80000000 - -#define PCI_CFGMECH1_ADDRESS_REG 0xCF8 -#define PCI_CFGMECH1_DATA_REG 0xCFC - -#define PCI_CFGMECH1_MAXDEV 32 - #if defined(__FreeBSD__) || defined(__OpenBSD__) || defined(__NetBSD__) || \ - defined(__DragonFly__) + defined(__DragonFly__) || defined(__sun) #define ARCH_PCI_INIT bsdPciInit #endif #if defined(linux) -# define ARCH_PCI_INIT linuxPciInit -# if defined(__m32r__) -# define INCLUDE_XF86_MAP_PCI_MEM -# define INCLUDE_XF86_NO_DOMAIN -# endif +#define ARCH_PCI_INIT linuxPciInit #endif /* defined(linux) */ - -#if !defined(ARCH_PCI_INIT) -/* - * Select architecture specific PCI init function - */ -#if defined(__i386__) || defined(__i386) || defined(__amd64__) || defined(__amd64) || defined(__x86_64__) -# define ARCH_PCI_INIT ix86PciInit -#elif defined(__powerpc__) || defined(__powerpc64__) -# define ARCH_PCI_INIT ppcPciInit -#elif defined(__sparc__) || defined(sparc) -# define ARCH_PCI_INIT sparcPciInit -# define ARCH_PCI_PCI_BRIDGE sparcPciPciBridge -#endif -#endif /* !defined(ARCH_PCI_INIT) */ - #ifndef ARCH_PCI_INIT #error No PCI support available for this architecture/OS combination #endif extern void ARCH_PCI_INIT(void); -#if defined(XF86SCANPCI_WRAPPER) -typedef enum { - SCANPCI_INIT, - SCANPCI_TERM -} scanpciWrapperOpt; -extern void XF86SCANPCI_WRAPPER(scanpciWrapperOpt flags); -#endif - /* * Table of functions used to access a specific PCI bus domain * (e.g. a primary PCI bus and all of its secondaries) @@ -234,36 +191,9 @@ typedef struct pci_bus_funcs { ADDRESS (*pciAddrBusToHost)(PCITAG, PciAddrType, ADDRESS); } pciBusFuncs_t, *pciBusFuncs_p; -/* - * pciBusInfo_t - One structure per defined PCI bus - */ -typedef struct pci_bus_info { - unsigned char configMech; /* PCI config type to use */ - unsigned char numDevices; /* Range of valid devnums */ - unsigned char secondary; /* Boolean: bus is a secondary */ - int primary_bus; /* Parent bus */ - pciBusFuncs_p funcs; /* PCI access functions */ - void *pciBusPriv; /* Implementation private data */ - struct pci_device *bridge; /* bridge that opens this bus */ -} pciBusInfo_t; - -#define HOST_NO_BUS ((pciBusInfo_t *)(-1)) - -/* configMech values */ -#define PCI_CFG_MECH_UNKNOWN 0 /* Not yet known */ -#define PCI_CFG_MECH_1 1 /* Most machines */ -#define PCI_CFG_MECH_2 2 /* Older PC's */ -#define PCI_CFG_MECH_OTHER 3 /* Something else */ - /* Generic PCI service functions and helpers */ -CARD32 pciCfgMech1Read(PCITAG tag, int offset); -void pciCfgMech1Write(PCITAG tag, int offset, CARD32 val); -void pciCfgMech1SetBits(PCITAG tag, int offset, CARD32 mask, - CARD32 val); ADDRESS pciAddrNOOP(PCITAG tag, PciAddrType type, ADDRESS); -extern int pciMaxBusNum; - -extern pciBusInfo_t *pciBusInfo[]; +extern pciBusFuncs_t *pciBusFuncs; #endif /* _PCI_H */ diff --git a/xorg-server/hw/xfree86/os-support/bus/Sbus.c b/xorg-server/hw/xfree86/os-support/bus/Sbus.c index ff257a8c7..1363d5746 100644 --- a/xorg-server/hw/xfree86/os-support/bus/Sbus.c +++ b/xorg-server/hw/xfree86/os-support/bus/Sbus.c @@ -54,20 +54,20 @@ static struct openpromio *promOpio; sbusDevicePtr *xf86SbusInfo = NULL; struct sbus_devtable sbusDeviceTable[] = { - { SBUS_DEVICE_BW2, FBTYPE_SUN2BW, "bwtwo", "Sun Monochrome (bwtwo)" }, - { SBUS_DEVICE_CG2, FBTYPE_SUN2COLOR, "cgtwo", "Sun Color2 (cgtwo)" }, - { SBUS_DEVICE_CG3, FBTYPE_SUN3COLOR, "cgthree", "Sun Color3 (cgthree)" }, - { SBUS_DEVICE_CG4, FBTYPE_SUN4COLOR, "cgfour", "Sun Color4 (cgfour)" }, - { SBUS_DEVICE_CG6, FBTYPE_SUNFAST_COLOR, "cgsix", "Sun GX" }, - { SBUS_DEVICE_CG8, FBTYPE_MEMCOLOR, "cgeight", "Sun CG8/RasterOps" }, - { SBUS_DEVICE_CG12, FBTYPE_SUNGP3, "cgtwelve", "Sun GS (cgtwelve)" }, - { SBUS_DEVICE_CG14, FBTYPE_MDICOLOR, "cgfourteen", "Sun SX" }, - { SBUS_DEVICE_GT, FBTYPE_SUNGT, "gt", "Sun Graphics Tower" }, - { SBUS_DEVICE_MGX, -1, "mgx", "Quantum 3D MGXplus" }, - { SBUS_DEVICE_LEO, FBTYPE_SUNLEO, "leo", "Sun ZX or Turbo ZX" }, - { SBUS_DEVICE_TCX, FBTYPE_TCXCOLOR, "tcx", "Sun TCX" }, - { SBUS_DEVICE_FFB, FBTYPE_CREATOR, "ffb", "Sun FFB" }, - { SBUS_DEVICE_FFB, FBTYPE_CREATOR, "afb", "Sun Elite3D" }, + { SBUS_DEVICE_BW2, FBTYPE_SUN2BW, "bwtwo", "sunbw2", "Sun Monochrome (bwtwo)" }, + { SBUS_DEVICE_CG2, FBTYPE_SUN2COLOR, "cgtwo", NULL, "Sun Color2 (cgtwo)" }, + { SBUS_DEVICE_CG3, FBTYPE_SUN3COLOR, "cgthree", "suncg3", "Sun Color3 (cgthree)" }, + { SBUS_DEVICE_CG4, FBTYPE_SUN4COLOR, "cgfour", NULL, "Sun Color4 (cgfour)" }, + { SBUS_DEVICE_CG6, FBTYPE_SUNFAST_COLOR, "cgsix", "suncg6", "Sun GX" }, + { SBUS_DEVICE_CG8, FBTYPE_MEMCOLOR, "cgeight", NULL, "Sun CG8/RasterOps" }, + { SBUS_DEVICE_CG12, FBTYPE_SUNGP3, "cgtwelve", NULL, "Sun GS (cgtwelve)" }, + { SBUS_DEVICE_CG14, FBTYPE_MDICOLOR, "cgfourteen", "suncg14", "Sun SX" }, + { SBUS_DEVICE_GT, FBTYPE_SUNGT, "gt", NULL, "Sun Graphics Tower" }, + { SBUS_DEVICE_MGX, -1, "mgx", NULL, "Quantum 3D MGXplus" }, + { SBUS_DEVICE_LEO, FBTYPE_SUNLEO, "leo", "sunleo", "Sun ZX or Turbo ZX" }, + { SBUS_DEVICE_TCX, FBTYPE_TCXCOLOR, "tcx", "suntcx", "Sun TCX" }, + { SBUS_DEVICE_FFB, FBTYPE_CREATOR, "ffb", "sunffb", "Sun FFB" }, + { SBUS_DEVICE_FFB, FBTYPE_CREATOR, "afb", "sunffb", "Sun Elite3D" }, { 0, 0, NULL } }; @@ -240,6 +240,60 @@ sparcPromGetBool(sbusPromNodePtr pnode, const char *prop) return promGetBool(prop); } +static char * +promWalkGetDriverName(int node, int oldnode) +{ + int nextnode; + int len; + char *prop; + int devId, i; + + prop = promGetProperty("device_type", &len); + if (prop && (len > 0)) do { + if (!strcmp(prop, "display")) { + prop = promGetProperty("name", &len); + if (!prop || len <= 0) + break; + while ((*prop >= 'A' && *prop <= 'Z') || *prop == ',') + prop++; + for (i = 0; sbusDeviceTable[i].devId; i++) + if (!strcmp(prop, sbusDeviceTable[i].promName)) + break; + devId = sbusDeviceTable[i].devId; + if (!devId) + break; + if (sbusDeviceTable[i].driverName) + return sbusDeviceTable[i].driverName; + } + } while (0); + + nextnode = promGetChild(node); + if (nextnode) { + char *name; + name = promWalkGetDriverName(nextnode, node); + if (name) + return name; + } + + nextnode = promGetSibling(node); + if (nextnode) + return promWalkGetDriverName(nextnode, node); + return NULL; +} + +char * +sparcDriverName(void) +{ + char *name; + + if (sparcPromInit() < 0) + return NULL; + promGetSibling(0); + name = promWalkGetDriverName(promRootNode, 0); + sparcPromClose(); + return name; +} + static void promWalkAssignNodes(int node, int oldnode, int flags, sbusDevicePtr *devicePtrs) { @@ -321,7 +375,7 @@ sparcPromAssignNodes(void) FILE *f; sbusDevicePtr devicePtrs[32]; - (void)memset(devicePtrs, 0, sizeof(devicePtrs)); + memset(devicePtrs, 0, sizeof(devicePtrs)); for (psdpp = xf86SbusInfo, n = 0; (psdp = *psdpp); psdpp++, n++) { if (psdp->fbNum != n) holes = 1; diff --git a/xorg-server/hw/xfree86/os-support/bus/bsd_pci.c b/xorg-server/hw/xfree86/os-support/bus/bsd_pci.c index 57ad09b6a..9b55d3a44 100644 --- a/xorg-server/hw/xfree86/os-support/bus/bsd_pci.c +++ b/xorg-server/hw/xfree86/os-support/bus/bsd_pci.c @@ -48,20 +48,6 @@ #include "pciaccess.h" -static pciBusFuncs_t bsd_funcs = { - .pciAddrBusToHost = pciAddrNOOP, -}; - -static pciBusInfo_t bsd_pci = { - .configMech = PCI_CFG_MECH_OTHER, - .numDevices = 32, - .secondary = FALSE, - .primary_bus = 0, - .funcs = &bsd_funcs, - .pciBusPriv = NULL, - .bridge = NULL, -}; - _X_EXPORT pointer xf86MapDomainMemory(int ScreenNum, int Flags, struct pci_device *dev, ADDRESS Base, unsigned long Size) @@ -79,8 +65,5 @@ xf86MapLegacyIO(struct pci_device *dev) void bsdPciInit(void) { - pciNumBuses = 1; - pciBusInfo[0] = &bsd_pci; - xf86InitVidMem(); } diff --git a/xorg-server/hw/xfree86/os-support/bus/ix86Pci.c b/xorg-server/hw/xfree86/os-support/bus/ix86Pci.c deleted file mode 100644 index e54246355..000000000 --- a/xorg-server/hw/xfree86/os-support/bus/ix86Pci.c +++ /dev/null @@ -1,718 +0,0 @@ -/* - * ix86Pci.c - x86 PCI driver - * - * The XFree86 server PCI access functions have been reimplemented as a - * framework that allows each supported platform/OS to have their own - * platform/OS specific PCI driver. - * - * Most of the code of these functions was simply lifted from the - * Intel architecture specifric portion of the original Xfree86 - * PCI code in hw/xfree86/common_hw/xf86_PCI.C... - * - * Gary Barton - * Concurrent Computer Corporation - * garyb@gate.net - */ - -/* - * Copyright 1998 by Concurrent Computer Corporation - * - * Permission to use, copy, modify, distribute, and sell this software - * and its documentation for any purpose is hereby granted without fee, - * provided that the above copyright notice appear in all copies and that - * both that copyright notice and this permission notice appear in - * supporting documentation, and that the name of Concurrent Computer - * Corporation not be used in advertising or publicity pertaining to - * distribution of the software without specific, written prior - * permission. Concurrent Computer Corporation makes no representations - * about the suitability of this software for any purpose. It is - * provided "as is" without express or implied warranty. - * - * CONCURRENT COMPUTER CORPORATION DISCLAIMS ALL WARRANTIES WITH REGARD - * TO THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS, IN NO EVENT SHALL CONCURRENT COMPUTER CORPORATION BE - * LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY - * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, - * WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, - * ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS - * SOFTWARE. - * - * Copyright 1998 by Metro Link Incorporated - * - * Permission to use, copy, modify, distribute, and sell this software - * and its documentation for any purpose is hereby granted without fee, - * provided that the above copyright notice appear in all copies and that - * both that copyright notice and this permission notice appear in - * supporting documentation, and that the name of Metro Link - * Incorporated not be used in advertising or publicity pertaining to - * distribution of the software without specific, written prior - * permission. Metro Link Incorporated makes no representations - * about the suitability of this software for any purpose. It is - * provided "as is" without express or implied warranty. - * - * METRO LINK INCORPORATED DISCLAIMS ALL WARRANTIES WITH REGARD - * TO THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS, IN NO EVENT SHALL METRO LINK INCORPORATED BE - * LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY - * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, - * WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, - * ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS - * SOFTWARE. - * - * This software is derived from the original XFree86 PCI code - * which includes the following copyright notices as well: - * - * Copyright 1995 by Robin Cutshaw - * - * Permission to use, copy, modify, distribute, and sell this software and its - * documentation for any purpose is hereby granted without fee, provided that - * the above copyright notice appear in all copies and that both that - * copyright notice and this permission notice appear in supporting - * documentation, and that the names of the above listed copyright holder(s) - * not be used in advertising or publicity pertaining to distribution of - * the software without specific, written prior permission. The above listed - * copyright holder(s) make(s) no representations about the suitability of this - * software for any purpose. It is provided "as is" without express or - * implied warranty. - * - * THE ABOVE LISTED COPYRIGHT HOLDER(S) DISCLAIM(S) ALL WARRANTIES WITH REGARD - * TO THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS, IN NO EVENT SHALL THE ABOVE LISTED COPYRIGHT HOLDER(S) BE - * LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY - * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER - * IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING - * OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - * - * This code is also based heavily on the code in FreeBSD-current, which was - * written by Wolfgang Stanglmeier, and contains the following copyright: - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/* - * Copyright (c) 1999-2003 by The XFree86 Project, Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Except as contained in this notice, the name of the copyright holder(s) - * and author(s) shall not be used in advertising or otherwise to promote - * the sale, use or other dealings in this Software without prior written - * authorization from the copyright holder(s) and author(s). - */ - -#ifdef HAVE_XORG_CONFIG_H -#include -#endif - -#include -#include "compiler.h" -#include "xf86.h" -#include "xf86Priv.h" -#include "xf86_OSlib.h" -#include "Pci.h" - -#ifdef PC98 -#define outb(port,data) _outb(port,data) -#define outl(port,data) _outl(port,data) -#define inb(port) _inb(port) -#define inl(port) _inl(port) -#endif - -#define PCI_CFGMECH2_ENABLE_REG 0xCF8 -#ifdef PC98 -#define PCI_CFGMECH2_FORWARD_REG 0xCF9 -#else -#define PCI_CFGMECH2_FORWARD_REG 0xCFA -#endif - -#define PCI_CFGMECH2_MAXDEV 16 - -#define PCI_ADDR_FROM_TAG_CFG1(tag,reg) (PCI_EN | tag | (reg & 0xfc)) -#define PCI_FORWARD_FROM_TAG(tag) PCI_BUS_FROM_TAG(tag) -#define PCI_ENABLE_FROM_TAG(tag) (0xf0 | (((tag) & 0x00000700) >> 7)) -#define PCI_ADDR_FROM_TAG_CFG2(tag,reg) (0xc000 | (((tag) & 0x0000f800) >> 3) \ - | (reg & 0xfc)) - -/* - * Intel x86 platform specific PCI access functions - */ -#if 0 -static CARD32 ix86PciReadLongSetup(PCITAG tag, int off); -static void ix86PciWriteLongSetup(PCITAG, int off, CARD32 val); -static void ix86PciSetBitsLongSetup(PCITAG, int off, CARD32 mask, CARD32 val); -static CARD32 ix86PciReadLongCFG1(PCITAG tag, int off); -static void ix86PciWriteLongCFG1(PCITAG, int off, CARD32 val); -static void ix86PciSetBitsLongCFG1(PCITAG, int off, CARD32 mask, CARD32 val); -static CARD32 ix86PciReadLongCFG2(PCITAG tag, int off); -static void ix86PciWriteLongCFG2(PCITAG, int off, CARD32 val); -static void ix86PciSetBitsLongCFG2(PCITAG, int off, CARD32 mask, CARD32 val); -#endif - -static pciBusFuncs_t ix86Funcs0 = { -#if 0 -/* pciReadLong */ ix86PciReadLongSetup, -/* pciWriteLong */ ix86PciWriteLongSetup, -/* pciSetBitsLong */ ix86PciSetBitsLongSetup, -/* pciAddrHostToBus */ pciAddrNOOP, -#endif -/* pciAddrBusToHost */ pciAddrNOOP -}; - -static pciBusFuncs_t ix86Funcs1 = { -#if 0 -/* pciReadLong */ ix86PciReadLongCFG1, -/* pciWriteLong */ ix86PciWriteLongCFG1, -/* pciSetBitsLong */ ix86PciSetBitsLongCFG1, -/* pciAddrHostToBus */ pciAddrNOOP, -#endif -/* pciAddrBusToHost */ pciAddrNOOP -}; - -static pciBusFuncs_t ix86Funcs2 = { -#if 0 -/* pciReadLong */ ix86PciReadLongCFG2, -/* pciWriteLong */ ix86PciWriteLongCFG2, -/* pciSetBitsLong */ ix86PciSetBitsLongCFG2, -/* pciAddrHostToBus */ pciAddrNOOP, -#endif -/* pciAddrBusToHost */ pciAddrNOOP -}; - -static pciBusInfo_t ix86Pci0 = { -/* configMech */ PCI_CFG_MECH_UNKNOWN, /* Set by ix86PciInit() */ -/* numDevices */ 0, /* Set by ix86PciInit() */ -/* secondary */ FALSE, -/* primary_bus */ 0, -/* funcs */ &ix86Funcs0, /* Set by ix86PciInit() */ -/* pciBusPriv */ NULL, -/* bridge */ NULL -}; - -_X_EXPORT pointer -xf86MapDomainMemory(int ScreenNum, int Flags, struct pci_device *dev, - ADDRESS Base, unsigned long Size) -{ - return xf86MapVidMem(ScreenNum, Flags, Base, Size); -} - -IOADDRESS -xf86MapLegacyIO(struct pci_device *dev) -{ - (void)dev; - return 0; -} - -static Bool -ix86PciBusCheck(void) -{ -#if 0 - PCITAG tag; - CARD32 id, class; - CARD8 device; - - for (device = 0; device < ix86Pci0.numDevices; device++) { - tag = PCI_MAKE_TAG(0, device, 0); - id = (*ix86Pci0.funcs->pciReadLong)(tag, PCI_ID_REG); - - if ((CARD16)(id + 1U) <= (CARD16)1UL) - continue; - - /* The rest of this is inspired by the Linux kernel */ - class = (*ix86Pci0.funcs->pciReadLong)(tag, PCI_CLASS_REG); - - /* Ignore revision id and programming interface */ - switch (class >> 16) { - case (PCI_CLASS_PREHISTORIC << 8) | PCI_SUBCLASS_PREHISTORIC_MISC: - /* Check for vendors of known buggy chipsets */ - id &= 0x0000ffff; - if ((id == PCI_VENDOR_INTEL) || (id == PCI_VENDOR_COMPAQ)) - return TRUE; - continue; - - case (PCI_CLASS_PREHISTORIC << 8) | PCI_SUBCLASS_PREHISTORIC_VGA: - case (PCI_CLASS_DISPLAY << 8) | PCI_SUBCLASS_DISPLAY_VGA: - case (PCI_CLASS_BRIDGE << 8) | PCI_SUBCLASS_BRIDGE_HOST: - return TRUE; - - default: - break; - } - } -#endif - return FALSE; -} - -static -void ix86PciSelectCfgmech(void) -{ - static Bool beenhere = FALSE; - CARD32 mode1Res1 = 0, mode1Res2 = 0, oldVal1 = 0; - CARD8 mode2Res1 = 0, mode2Res2 = 0, oldVal2 = 0; - int stages = 0; - - if (beenhere) - return; /* Been there, done that */ - - beenhere = TRUE; - - /* - * Determine if motherboard chipset supports PCI Config Mech 1 or 2 - * We rely on xf86Info.pciFlags to tell which mechanisms to try.... - */ - switch (xf86Info.pciFlags) { - case PCIOsConfig: - case PCIProbe1: - if (!xf86EnableIO()) - return; - - xf86MsgVerb(X_INFO, 2, - "PCI: Probing config type using method 1\n"); - oldVal1 = inl(PCI_CFGMECH1_ADDRESS_REG); - -#ifdef DEBUGPCI - if (xf86Verbose > 2) { - ErrorF("Checking config type 1:\n" - "\tinitial value of MODE1_ADDR_REG is 0x%08x\n", oldVal1); - ErrorF("\tChecking that all bits in mask 0x7f000000 are clear\n"); - } -#endif - - /* Assuming config type 1 to start with */ - if ((oldVal1 & 0x7f000000) == 0) { - - stages |= 0x01; - -#ifdef DEBUGPCI - if (xf86Verbose > 2) { - ErrorF("\tValue indicates possibly config type 1\n"); - ErrorF("\tWriting 32-bit value 0x%08x to MODE1_ADDR_REG\n", PCI_EN); -#if 0 - ErrorF("\tWriting 8-bit value 0x00 to MODE1_ADDR_REG + 3\n"); -#endif - } -#endif - - ix86Pci0.configMech = PCI_CFG_MECH_1; - ix86Pci0.numDevices = PCI_CFGMECH1_MAXDEV; - ix86Pci0.funcs = &ix86Funcs1; - - outl(PCI_CFGMECH1_ADDRESS_REG, PCI_EN); - -#if 0 - /* - * This seems to cause some Neptune-based PCI machines to switch - * from config type 1 to config type 2 - */ - outb(PCI_CFGMECH1_ADDRESS_REG + 3, 0); -#endif - mode1Res1 = inl(PCI_CFGMECH1_ADDRESS_REG); - -#ifdef DEBUGPCI - if (xf86Verbose > 2) { - ErrorF("\tValue read back from MODE1_ADDR_REG is 0x%08x\n", - mode1Res1); - ErrorF("\tRestoring original contents of MODE1_ADDR_REG\n"); - } -#endif - - outl(PCI_CFGMECH1_ADDRESS_REG, oldVal1); - - if (mode1Res1) { - - stages |= 0x02; - -#ifdef DEBUGPCI - if (xf86Verbose > 2) { - ErrorF("\tValue read back is non-zero, and indicates possible" - " config type 1\n"); - } -#endif - - if (ix86PciBusCheck()) { - -#ifdef DEBUGPCI - if (xf86Verbose > 2) - ErrorF("\tBus check Confirms this: "); -#endif - - xf86MsgVerb(X_INFO, 2, "PCI: Config type is 1\n"); - xf86MsgVerb(X_INFO, 3, - "PCI: stages = 0x%02x, oldVal1 = 0x%08lx, mode1Res1" - " = 0x%08lx\n", stages, (unsigned long)oldVal1, - (unsigned long)mode1Res1); - return; - } - -#ifdef DEBUGPCI - if (xf86Verbose > 2) { - ErrorF("\tBus check fails to confirm this, continuing type 1" - " check ...\n"); - } -#endif - - } - - stages |= 0x04; - -#ifdef DEBUGPCI - if (xf86Verbose > 2) { - ErrorF("\tWriting 0xff000001 to MODE1_ADDR_REG\n"); - } -#endif - outl(PCI_CFGMECH1_ADDRESS_REG, 0xff000001); - mode1Res2 = inl(PCI_CFGMECH1_ADDRESS_REG); - -#ifdef DEBUGPCI - if (xf86Verbose > 2) { - ErrorF("\tValue read back from MODE1_ADDR_REG is 0x%08x\n", - mode1Res2); - ErrorF("\tRestoring original contents of MODE1_ADDR_REG\n"); - } -#endif - - outl(PCI_CFGMECH1_ADDRESS_REG, oldVal1); - - if ((mode1Res2 & 0x80000001) == 0x80000000) { - - stages |= 0x08; - -#ifdef DEBUGPCI - if (xf86Verbose > 2) { - ErrorF("\tValue read back has only the msb set\n" - "\tThis indicates possible config type 1\n"); - } -#endif - - if (ix86PciBusCheck()) { - -#ifdef DEBUGPCI - if (xf86Verbose > 2) - ErrorF("\tBus check Confirms this: "); -#endif - - xf86MsgVerb(X_INFO, 2, "PCI: Config type is 1\n"); - xf86MsgVerb(X_INFO, 3, - "PCI: stages = 0x%02x, oldVal1 = 0x%08lx,\n" - "\tmode1Res1 = 0x%08lx, mode1Res2 = 0x%08lx\n", - stages, (unsigned long)oldVal1, - (unsigned long)mode1Res1, (unsigned long)mode1Res2); - return; - } - -#ifdef DEBUGPCI - if (xf86Verbose > 2) { - ErrorF("\tBus check fails to confirm this.\n"); - } -#endif - - } - } - - xf86MsgVerb(X_INFO, 3, "PCI: Standard check for type 1 failed.\n"); - xf86MsgVerb(X_INFO, 3, "PCI: stages = 0x%02x, oldVal1 = 0x%08lx,\n" - "\tmode1Res1 = 0x%08lx, mode1Res2 = 0x%08lx\n", - stages, (unsigned long)oldVal1, (unsigned long)mode1Res1, - (unsigned long)mode1Res2); - - /* Try config type 2 */ - oldVal2 = inb(PCI_CFGMECH2_ENABLE_REG); - if ((oldVal2 & 0xf0) == 0) { - ix86Pci0.configMech = PCI_CFG_MECH_2; - ix86Pci0.numDevices = PCI_CFGMECH2_MAXDEV; - ix86Pci0.funcs = &ix86Funcs2; - - outb(PCI_CFGMECH2_ENABLE_REG, 0x0e); - mode2Res1 = inb(PCI_CFGMECH2_ENABLE_REG); - outb(PCI_CFGMECH2_ENABLE_REG, oldVal2); - - if (mode2Res1 == 0x0e) { - if (ix86PciBusCheck()) { - xf86MsgVerb(X_INFO, 2, "PCI: Config type is 2\n"); - return; - } - } - } - break; /* } */ - - case PCIProbe2: /* { */ - if (!xf86EnableIO()) - return; - - /* The scanpci-style detection method */ - - xf86MsgVerb(X_INFO, 2, "PCI: Probing config type using method 2\n"); - - outb(PCI_CFGMECH2_ENABLE_REG, 0x00); - outb(PCI_CFGMECH2_FORWARD_REG, 0x00); - mode2Res1 = inb(PCI_CFGMECH2_ENABLE_REG); - mode2Res2 = inb(PCI_CFGMECH2_FORWARD_REG); - - if (mode2Res1 == 0 && mode2Res2 == 0) { - xf86MsgVerb(X_INFO, 2, "PCI: Config type is 2\n"); - ix86Pci0.configMech = PCI_CFG_MECH_2; - ix86Pci0.numDevices = PCI_CFGMECH2_MAXDEV; - ix86Pci0.funcs = &ix86Funcs2; - return; - } - - oldVal1 = inl(PCI_CFGMECH1_ADDRESS_REG); - outl(PCI_CFGMECH1_ADDRESS_REG, PCI_EN); - mode1Res1 = inl(PCI_CFGMECH1_ADDRESS_REG); - outl(PCI_CFGMECH1_ADDRESS_REG, oldVal1); - if (mode1Res1 == PCI_EN) { - xf86MsgVerb(X_INFO, 2, "PCI: Config type is 1\n"); - ix86Pci0.configMech = PCI_CFG_MECH_1; - ix86Pci0.numDevices = PCI_CFGMECH1_MAXDEV; - ix86Pci0.funcs = &ix86Funcs1; - return; - } - break; /* } */ - - case PCIForceConfig1: - if (!xf86EnableIO()) - return; - - xf86MsgVerb(X_INFO, 2, "PCI: Forcing config type 1\n"); - - ix86Pci0.configMech = PCI_CFG_MECH_1; - ix86Pci0.numDevices = PCI_CFGMECH1_MAXDEV; - ix86Pci0.funcs = &ix86Funcs1; - return; - - case PCIForceConfig2: - if (!xf86EnableIO()) - return; - - xf86MsgVerb(X_INFO, 2, "PCI: Forcing config type 2\n"); - - ix86Pci0.configMech = PCI_CFG_MECH_2; - ix86Pci0.numDevices = PCI_CFGMECH2_MAXDEV; - ix86Pci0.funcs = &ix86Funcs2; - return; - - case PCIForceNone: - break; - } - - /* No PCI found */ - ix86Pci0.configMech = PCI_CFG_MECH_UNKNOWN; - xf86MsgVerb(X_INFO, 2, "PCI: No PCI bus found or probed for\n"); -} - -#if 0 -static pciTagRec -ix86PcibusTag(CARD8 bus, CARD8 cardnum, CARD8 func) -{ - pciTagRec tag; - - tag.cfg1 = 0; - - if (func > 7 || cardnum >= pciBusInfo[bus]->numDevices) - return tag; - - switch (ix86Pci0.configMech) { - case PCI_CFG_MECH_1: - tag.cfg1 = PCI_EN | ((CARD32)bus << 16) | - ((CARD32)cardnum << 11) | - ((CARD32)func << 8); - break; - - case PCI_CFG_MECH_2: - tag.cfg2.port = 0xc000 | ((CARD16)cardnum << 8); - tag.cfg2.enable = 0xf0 | (func << 1); - tag.cfg2.forward = bus; - break; - } - - return tag; -} -#endif - -#if 0 -static CARD32 -ix86PciReadLongSetup(PCITAG Tag, int reg) -{ - ix86PciSelectCfgmech(); - return (*ix86Pci0.funcs->pciReadLong)(Tag,reg); -} - -static CARD32 -ix86PciReadLongCFG1(PCITAG Tag, int reg) -{ - CARD32 addr, data = 0; - -#ifdef DEBUGPCI - ErrorF("ix86PciReadLong 0x%lx, %d\n", Tag, reg); -#endif - - addr = PCI_ADDR_FROM_TAG_CFG1(Tag,reg); - outl(PCI_CFGMECH1_ADDRESS_REG, addr); - data = inl(PCI_CFGMECH1_DATA_REG); - outl(PCI_CFGMECH1_ADDRESS_REG, 0); - -#ifdef DEBUGPCI - ErrorF("ix86PciReadLong 0x%lx\n", data); -#endif - - return data; -} - -static CARD32 -ix86PciReadLongCFG2(PCITAG Tag, int reg) -{ - CARD32 addr, data = 0; - CARD8 forward, enable; - -#ifdef DEBUGPCI - ErrorF("ix86PciReadLong 0x%lx, %d\n", Tag, reg); -#endif - - forward = PCI_FORWARD_FROM_TAG(Tag); - enable = PCI_ENABLE_FROM_TAG(Tag); - addr = PCI_ADDR_FROM_TAG_CFG2(Tag,reg); - - outb(PCI_CFGMECH2_ENABLE_REG, enable); - outb(PCI_CFGMECH2_FORWARD_REG, forward); - data = inl((CARD16)addr); - outb(PCI_CFGMECH2_ENABLE_REG, 0); - outb(PCI_CFGMECH2_FORWARD_REG, 0); - -#ifdef DEBUGPCI - ErrorF("ix86PciReadLong 0x%lx\n", data); -#endif - - return data; -} - -static void -ix86PciWriteLongSetup(PCITAG Tag, int reg, CARD32 data) -{ - ix86PciSelectCfgmech(); - (*ix86Pci0.funcs->pciWriteLong)(Tag,reg,data); -} - -static void -ix86PciWriteLongCFG1(PCITAG Tag, int reg, CARD32 data) -{ - CARD32 addr; - - addr = PCI_ADDR_FROM_TAG_CFG1(Tag,reg); - outl(PCI_CFGMECH1_ADDRESS_REG, addr); - outl(PCI_CFGMECH1_DATA_REG, data); - outl(PCI_CFGMECH1_ADDRESS_REG, 0); -} - -static void -ix86PciWriteLongCFG2(PCITAG Tag, int reg, CARD32 data) -{ - CARD32 addr; - CARD8 forward, enable; - - forward = PCI_FORWARD_FROM_TAG(Tag); - enable = PCI_ENABLE_FROM_TAG(Tag); - addr = PCI_ADDR_FROM_TAG_CFG2(Tag,reg); - - outb(PCI_CFGMECH2_ENABLE_REG, enable); - outb(PCI_CFGMECH2_FORWARD_REG, forward); - outl((CARD16)addr, data); - outb(PCI_CFGMECH2_ENABLE_REG, 0); - outb(PCI_CFGMECH2_FORWARD_REG, 0); -} - -static void -ix86PciSetBitsLongSetup(PCITAG Tag, int reg, CARD32 mask, CARD32 val) -{ - ix86PciSelectCfgmech(); - (*ix86Pci0.funcs->pciSetBitsLong)(Tag,reg,mask,val); -} - -static void -ix86PciSetBitsLongCFG1(PCITAG Tag, int reg, CARD32 mask, CARD32 val) -{ - CARD32 addr, data = 0; - -#ifdef DEBUGPCI - ErrorF("ix86PciSetBitsLong 0x%lx, %d\n", Tag, reg); -#endif - - addr = PCI_ADDR_FROM_TAG_CFG1(Tag,reg); - outl(PCI_CFGMECH1_ADDRESS_REG, addr); - data = inl(PCI_CFGMECH1_DATA_REG); - data = (data & ~mask) | (val & mask); - outl(PCI_CFGMECH1_DATA_REG, data); - outl(PCI_CFGMECH1_ADDRESS_REG, 0); -} - -static void -ix86PciSetBitsLongCFG2(PCITAG Tag, int reg, CARD32 mask, CARD32 val) -{ - CARD32 addr, data = 0; - CARD8 enable, forward; - -#ifdef DEBUGPCI - ErrorF("ix86PciSetBitsLong 0x%lx, %d\n", Tag, reg); -#endif - - forward = PCI_FORWARD_FROM_TAG(Tag); - enable = PCI_ENABLE_FROM_TAG(Tag); - addr = PCI_ADDR_FROM_TAG_CFG2(Tag,reg); - - outb(PCI_CFGMECH2_ENABLE_REG, enable); - outb(PCI_CFGMECH2_FORWARD_REG, forward); - data = inl((CARD16)addr); - data = (data & ~mask) | (val & mask); - outl((CARD16)addr, data); - outb(PCI_CFGMECH2_ENABLE_REG, 0); - outb(PCI_CFGMECH2_FORWARD_REG, 0); -} -#endif - -void -ix86PciInit() -{ - /* Initialize pciBusInfo[] array and function pointers */ - pciNumBuses = 1; - pciBusInfo[0] = &ix86Pci0; - - /* Make sure that there is a PCI bus present. */ - ix86PciSelectCfgmech(); - if (ix86Pci0.configMech == PCI_CFG_MECH_UNKNOWN) { - pciNumBuses = 0; - pciBusInfo[0] = NULL; - } -} diff --git a/xorg-server/hw/xfree86/os-support/bus/linuxPci.c b/xorg-server/hw/xfree86/os-support/bus/linuxPci.c index 11eb4f9e8..263fd8ff1 100644 --- a/xorg-server/hw/xfree86/os-support/bus/linuxPci.c +++ b/xorg-server/hw/xfree86/os-support/bus/linuxPci.c @@ -79,44 +79,28 @@ static pciBusFuncs_t linuxFuncs0 = { #endif }; -static pciBusInfo_t linuxPci0 = { -/* configMech */ PCI_CFG_MECH_OTHER, -/* numDevices */ 32, -/* secondary */ FALSE, -/* primary_bus */ 0, -/* funcs */ &linuxFuncs0, -/* pciBusPriv */ NULL, -/* bridge */ NULL -}; - static const struct pci_id_match match_host_bridge = { PCI_MATCH_ANY, PCI_MATCH_ANY, PCI_MATCH_ANY, PCI_MATCH_ANY, (PCI_CLASS_BRIDGE << 16) | (PCI_SUBCLASS_BRIDGE_HOST << 8), 0x0000ffff00, 0 }; -#ifndef INCLUDE_XF86_NO_DOMAIN #define MAX_DOMAINS 257 static pointer DomainMmappedIO[MAX_DOMAINS]; -#endif void linuxPciInit(void) { - struct stat st; + struct stat st; -#ifndef INCLUDE_XF86_NO_DOMAIN - (void) memset(DomainMmappedIO, 0, sizeof(DomainMmappedIO)); -#endif + memset(DomainMmappedIO, 0, sizeof(DomainMmappedIO)); - if ((xf86Info.pciFlags == PCIForceNone) || - (-1 == stat("/proc/bus/pci", &st))) { - /* when using this as default for all linux architectures, - we'll need a fallback for 2.0 kernels here */ - return; - } - pciNumBuses = 1; - pciBusInfo[0] = &linuxPci0; + if (-1 == stat("/proc/bus/pci", &st)) { + /* when using this as default for all linux architectures, + we'll need a fallback for 2.0 kernels here */ + return; + } + pciBusFuncs = &linuxFuncs0; } /** @@ -239,7 +223,6 @@ linuxPpcBusAddrToHostAddr(PCITAG tag, PciAddrType type, ADDRESS addr) #endif /* __powerpc__ */ -#ifndef INCLUDE_XF86_NO_DOMAIN /* * Compiling the following simply requires the presence of . @@ -603,4 +586,3 @@ xf86AccResFromOS(resPtr pRes) return pRes; } -#endif /* !INCLUDE_XF86_NO_DOMAIN */ diff --git a/xorg-server/hw/xfree86/os-support/bus/ppcPci.c b/xorg-server/hw/xfree86/os-support/bus/ppcPci.c deleted file mode 100644 index 49c1a2a39..000000000 --- a/xorg-server/hw/xfree86/os-support/bus/ppcPci.c +++ /dev/null @@ -1,82 +0,0 @@ -/* - * ppcPci.c - PowerPC PCI access functions - * - * PCI driver functions supporting Motorola PowerPC platforms - * including Powerstack(RiscPC/RiscPC+), PowerStackII, MTX, and - * MVME 160x/260x/360x/460x VME boards - * - * Gary Barton - * Concurrent Computer Corporation - * garyb@gate.net - * - */ - -/* - * Copyright 1998 by Concurrent Computer Corporation - * - * Permission to use, copy, modify, distribute, and sell this software - * and its documentation for any purpose is hereby granted without fee, - * provided that the above copyright notice appear in all copies and that - * both that copyright notice and this permission notice appear in - * supporting documentation, and that the name of Concurrent Computer - * Corporation not be used in advertising or publicity pertaining to - * distribution of the software without specific, written prior - * permission. Concurrent Computer Corporation makes no representations - * about the suitability of this software for any purpose. It is - * provided "as is" without express or implied warranty. - * - * CONCURRENT COMPUTER CORPORATION DISCLAIMS ALL WARRANTIES WITH REGARD - * TO THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS, IN NO EVENT SHALL CONCURRENT COMPUTER CORPORATION BE - * LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY - * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, - * WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, - * ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS - * SOFTWARE. - * - * Copyright 1998 by Metro Link Incorporated - * - * Permission to use, copy, modify, distribute, and sell this software - * and its documentation for any purpose is hereby granted without fee, - * provided that the above copyright notice appear in all copies and that - * both that copyright notice and this permission notice appear in - * supporting documentation, and that the name of Metro Link - * Incorporated not be used in advertising or publicity pertaining to - * distribution of the software without specific, written prior - * permission. Metro Link Incorporated makes no representations - * about the suitability of this software for any purpose. It is - * provided "as is" without express or implied warranty. - * - * METRO LINK INCORPORATED DISCLAIMS ALL WARRANTIES WITH REGARD - * TO THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS, IN NO EVENT SHALL METRO LINK INCORPORATED BE - * LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY - * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, - * WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, - * ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS - * SOFTWARE. - */ - -#ifdef HAVE_XORG_CONFIG_H -#include -#endif - -#include -#include "compiler.h" -#include "xf86.h" -#include "xf86Priv.h" -#include "xf86_OSlib.h" -#include "Pci.h" - -#ifndef MAP_FAILED -#define MAP_FAILED (pointer)(-1) -#endif - -void -ppcPciInit() -{ - - static void motoppcPciInit(void); - motoppcPciInit(); - -} diff --git a/xorg-server/hw/xfree86/os-support/bus/sparcPci.c b/xorg-server/hw/xfree86/os-support/bus/sparcPci.c deleted file mode 100644 index 2d8039c29..000000000 --- a/xorg-server/hw/xfree86/os-support/bus/sparcPci.c +++ /dev/null @@ -1,979 +0,0 @@ -/* - * Copyright (C) 2001-2003 The XFree86 Project, Inc. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to - * deal in the Software without restriction, including without limitation the - * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * XFREE86 PROJECT BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * Except as contained in this notice, the name of the XFree86 Project shall - * not be used in advertising or otherwise to promote the sale, use or other - * dealings in this Software without prior written authorization from the - * XFree86 Project. - */ - -#ifdef HAVE_XORG_CONFIG_H -#include -#endif - -#include "xf86.h" -#include "xf86Priv.h" -#include "xf86_OSlib.h" -#include "Pci.h" -#include "xf86sbusBus.h" - -#if defined(sun) - -extern char *apertureDevName; -static int apertureFd = -1; - -/* - * A version of xf86MapVidMem() that allows for 64-bit displacements (but not - * sizes). Areas thus mapped can be unmapped by xf86UnMapVidMem(). - */ -static pointer -sparcMapAperture(int iScreen, int Flags, - unsigned long long Base, unsigned long Size) -{ - pointer result; - static int lastFlags = 0; - - /* Assume both Base & Size are multiples of the page size */ - - if ((apertureFd < 0) || (Flags != lastFlags)) { - if (apertureFd >= 0) - close(apertureFd); - lastFlags = Flags; - apertureFd = open(apertureDevName, - (Flags & VIDMEM_READONLY) ? O_RDONLY : O_RDWR); - if (apertureFd < 0) - FatalError("sparcMapAperture: open failure: %s\n", - strerror(errno)); - } - - result = mmap(NULL, Size, - (Flags & VIDMEM_READONLY) ? - PROT_READ : (PROT_READ | PROT_WRITE), - MAP_SHARED, apertureFd, (off_t)Base); - - if (result == MAP_FAILED) - FatalError("sparcMapAperture: mmap failure: %s\n", strerror(errno)); - - return result; -} - -/* - * Platform-specific bus privates. - */ -typedef struct _sparcDomainRec { - unsigned long long io_addr, io_size; - unsigned long long mem_addr, mem_size; - pointer pci, io; - int bus_min, bus_max; - unsigned char dfn_mask[256 / 8]; -} sparcDomainRec, *sparcDomainPtr; - -#define SetBitInMap(bit, map) \ - do { \ - int _bit = (bit); \ - (map)[_bit >> 3] |= 1 << (_bit & 7); \ - } while (0) - -#define IsBitSetInMap(bit, map) \ - ((map)[(bit) >> 3] & (1 << ((bit) & 7))) - -/* - * Domain 0 is reserved for the one that represents the system as a whole, i.e. - * the one without any resource relocations. - */ -#define MAX_DOMAINS (MAX_PCI_BUSES / 256) -static sparcDomainPtr xf86DomainInfo[MAX_DOMAINS]; -static int pciNumDomains = 1; - -/* Variables that are assigned this must be declared volatile */ -#define PciReg(base, tag, off, type) \ - *(volatile type *)(pointer)((char *)(base) + \ - (PCI_TAG_NO_DOMAIN(tag) | (off))) - -/* Generic SPARC PCI access functions */ -static CARD32 -sparcPciCfgRead32(PCITAG tag, int off) -{ - pciBusInfo_t *pBusInfo; - sparcDomainPtr pDomain; - volatile CARD32 result = (CARD32)(-1); /* Must be volatile */ - int bus; - - if ((off >= 0) && (off <= 252) && !(off & 3) && - ((bus = PCI_BUS_FROM_TAG(tag)) < pciNumBuses) && - (pBusInfo = pciBusInfo[bus]) && (pDomain = pBusInfo->pciBusPriv) && - (bus >= pDomain->bus_min) && (bus < pDomain->bus_max) && - ((bus > pDomain->bus_min) || - IsBitSetInMap(PCI_DFN_FROM_TAG(tag), pDomain->dfn_mask))) { - result = PciReg(pDomain->pci, tag, off, CARD32); - - result = PCI_CPU(result); - } - - return result; -} - -static void -sparcPciCfgWrite32(PCITAG tag, int off, CARD32 val) -{ - pciBusInfo_t *pBusInfo; - sparcDomainPtr pDomain; - int bus; - - if ((off < 0) || (off > 252) || (off & 3) || - ((bus = PCI_BUS_FROM_TAG(tag)) >= pciNumBuses) || - !(pBusInfo = pciBusInfo[bus]) || !(pDomain = pBusInfo->pciBusPriv) || - (bus < pDomain->bus_min) || (bus >= pDomain->bus_max) || - ((bus == pDomain->bus_min) && - !IsBitSetInMap(PCI_DFN_FROM_TAG(tag), pDomain->dfn_mask))) - return; - - val = PCI_CPU(val); - PciReg(pDomain->pci, tag, off, CARD32) = val; -} - -static void -sparcPciCfgSetBits32(PCITAG tag, int off, CARD32 mask, CARD32 bits) -{ - CARD32 PciVal; - - PciVal = sparcPciCfgRead32(tag, off); - PciVal &= ~mask; - PciVal |= bits; - sparcPciCfgWrite32(tag, off, PciVal); -} - -static pciBusFuncs_t sparcPCIFunctions = -{ - sparcPciCfgRead32, - sparcPciCfgWrite32, - sparcPciCfgSetBits32, - pciAddrNOOP, - pciAddrNOOP -}; - -/* - * Sabre-specific versions of the above because of its peculiar access size - * requirements. - */ -static CARD32 -sabrePciCfgRead32(PCITAG tag, int off) -{ - pciBusInfo_t *pBusInfo; - sparcDomainPtr pDomain; - volatile CARD32 result; /* Must be volatile */ - int bus; - - if (PCI_BDEV_FROM_TAG(tag)) - return sparcPciCfgRead32(tag, off); - - if (PCI_FUNC_FROM_TAG(tag) || (off < 0) || (off > 252) || (off & 3) || - ((bus = PCI_BUS_FROM_TAG(tag)) >= pciNumBuses) || - !(pBusInfo = pciBusInfo[bus]) || !(pDomain = pBusInfo->pciBusPriv) || - (bus != pDomain->bus_min)) - return (CARD32)(-1); - - if (off < 8) { - result = (PciReg(pDomain->pci, tag, off, CARD16) << 16) | - PciReg(pDomain->pci, tag, off + 2, CARD16); - return PCI_CPU(result); - } - - result = (PciReg(pDomain->pci, tag, off + 3, CARD8) << 24) | - (PciReg(pDomain->pci, tag, off + 2, CARD8) << 16) | - (PciReg(pDomain->pci, tag, off + 1, CARD8) << 8) | - (PciReg(pDomain->pci, tag, off , CARD8) ); - return result; -} - -static void -sabrePciCfgWrite32(PCITAG tag, int off, CARD32 val) -{ - pciBusInfo_t *pBusInfo; - sparcDomainPtr pDomain; - int bus; - - if (PCI_BDEV_FROM_TAG(tag)) - sparcPciCfgWrite32(tag, off, val); - else if (!PCI_FUNC_FROM_TAG(tag) && - (off >= 0) && (off <= 252) && !(off & 3) && - ((bus = PCI_BUS_FROM_TAG(tag)) < pciNumBuses) && - (pBusInfo = pciBusInfo[bus]) && - (pDomain = pBusInfo->pciBusPriv) && - (bus == pDomain->bus_min)) { - if (off < 8) { - val = PCI_CPU(val); - PciReg(pDomain->pci, tag, off , CARD16) = val >> 16; - PciReg(pDomain->pci, tag, off + 2, CARD16) = val; - } else { - PciReg(pDomain->pci, tag, off , CARD8) = val; - PciReg(pDomain->pci, tag, off + 1, CARD8) = val >> 8; - PciReg(pDomain->pci, tag, off + 2, CARD8) = val >> 16; - PciReg(pDomain->pci, tag, off + 3, CARD8) = val >> 24; - } - } -} - -static void -sabrePciCfgSetBits32(PCITAG tag, int off, CARD32 mask, CARD32 bits) -{ - CARD32 PciVal; - - PciVal = sabrePciCfgRead32(tag, off); - PciVal &= ~mask; - PciVal |= bits; - sabrePciCfgWrite32(tag, off, PciVal); -} - -static pciBusFuncs_t sabrePCIFunctions = -{ - sabrePciCfgRead32, - sabrePciCfgWrite32, - sabrePciCfgSetBits32, - pciAddrNOOP, - pciAddrNOOP -}; - -static int pagemask; - -/* Scan PROM for all PCI host bridges in the system */ -void -sparcPciInit(void) -{ - int node, node2; - - if (!xf86LinearVidMem()) - return; - - apertureFd = open(apertureDevName, O_RDWR); - if (apertureFd < 0) { - xf86Msg(X_ERROR, - "sparcPciInit: open failure: %s\n", strerror(errno)); - return; - } - - sparcPromInit(); - pagemask = getpagesize() - 1; - - for (node = promGetChild(promRootNode); - node; - node = promGetSibling(node)) { - unsigned long long pci_addr; - sparcDomainRec domain; - sparcDomainPtr pDomain; - pciBusFuncs_p pFunctions; - char *prop_val; - int prop_len, bus; - - prop_val = promGetProperty("name", &prop_len); - /* Some PROMs include the trailing null; some don't */ - if (!prop_val || (prop_len < 3) || (prop_len > 4) || - strcmp(prop_val, "pci")) - continue; - - prop_val = promGetProperty("model", &prop_len); - if (!prop_val || (prop_len <= 0)) { - prop_val = promGetProperty("compatible", &prop_len); - if (!prop_val || (prop_len <= 0)) - continue; - } - - pFunctions = &sparcPCIFunctions; - (void)memset(&domain, 0, sizeof(domain)); - - if (!strncmp("SUNW,sabre", prop_val, prop_len) || - !strncmp("pci108e,a000", prop_val, prop_len) || - !strncmp("pci108e,a001", prop_val, prop_len)) { - /* - * There can only be one "Sabre" bridge in a system. It provides - * PCI configuration space, a 24-bit I/O space and a 32-bit memory - * space, all three of which are at fixed physical CPU addresses. - */ - static Bool sabre_seen = FALSE; - - xf86Msg(X_INFO, - "Sabre or Hummingbird PCI host bridge found (\"%s\")\n", - prop_val); - - /* There can only be one Sabre */ - if (sabre_seen) - continue; - sabre_seen = TRUE; - - /* Get "bus-range" property */ - prop_val = promGetProperty("bus-range", &prop_len); - if (!prop_val || (prop_len != 8) || - (((unsigned int *)prop_val)[0]) || - (((unsigned int *)prop_val)[1] >= 256)) - continue; - - pci_addr = 0x01fe01000000ull; - domain.io_addr = 0x01fe02000000ull; - domain.io_size = 0x000001000000ull; - domain.mem_addr = 0x01ff00000000ull; - domain.mem_size = 0x000100000000ull; - domain.bus_min = 0; /* Always */ - domain.bus_max = ((int *)prop_val)[1]; - - pFunctions = &sabrePCIFunctions; - } else - if (!strncmp("SUNW,psycho", prop_val, prop_len) || - !strncmp("pci108e,8000", prop_val, prop_len)) { - /* - * A "Psycho" host bridge provides two PCI interfaces, each with - * its own 16-bit I/O and 31-bit memory spaces. Both share the - * same PCI configuration space. Here, they are assigned separate - * domain numbers to prevent unintentional I/O and/or memory - * resource conflicts. - */ - xf86Msg(X_INFO, - "Psycho PCI host bridge found (\"%s\")\n", prop_val); - - /* Get "bus-range" property */ - prop_val = promGetProperty("bus-range", &prop_len); - if (!prop_val || (prop_len != 8) || - (((unsigned int *)prop_val)[1] >= 256) || - (((unsigned int *)prop_val)[0] > ((unsigned int *)prop_val)[1])) - continue; - - domain.bus_min = ((int *)prop_val)[0]; - domain.bus_max = ((int *)prop_val)[1]; - - /* Get "ranges" property */ - prop_val = promGetProperty("ranges", &prop_len); - if (!prop_val || (prop_len != 112) || - prop_val[0] || (prop_val[28] != 0x01u) || - (prop_val[56] != 0x02u) || (prop_val[84] != 0x03u) || - (((unsigned int *)prop_val)[4] != 0x01000000u) || - ((unsigned int *)prop_val)[5] || - ((unsigned int *)prop_val)[12] || - (((unsigned int *)prop_val)[13] != 0x00010000u) || - ((unsigned int *)prop_val)[19] || - (((unsigned int *)prop_val)[20] != 0x80000000u) || - ((((unsigned int *)prop_val)[11] & ~0x00010000u) != - 0x02000000u) || - (((unsigned int *)prop_val)[18] & ~0x80000000u) || - (((unsigned int *)prop_val)[3] != - ((unsigned int *)prop_val)[10]) || - (((unsigned int *)prop_val)[17] != - ((unsigned int *)prop_val)[24]) || - (((unsigned int *)prop_val)[18] != - ((unsigned int *)prop_val)[25]) || - (((unsigned int *)prop_val)[19] != - ((unsigned int *)prop_val)[26]) || - (((unsigned int *)prop_val)[20] != - ((unsigned int *)prop_val)[27])) - continue; - - /* Use memcpy() to avoid alignment issues */ - (void)memcpy(&pci_addr, prop_val + 12, - sizeof(pci_addr)); - (void)memcpy(&domain.io_addr, prop_val + 40, - sizeof(domain.io_addr)); - (void)memcpy(&domain.mem_addr, prop_val + 68, - sizeof(domain.mem_addr)); - - domain.io_size = 0x000000010000ull; - domain.mem_size = 0x000080000000ull; - } else - if (!strncmp("SUNW,schizo", prop_val, prop_len) || - !strncmp("pci108e,8001", prop_val, prop_len)) { - /* - * I have no docs on the "Schizo", but judging from the Linux - * kernel, it also provides two PCI domains. Each PCI - * configuration space is the usual 16M in size, followed by a - * variable-length I/O space. Each domain also provides a - * variable-length memory space. The kernel seems to think the I/O - * spaces are 16M long, and the memory spaces, 2G, but these - * assumptions are actually only present in source code comments. - * Sun has, however, confirmed to me the validity of these - * assumptions. - */ - volatile unsigned long long mem_match, mem_mask, io_match, io_mask; - unsigned long Offset; - pointer pSchizo; - - xf86Msg(X_INFO, - "Schizo PCI host bridge found (\"%s\")\n", prop_val); - - /* Get "bus-range" property */ - prop_val = promGetProperty("bus-range", &prop_len); - if (!prop_val || (prop_len != 8) || - (((unsigned int *)prop_val)[1] >= 256) || - (((unsigned int *)prop_val)[0] > ((unsigned int *)prop_val)[1])) - continue; - - domain.bus_min = ((int *)prop_val)[0]; - domain.bus_max = ((int *)prop_val)[1]; - - /* Get "reg" property */ - prop_val = promGetProperty("reg", &prop_len); - if (!prop_val || (prop_len != 48)) - continue; - - /* Temporarily map some of Schizo's registers */ - pSchizo = sparcMapAperture(-1, VIDMEM_MMIO, - ((unsigned long long *)prop_val)[2] - 0x000000010000ull, - 0x00010000ul); - - /* Determine where PCI config, I/O and memory spaces reside */ - if ((((unsigned long long *)prop_val)[0] & 0x000000700000ull) == - 0x000000600000ull) - Offset = 0x0040; - else - Offset = 0x0060; - - mem_match = PciReg(pSchizo, 0, Offset, unsigned long long); - mem_mask = PciReg(pSchizo, 0, Offset + 8, unsigned long long); - io_match = PciReg(pSchizo, 0, Offset + 16, unsigned long long); - io_mask = PciReg(pSchizo, 0, Offset + 24, unsigned long long); - - /* Unmap Schizo registers */ - xf86UnMapVidMem(-1, pSchizo, 0x00010000ul); - - /* Calculate sizes */ - mem_mask = (((mem_mask - 1) ^ mem_mask) >> 1) + 1; - io_mask = (((io_mask - 1) ^ io_mask ) >> 1) + 1; - - if (io_mask <= 0x000001000000ull) /* Nothing left for I/O */ - continue; - - domain.mem_addr = mem_match & ~0x8000000000000000ull; - domain.mem_size = mem_mask; - pci_addr = io_match & ~0x8000000000000000ull; - domain.io_addr = pci_addr + 0x0000000001000000ull; - domain.io_size = io_mask - 0x0000000001000000ull; - } else { - xf86Msg(X_WARNING, "Unknown PCI host bridge: \"%s\"\n", prop_val); - continue; - } - - /* Only map as much PCI configuration as we need */ - domain.pci = (char *)sparcMapAperture(-1, VIDMEM_MMIO, - pci_addr + PCI_MAKE_TAG(domain.bus_min, 0, 0), - PCI_MAKE_TAG(domain.bus_max - domain.bus_min + 1, 0, 0)) - - PCI_MAKE_TAG(domain.bus_min, 0, 0); - - /* Allocate a domain record */ - pDomain = xnfalloc(sizeof(sparcDomainRec)); - *pDomain = domain; - - /* - * Allocate and prime pciBusInfo records. These are allocated one at a - * time because those for empty buses are eventually released. - */ - bus = pDomain->bus_min = - PCI_MAKE_BUS(pciNumDomains, domain.bus_min); - pciNumBuses = pDomain->bus_max = - PCI_MAKE_BUS(pciNumDomains, domain.bus_max) + 1; - - pciBusInfo[bus] = xnfcalloc(1, sizeof(pciBusInfo_t)); - pciBusInfo[bus]->configMech = PCI_CFG_MECH_OTHER; - pciBusInfo[bus]->numDevices = 32; - pciBusInfo[bus]->funcs = pFunctions; - pciBusInfo[bus]->pciBusPriv = pDomain; - while (++bus < pciNumBuses) { - pciBusInfo[bus] = xnfalloc(sizeof(pciBusInfo_t)); - *(pciBusInfo[bus]) = *(pciBusInfo[bus - 1]); - pciBusInfo[bus]->funcs = &sparcPCIFunctions; - } - - /* Next domain, please... */ - xf86DomainInfo[pciNumDomains++] = pDomain; - - /* - * OK, enough of the straight-forward stuff. Time to deal with some - * brokenness... - * - * The PCI specs require that when a bus transaction remains unclaimed - * for too long, the master entity on that bus is to cancel the - * transaction it issued or passed on with a master abort. Two - * outcomes are possible: - * - * - the master abort can be treated as an error that is propogated - * back through the bus tree to the entity that ultimately originated - * the transaction; or - * - the transaction can be allowed to complete normally, which means - * that writes are ignored and reads return all ones. - * - * In the first case, if the CPU happens to be at the tail end of the - * tree path through one of its host bridges, it will be told there is - * a hardware mal-function, despite being generated by software. - * - * For a software function (be it firmware, OS or userland application) - * to determine how a PCI bus tree is populated, it must be able to - * detect when master aborts occur. Obviously, PCI discovery is much - * simpler when master aborts are allowed to complete normally. - * - * Unfortunately, a number of non-Intel PCI implementations have chosen - * to treat master aborts as severe errors. The net effect is to - * cripple PCI discovery algorithms in userland. - * - * On SPARCs, master aborts cause a number of different behaviours, - * including delivering a signal to the userland application, rebooting - * the system, "dropping down" to firmware, or, worst of all, bus - * lockouts. Even in the first case, the SIGBUS signal that is - * eventually generated isn't delivered in a timely enough fashion to - * allow an application to reliably detect the master abort that - * ultimately caused it. - * - * This can be somewhat mitigated. On all architectures, master aborts - * that occur on secondary buses can be forced to complete normally - * because the PCI-to-PCI bridges that serve them are governed by an - * industry-wide specification. (This is just another way of saying - * that whatever justification there might be for erroring out master - * aborts is deemed by the industry as insufficient to generate more - * PCI non-compliance than there already is...) - * - * This leaves us with master aborts that occur on primary buses. - * There is no specification for host-to-PCI bridges. Bridges used in - * SPARCs can be told to ignore all PCI errors, but not specifically - * master aborts. Not only is this too coarse-grained, but - * master-aborted read transactions on the primary bus end up returning - * garbage rather than all ones. - * - * I have elected to work around this the only way I can think of doing - * so right now. The following scans an additional PROM level and - * builds a device/function map for the primary bus. I can only hope - * this PROM information represents all devices on the primary bus, - * rather than only a subset of them. - * - * Master aborts are useful in other ways too, that are not addressed - * here. These include determining whether or not a domain provides - * VGA, or if a PCI device actually implements PCI disablement. - * - * --- TSI @ UQV 2001.09.19 - */ - for (node2 = promGetChild(node); - node2; - node2 = promGetSibling(node2)) { - /* Get "reg" property */ - prop_val = promGetProperty("reg", &prop_len); - if (!prop_val || (prop_len % 20)) - continue; - - /* - * It's unnecessary to scan the entire "reg" property, but I'll do - * so anyway. - */ - prop_len /= 20; - for (; prop_len--; prop_val += 20) - SetBitInMap(PCI_DFN_FROM_TAG(*(PCITAG *)prop_val), - pDomain->dfn_mask); - } - - /* Assume the host bridge is device 0, function 0 on its bus */ - SetBitInMap(0, pDomain->dfn_mask); - } - - sparcPromClose(); - - close(apertureFd); - apertureFd = -1; -} - -#ifndef INCLUDE_XF86_NO_DOMAIN - -_X_EXPORT int -xf86GetPciDomain(PCITAG Tag) -{ - return PCI_DOM_FROM_TAG(Tag); -} - -_X_EXPORT pointer -xf86MapDomainMemory(int ScreenNum, int Flags, PCITAG Tag, - ADDRESS Base, unsigned long Size) -{ - sparcDomainPtr pDomain; - pointer result; - int domain = PCI_DOM_FROM_TAG(Tag); - - if ((domain <= 0) || (domain >= pciNumDomains) || - !(pDomain = xf86DomainInfo[domain]) || - (((unsigned long long)Base + (unsigned long long)Size) > - pDomain->mem_size)) - FatalError("xf86MapDomainMemory() called with invalid parameters.\n"); - - result = sparcMapAperture(ScreenNum, Flags, pDomain->mem_addr + Base, Size); - - if (apertureFd >= 0) { - close(apertureFd); - apertureFd = -1; - } - - return result; -} - -_X_EXPORT IOADDRESS -xf86MapLegacyIO(int ScreenNum, int Flags, PCITAG Tag, - IOADDRESS Base, unsigned long Size) -{ - sparcDomainPtr pDomain; - int domain = PCI_DOM_FROM_TAG(Tag); - - if ((domain <= 0) || (domain >= pciNumDomains) || - !(pDomain = xf86DomainInfo[domain]) || - (((unsigned long long)Base + (unsigned long long)Size) > - pDomain->io_size)) - FatalError("xf86MapLegacyIO() called with invalid parameters.\n"); - - /* Permanently map all of I/O space */ - if (!pDomain->io) { - pDomain->io = sparcMapAperture(ScreenNum, Flags, - pDomain->io_addr, pDomain->io_size); - - if (apertureFd >= 0) { - close(apertureFd); - apertureFd = -1; - } - } - - return (IOADDRESS)pDomain->io + Base; -} - -resPtr -xf86AccResFromOS(resPtr pRes) -{ - sparcDomainPtr pDomain; - resRange range; - int domain; - - for (domain = 1; domain < pciNumDomains; domain++) { - if (!(pDomain = xf86DomainInfo[domain])) - continue; - - /* - * At minimum, the top and bottom resources must be claimed, so that - * resources that are (or appear to be) unallocated can be relocated. - */ - RANGE(range, 0x00000000u, 0x0009ffffu, - RANGE_TYPE(ResExcMemBlock, domain)); - pRes = xf86AddResToList(pRes, &range, -1); - RANGE(range, 0x000c0000u, 0x000effffu, - RANGE_TYPE(ResExcMemBlock, domain)); - pRes = xf86AddResToList(pRes, &range, -1); - RANGE(range, 0x000f0000u, 0x000fffffu, - RANGE_TYPE(ResExcMemBlock, domain)); - pRes = xf86AddResToList(pRes, &range, -1); - - RANGE(range, pDomain->mem_size - 1, pDomain->mem_size - 1, - RANGE_TYPE(ResExcMemBlock, domain)); - pRes = xf86AddResToList(pRes, &range, -1); - - RANGE(range, 0x00000000u, 0x00000000u, - RANGE_TYPE(ResExcIoBlock, domain)); - pRes = xf86AddResToList(pRes, &range, -1); - RANGE(range, pDomain->io_size - 1, pDomain->io_size - 1, - RANGE_TYPE(ResExcIoBlock, domain)); - pRes = xf86AddResToList(pRes, &range, -1); - } - - return pRes; -} - -#endif /* !INCLUDE_XF86_NO_DOMAIN */ - -#endif /* defined(sun) */ - -#if defined(ARCH_PCI_PCI_BRIDGE) - -/* Definitions specific to Sun's APB P2P bridge (a.k.a. Simba) */ -#define APB_IO_ADDRESS_MAP 0xDE -#define APB_MEM_ADDRESS_MAP 0xDF - -/* - * Simba's can only occur on bus 0. Furthermore, Simba's must have a non-zero - * device/function number because the Sabre interface they must connect to - * occupies the 0:0:0 slot. Also, there can be only one Sabre interface in the - * system, and therefore, only one Simba function can route any particular - * resource. Thus, it is appropriate to use a single set of static variables - * to hold the tag of the Simba function routing a VGA resource range at any - * one time, and to test these variables for non-zero to determine whether or - * not the Sabre would master-abort a VGA access (and kill the system). - * - * The trick is to determine when it is safe to re-route VGA, because doing so - * re-routes much more. - */ -static PCITAG simbavgaIOTag = 0, simbavgaMemTag = 0; -static Bool simbavgaRoutingAllow = TRUE; - -/* - * Scan the bus subtree rooted at 'bus' for a non-display device that might be - * decoding the bottom 2 MB of I/O space and/or the bottom 512 MB of memory - * space. Reset simbavgaRoutingAllow if such a device is found. - * - * XXX For now, this is very conservative and should be made less so as the - * need arises. - */ -static void -simbaCheckBus(CARD16 pcicommand, int bus) -{ - pciConfigPtr pPCI, *ppPCI = xf86scanpci(0); - - while ((pPCI = *ppPCI++)) { - if (pPCI->busnum < bus) - continue; - if (pPCI->busnum > bus) - break; - - /* XXX Assume all devices respect PCI disablement */ - if (!(pcicommand & pPCI->pci_command)) - continue; - - /* XXX This doesn't deal with mis-advertised classes */ - switch (pPCI->pci_base_class) { - case PCI_CLASS_PREHISTORIC: - if (pPCI->pci_sub_class == PCI_SUBCLASS_PREHISTORIC_VGA) - continue; /* Ignore VGA */ - break; - - case PCI_CLASS_DISPLAY: - continue; - - case PCI_CLASS_BRIDGE: - switch (pPCI->pci_sub_class) { - case PCI_SUBCLASS_BRIDGE_PCI: - case PCI_SUBCLASS_BRIDGE_CARDBUS: - /* Scan secondary bus */ - /* XXX First check bridge routing? */ - simbaCheckBus(pcicommand & pPCI->pci_command, - PCI_SECONDARY_BUS_EXTRACT(pPCI->pci_pp_bus_register, - pPCI->tag)); - if (!simbavgaRoutingAllow) - return; - - default: - break; - } - - default: - break; - } - - /* - * XXX We could check the device's bases here, but PCI doesn't limit - * the device's decoding to them. - */ - - simbavgaRoutingAllow = FALSE; - break; - } -} - -static pciConfigPtr -simbaVerifyBus(int bus) -{ - pciConfigPtr pPCI; - if ((bus < 0) || (bus >= pciNumBuses) || - !pciBusInfo[bus] || !(pPCI = pciBusInfo[bus]->bridge) || - (pPCI->pci_device_vendor != DEVID(VENDOR_SUN, CHIP_SIMBA))) - return NULL; - - return pPCI; -} - -static CARD16 -simbaControlBridge(int bus, CARD16 mask, CARD16 value) -{ - pciConfigPtr pPCI; - CARD16 current = 0, tmp; - CARD8 iomap, memmap; - - if ((pPCI = simbaVerifyBus(bus))) { - /* - * The Simba does not implement VGA enablement as described in the P2P - * spec. It does however route I/O and memory in large enough chunks - * so that we can determine were VGA resources would be routed - * (including ISA VGA I/O aliases). We can allow changes to that - * routing only under certain circumstances. - */ - iomap = pciReadByte(pPCI->tag, APB_IO_ADDRESS_MAP); - memmap = pciReadByte(pPCI->tag, APB_MEM_ADDRESS_MAP); - if (iomap & memmap & 0x01) { - current |= PCI_PCI_BRIDGE_VGA_EN; - if ((mask & PCI_PCI_BRIDGE_VGA_EN) && - !(value & PCI_PCI_BRIDGE_VGA_EN)) { - if (!simbavgaRoutingAllow) { - xf86MsgVerb(X_WARNING, 3, "Attempt to disable VGA routing" - " through Simba at %x:%x:%x disallowed.\n", - pPCI->busnum, pPCI->devnum, pPCI->funcnum); - value |= PCI_PCI_BRIDGE_VGA_EN; - } else { - pciWriteByte(pPCI->tag, APB_IO_ADDRESS_MAP, - iomap & ~0x01); - pciWriteByte(pPCI->tag, APB_MEM_ADDRESS_MAP, - memmap & ~0x01); - simbavgaIOTag = simbavgaMemTag = 0; - } - } - } else { - if (mask & value & PCI_PCI_BRIDGE_VGA_EN) { - if (!simbavgaRoutingAllow) { - xf86MsgVerb(X_WARNING, 3, "Attempt to enable VGA routing" - " through Simba at %x:%x:%x disallowed.\n", - pPCI->busnum, pPCI->devnum, pPCI->funcnum); - value &= ~PCI_PCI_BRIDGE_VGA_EN; - } else { - if (pPCI->tag != simbavgaIOTag) { - if (simbavgaIOTag) { - tmp = pciReadByte(simbavgaIOTag, - APB_IO_ADDRESS_MAP); - pciWriteByte(simbavgaIOTag, APB_IO_ADDRESS_MAP, - tmp & ~0x01); - } - - pciWriteByte(pPCI->tag, APB_IO_ADDRESS_MAP, - iomap | 0x01); - simbavgaIOTag = pPCI->tag; - } - - if (pPCI->tag != simbavgaMemTag) { - if (simbavgaMemTag) { - tmp = pciReadByte(simbavgaMemTag, - APB_MEM_ADDRESS_MAP); - pciWriteByte(simbavgaMemTag, APB_MEM_ADDRESS_MAP, - tmp & ~0x01); - } - - pciWriteByte(pPCI->tag, APB_MEM_ADDRESS_MAP, - memmap | 0x01); - simbavgaMemTag = pPCI->tag; - } - } - } - } - - /* Move on to master abort failure enablement (as per P2P spec) */ - tmp = pciReadWord(pPCI->tag, PCI_PCI_BRIDGE_CONTROL_REG); - current |= tmp; - if (tmp & PCI_PCI_BRIDGE_MASTER_ABORT_EN) { - if ((mask & PCI_PCI_BRIDGE_MASTER_ABORT_EN) && - !(value & PCI_PCI_BRIDGE_MASTER_ABORT_EN)) - pciWriteWord(pPCI->tag, PCI_PCI_BRIDGE_CONTROL_REG, - tmp & ~PCI_PCI_BRIDGE_MASTER_ABORT_EN); - } else { - if (mask & value & PCI_PCI_BRIDGE_MASTER_ABORT_EN) - pciWriteWord(pPCI->tag, PCI_PCI_BRIDGE_CONTROL_REG, - tmp | PCI_PCI_BRIDGE_MASTER_ABORT_EN); - } - - /* Insert emulation of other P2P controls here */ - } - - return (current & ~mask) | (value & mask); -} - -static void -simbaGetBridgeResources(int bus, - pointer *ppIoRes, - pointer *ppMemRes, - pointer *ppPmemRes) -{ - pciConfigPtr pPCI = simbaVerifyBus(bus); - resRange range; - int i; - - if (!pPCI) - return; - - if (ppIoRes) { - xf86FreeResList(*ppIoRes); - *ppIoRes = NULL; - - if (pPCI->pci_command & PCI_CMD_IO_ENABLE) { - unsigned char iomap = pciReadByte(pPCI->tag, APB_IO_ADDRESS_MAP); - if (simbavgaRoutingAllow) - iomap |= 0x01; - for (i = 0; i < 8; i++) { - if (iomap & (1 << i)) { - RANGE(range, i << 21, ((i + 1) << 21) - 1, - RANGE_TYPE(ResExcIoBlock, - xf86GetPciDomain(pPCI->tag))); - *ppIoRes = xf86AddResToList(*ppIoRes, &range, -1); - } - } - } - } - - if (ppMemRes) { - xf86FreeResList(*ppMemRes); - *ppMemRes = NULL; - - if (pPCI->pci_command & PCI_CMD_MEM_ENABLE) { - unsigned char memmap = pciReadByte(pPCI->tag, APB_MEM_ADDRESS_MAP); - if (simbavgaRoutingAllow) - memmap |= 0x01; - for (i = 0; i < 8; i++) { - if (memmap & (1 << i)) { - RANGE(range, i << 29, ((i + 1) << 29) - 1, - RANGE_TYPE(ResExcMemBlock, - xf86GetPciDomain(pPCI->tag))); - *ppMemRes = xf86AddResToList(*ppMemRes, &range, -1); - } - } - } - } - - if (ppPmemRes) { - xf86FreeResList(*ppPmemRes); - *ppPmemRes = NULL; - } -} - -void ARCH_PCI_PCI_BRIDGE(pciConfigPtr pPCI) -{ - static pciBusFuncs_t simbaBusFuncs; - pciBusInfo_t *pBusInfo; - CARD16 pcicommand; - - if (pPCI->pci_device_vendor != DEVID(VENDOR_SUN, CHIP_SIMBA)) - return; - - pBusInfo = pPCI->businfo; - - simbaBusFuncs = *(pBusInfo->funcs); - simbaBusFuncs.pciControlBridge = simbaControlBridge; - simbaBusFuncs.pciGetBridgeResources = simbaGetBridgeResources; - - pBusInfo->funcs = &simbaBusFuncs; - - if (!simbavgaRoutingAllow) - return; - - pcicommand = 0; - - if (pciReadByte(pPCI->tag, APB_IO_ADDRESS_MAP) & 0x01) { - pcicommand |= PCI_CMD_IO_ENABLE; - simbavgaIOTag = pPCI->tag; - } - - if (pciReadByte(pPCI->tag, APB_MEM_ADDRESS_MAP) & 0x01) { - pcicommand |= PCI_CMD_MEM_ENABLE; - simbavgaMemTag = pPCI->tag; - } - - if (!pcicommand) - return; - - simbaCheckBus(pcicommand, - PCI_SECONDARY_BUS_EXTRACT(pPCI->pci_pp_bus_register, pPCI->tag)); -} - -#endif /* defined(ARCH_PCI_PCI_BRIDGE) */ diff --git a/xorg-server/hw/xfree86/os-support/bus/xf86Pci.h b/xorg-server/hw/xfree86/os-support/bus/xf86Pci.h index 2b8a4f76b..3a73678b3 100644 --- a/xorg-server/hw/xfree86/os-support/bus/xf86Pci.h +++ b/xorg-server/hw/xfree86/os-support/bus/xf86Pci.h @@ -255,8 +255,6 @@ ADDRESS pciBusAddrToHostAddr(PCITAG tag, PciAddrType type, ADDRESS addr); PCITAG pciTag(int busnum, int devnum, int funcnum); Bool xf86scanpci(void); -extern int pciNumBuses; - /* Domain access functions. Some of these probably shouldn't be public */ pointer xf86MapDomainMemory(int ScreenNum, int Flags, struct pci_device *dev, ADDRESS Base, unsigned long Size); -- cgit v1.2.3