diff options
author | Reinhard Tartler <siretart@tauware.de> | 2011-10-10 17:43:39 +0200 |
---|---|---|
committer | Reinhard Tartler <siretart@tauware.de> | 2011-10-10 17:43:39 +0200 |
commit | f4092abdf94af6a99aff944d6264bc1284e8bdd4 (patch) | |
tree | 2ac1c9cc16ceb93edb2c4382c088dac5aeafdf0f /nx-X11/programs/Xserver/hw/xfree86/os-support/misc/SlowBcopy.c | |
parent | a840692edc9c6d19cd7c057f68e39c7d95eb767d (diff) | |
download | nx-libs-f4092abdf94af6a99aff944d6264bc1284e8bdd4.tar.gz nx-libs-f4092abdf94af6a99aff944d6264bc1284e8bdd4.tar.bz2 nx-libs-f4092abdf94af6a99aff944d6264bc1284e8bdd4.zip |
Imported nx-X11-3.1.0-1.tar.gznx-X11/3.1.0-1
Summary: Imported nx-X11-3.1.0-1.tar.gz
Keywords:
Imported nx-X11-3.1.0-1.tar.gz
into Git repository
Diffstat (limited to 'nx-X11/programs/Xserver/hw/xfree86/os-support/misc/SlowBcopy.c')
-rw-r--r-- | nx-X11/programs/Xserver/hw/xfree86/os-support/misc/SlowBcopy.c | 114 |
1 files changed, 114 insertions, 0 deletions
diff --git a/nx-X11/programs/Xserver/hw/xfree86/os-support/misc/SlowBcopy.c b/nx-X11/programs/Xserver/hw/xfree86/os-support/misc/SlowBcopy.c new file mode 100644 index 000000000..ec2c67ffa --- /dev/null +++ b/nx-X11/programs/Xserver/hw/xfree86/os-support/misc/SlowBcopy.c @@ -0,0 +1,114 @@ + +/* $XConsortium: SlowBcopy.c /main/1 1996/05/07 17:14:10 kaleb $ */ +/******************************************************************************* + for Alpha Linux +*******************************************************************************/ + +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/misc/SlowBcopy.c,v 1.6tsi Exp $ */ + +/* + * Create a dependency that should be immune from the effect of register + * renaming as is commonly seen in superscalar processors. This should + * insert a minimum of 100-ns delays between reads/writes at clock rates + * up to 100 MHz---GGL + * + * Slowbcopy(char *src, char *dst, int count) + * + */ + +#ifdef HAVE_XORG_CONFIG_H +#include <xorg-config.h> +#endif + +#include <X11/X.h> +#include "xf86.h" +#include "xf86Priv.h" +#include "xf86_OSlib.h" +#include "compiler.h" + +/* The outb() isn't needed on my machine, but who knows ... -- ost */ +void +xf86SlowBcopy(unsigned char *src, unsigned char *dst, int len) +{ + while(len--) + { + *dst++ = *src++; +#if !defined(__sparc__) && \ + !defined(__powerpc__) && \ + !defined(__mips__) && \ + !defined(__ia64__) + outb(0x80, 0x00); +#endif + } +} + +#ifdef __alpha__ +/* + * The Jensen lacks dense memory, thus we have to address the bus via + * the sparse addressing scheme. Time critical code uses routines from + * BUSmemcpy.c + * + * Martin Ostermann (ost@comnets.rwth-aachen.de) - Apr.-Sep. 1996 + */ + +#ifdef linux + +unsigned long _bus_base(void); + +#ifdef TEST_JENSEN_CODE /* define to test the Sparse addressing on a non-Jensen */ +#define SPARSE (5) +#else +#define SPARSE (7) +#endif + +#define isJensen() (!_bus_base()) + +#else + +#define isJensen() 0 +#define SPARSE 0 + +#endif + +void +xf86SlowBCopyFromBus(unsigned char *src, unsigned char *dst, int count) +{ + if (isJensen()) + { + unsigned long addr; + long result; + + addr = (unsigned long) src; + while( count ){ + result = *(volatile int *) addr; + result >>= ((addr>>SPARSE) & 3) * 8; + *dst++ = (unsigned char) (0xffUL & result); + addr += 1<<SPARSE; + count--; + outb(0x80, 0x00); + } + } + else + xf86SlowBcopy(src,dst,count); +} + +void +xf86SlowBCopyToBus(unsigned char *src, unsigned char *dst, int count) +{ + if (isJensen()) + { + unsigned long addr; + + addr = (unsigned long) dst; + while(count) { + *(volatile unsigned int *) addr = (unsigned short)(*src) * 0x01010101; + src++; + addr += 1<<SPARSE; + count--; + outb(0x80, 0x00); + } + } + else + xf86SlowBcopy(src,dst,count); +} +#endif |